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oyvindronningstadmbolivar-nordic
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[nrf fromtree] tests: arm_thread_swap_tz: Enhance testing of FP ...
... register restoring The existing test puts the same value into all FP registers, runs a secure service which is then interrupted by a thread that clobbers the registers. This patch instead puts different values into each register to test that each register is restored in the right order. Signed-off-by: Øyvind Rønningstad <[email protected]> (cherry picked from commit c400054)
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  • tests/arch/arm/arm_thread_swap_tz/src

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tests/arch/arm/arm_thread_swap_tz/src/main.c

Lines changed: 20 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -54,10 +54,10 @@ static void work_func(struct k_work *work)
5454
*/
5555
#ifdef CONFIG_CPU_HAS_FPU
5656
uint32_t clobber_val[16] = {
57-
0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef,
58-
0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef,
59-
0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef,
60-
0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef,
57+
0xdeadbee0, 0xdeadbee1, 0xdeadbee2, 0xdeadbee3,
58+
0xdeadbee4, 0xdeadbee5, 0xdeadbee6, 0xdeadbee7,
59+
0xdeadbee8, 0xdeadbee9, 0xdeadbeea, 0xdeadbeeb,
60+
0xdeadbeec, 0xdeadbeed, 0xdeadbeee, 0xdeadbeef,
6161
};
6262

6363
__asm__ volatile(
@@ -106,20 +106,27 @@ void test_thread_swap_tz(void)
106106
* a secure function.
107107
*/
108108
#ifdef CONFIG_CPU_HAS_FPU
109-
uint32_t test_val[16] = {
110-
0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d,
111-
0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d,
112-
0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d,
113-
0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d, 0x1a2b3c4d,
109+
uint32_t test_val0[16] = {
110+
0x1a2b3c40, 0x1a2b3c41, 0x1a2b3c42, 0x1a2b3c43,
111+
0x1a2b3c44, 0x1a2b3c45, 0x1a2b3c46, 0x1a2b3c47,
112+
0x1a2b3c48, 0x1a2b3c49, 0x1a2b3c4a, 0x1a2b3c4b,
113+
0x1a2b3c4c, 0x1a2b3c4d, 0x1a2b3c4e, 0x1a2b3c4f,
114+
};
115+
uint32_t test_val1[16] = {
116+
0x2b3c4d50, 0x2b3c4d51, 0x2b3c4d52, 0x2b3c4d53,
117+
0x2b3c4d54, 0x2b3c4d55, 0x2b3c4d56, 0x2b3c4d57,
118+
0x2b3c4d58, 0x2b3c4d59, 0x2b3c4d5a, 0x2b3c4d5b,
119+
0x2b3c4d5c, 0x2b3c4d5d, 0x2b3c4d5e, 0x2b3c4d5f,
114120
};
115121
uint32_t test_val_res0[16];
116122
uint32_t test_val_res1[16];
117123

118124
__asm__ volatile(
119125
"vldmia %0, {s0-s15}\n"
120-
"vldmia %0, {s16-s31}\n"
121-
:: "r" (test_val) :
126+
"vldmia %1, {s16-s31}\n"
127+
:: "r" (test_val0), "r" (test_val1) :
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);
129+
123130
#endif /* CONFIG_CPU_HAS_FPU */
124131

125132
work_done = false;
@@ -134,8 +141,8 @@ void test_thread_swap_tz(void)
134141
);
135142

136143
zassert_mem_equal(dummy_digest, dummy_digest_correct, HASH_LEN, NULL);
137-
zassert_mem_equal(test_val, test_val_res0, sizeof(test_val), NULL);
138-
zassert_mem_equal(test_val, test_val_res1, sizeof(test_val), NULL);
144+
zassert_mem_equal(test_val0, test_val_res0, sizeof(test_val0), NULL);
145+
zassert_mem_equal(test_val1, test_val_res1, sizeof(test_val1), NULL);
139146
#endif /* CONFIG_CPU_HAS_FPU */
140147
}
141148

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