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| 1 | +;**************************************************************************************; |
| 2 | +; Interrupt Descriptor Table (IDT) ; |
| 3 | +;**************************************************************************************; |
| 4 | +; The Interrupt Descriptor Table (IDT) is a data structure used to implement an ; |
| 5 | +; Interrupt Vector Table (IVT), i.e. to determine the proper response to three types ; |
| 6 | +; of events: hardware interrupts, software interrupts, and processor exceptions. ; |
| 7 | +; The IDT consists of 256 interrupt vectors, the first 32 (0–31 or 0x00–0x1F) of which ; |
| 8 | +; are used for processor exceptions. ; |
| 9 | +;**************************************************************************************; |
| 10 | + |
| 11 | +BASE_OF_SECTION equ 0x8000 |
| 12 | + |
| 13 | +; We use a macro to simplify a little each IDT entry |
| 14 | +%macro .idtentry 3 |
| 15 | +dw ((BASE_OF_SECTION + %1 - $$) & 0xFFFF) - 1024 ; Low word bits (0-15) of offset |
| 16 | +dw %2 ; Code-Segment-Selector |
| 17 | +db 0 ; Always zero |
| 18 | +db %3 ; Type and Attributes |
| 19 | +dw ((BASE_OF_SECTION + %1 - $$) >> 16) & 0xFFFF ; Middle bits (16-31) of offset |
| 20 | +dd ((BASE_OF_SECTION + %1 - $$) >> 32) & 0xFFFFFFFF ; High bits (32-64) of offset |
| 21 | +dd 0 ; Reserved |
| 22 | +%endmacro |
| 23 | + |
| 24 | +IDT_START: |
| 25 | +;************************************************************************************* |
| 26 | +; IDT Entry: Address of Interrupt Service Routine, Code Segment Selector, Attributes ; |
| 27 | +;************************************************************************************* |
| 28 | + .idtentry ISR_Division_by_Zero, CODE_SEG, 0x8F ;0 (Divide by zero) |
| 29 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;1 (Debug Exception) |
| 30 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;2 (NMI, Non-Maskable Interrupt) |
| 31 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;3 (Breakpoint Exception) |
| 32 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;4 (INTO Overflow) |
| 33 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;5 (Out of Bounds) |
| 34 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;6 (Invalid Opcode) |
| 35 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;7 (Device Not Available) |
| 36 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;8 (Double Fault) |
| 37 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;9 (Deprecated) |
| 38 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;10 (Invalid TSS) |
| 39 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;11 (Segment Not Present) |
| 40 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;12 (Stack-Segment Fault) |
| 41 | + .idtentry ISR_GPF , CODE_SEG, 0x8F ;13 (General Protection Fault) |
| 42 | + .idtentry ISR_Page_Fault , CODE_SEG, 0x8F ;14 (Page Fault) |
| 43 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;15 (Reserved) |
| 44 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;16 (x87 Floating-Point Exception) |
| 45 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;17 (Alignment Check Exception) |
| 46 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;18 (Machine Check Exception) |
| 47 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;19 (SIMD Floating-Point Exception) |
| 48 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;20 (Virtualization Exception) |
| 49 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;21 (Control Protection Exception) |
| 50 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;22 (Reserved) |
| 51 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;23 (Reserved) |
| 52 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;24 (Reserved) |
| 53 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;25 (Reserved) |
| 54 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;26 (Reserved) |
| 55 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;27 (Reserved) |
| 56 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;28 (Hypervisor Injection Exception) |
| 57 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;29 (VMM Communication Exception) |
| 58 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;30 (Security Exception) |
| 59 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;31 (Reserved) |
| 60 | + .idtentry ISR_systimer , CODE_SEG, 0x8F ;32 (IRQ0: Programmable Interrupt Timer) |
| 61 | + .idtentry ISR_keyboard , CODE_SEG, 0x8E ;33 (IRQ1: Keyboard) |
| 62 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;34 (IRQ2: PIC Cascade, used internally) |
| 63 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;35 (IRQ3: COM2, if enabled) |
| 64 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;36 (IRQ4: COM1, if enabled) |
| 65 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;37 (IRQ5: LPT2, if enabled) |
| 66 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;38 (IRQ6: Floppy Disk) |
| 67 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;39 (IRQ7: LPT1) |
| 68 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;40 (IRQ8: CMOS real-time clock) |
| 69 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;41 (IRQ9: Free) |
| 70 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;42 (IRQ10: Free) |
| 71 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;43 (IRQ11: Free) |
| 72 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;44 (IRQ12: PS2 Mouse) |
| 73 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;45 (IRQ13: Coprocessor) |
| 74 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;46 (IRQ14: Primary ATA Hard Disk) |
| 75 | + .idtentry ISR_dummy , CODE_SEG, 0x8F ;47 (IRQ15: Secondary ATA Hard Disk) |
| 76 | +; ... |
| 77 | +; Although the IDT can contain less than 256 entries, any entries that are not present |
| 78 | +; will generate a General Protection Fault when an attempt to access them is made. |
| 79 | +IDT_END: |
| 80 | + |
| 81 | + |
| 82 | +; The IDTR is the argument for the LIDT assembly instruction |
| 83 | +; which loads the location of the IDT to the IDT Register. |
| 84 | +ALIGN 4 |
| 85 | +IDTR: |
| 86 | + .Length dw IDT_END-IDT_START-1 ; One less than the size of the IDT in bytes. |
| 87 | + .Base dd IDT_START ; The linear address of the Interrupt Descriptor Table |
| 88 | + ; (not the physical address, paging applies). |
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