Merge branch 'master' of https://github.com/RoRa96/hal_nxp

Merged enet driver

Author: RohrmuellerR-ILS

dts/nxp/nxp_imx/mimx9596avzxn-pinctrl.dtsi

@@ -58,6 +58,11 @@ zephyr_compile_definitions_ifdef(
   ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
 )
 
+zephyr_compile_definitions_ifdef(
+  CONFIG_SOC_MIMX9596
+  FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL=1
+)
+
 zephyr_library_compile_definitions_ifdef(
   CONFIG_HAS_MCUX_CACHE FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
 )
@@ -150,8 +155,6 @@ include_driver_ifdef(CONFIG_UART_MCUX_FLEXCOMM		flexcomm/usart	driver_flexcomm_u
 include_driver_ifdef(CONFIG_WDT_MCUX_WWDT		wwdt		driver_wwdt)
 include_driver_ifdef(CONFIG_ADC_MCUX_ADC12		adc12		driver_adc12)
 include_driver_ifdef(CONFIG_ADC_MCUX_ADC16		adc16		driver_adc16)
-include_driver_ifdef(CONFIG_IPM_IMX			mu		driver_mu)
-include_driver_ifdef(CONFIG_MBOX_NXP_IMX_MU		mu		driver_mu)
 include_driver_ifdef(CONFIG_CAN_MCUX_FLEXCAN		flexcan		driver_flexcan)
 include_driver_ifdef(CONFIG_CAN_MCUX_FLEXCAN_FD		flexcan		driver_flexcan)
 include_driver_ifdef(CONFIG_COUNTER_NXP_PIT		pit		driver_pit)
@@ -271,6 +274,14 @@ elseif(CONFIG_SOC_MIMXRT1189_CM33)
   include_driver_ifdef(CONFIG_HAS_MCUX_CACHE    cache/xcache  driver_cache_xcache)
 endif()
 
+if (${MCUX_DEVICE} MATCHES "MIMX9596")
+  include_driver_ifdef(CONFIG_IPM_IMX			mu1		driver_mu1)
+  include_driver_ifdef(CONFIG_MBOX_NXP_IMX_MU		mu1		driver_mu1)
+else()
+  include_driver_ifdef(CONFIG_IPM_IMX			mu		driver_mu)
+  include_driver_ifdef(CONFIG_MBOX_NXP_IMX_MU		mu		driver_mu)
+endif()
+
 if(CONFIG_CPU_CORTEX_A)
   include_driver_ifdef(CONFIG_HAS_MCUX_CACHE		cache/armv8-a	driver_cache_armv8a)
 endif()
@@ -309,6 +320,11 @@ endif()
 if("${CONFIG_SOC_FAMILY}" STREQUAL "nxp_mcx")
   if(CONFIG_SOC_SERIES_MCXC)
     include_driver_ifdef(CONFIG_SOC_FLASH_MCUX		flash		driver_flash)
+    include(${CMAKE_CURRENT_LIST_DIR}/mcux-sdk/drivers/port/driver_port.cmake)
+    zephyr_include_directories(${CMAKE_CURRENT_LIST_DIR}/mcux-sdk/drivers/port)
+  elseif(CONFIG_SOC_SERIES_MCXA)
+    zephyr_include_directories(${CMAKE_CURRENT_LIST_DIR}/mcux-sdk/drivers/mcxa_romapi)
+
     include(${CMAKE_CURRENT_LIST_DIR}/mcux-sdk/drivers/port/driver_port.cmake)
     zephyr_include_directories(${CMAKE_CURRENT_LIST_DIR}/mcux-sdk/drivers/port)
   else()

mcux/hal_nxp.cmake

@@ -0,0 +1,10 @@
+#Description: device_CMSIS; user_visible: False
+include_guard(GLOBAL)
+message("device_CMSIS component is included.")
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/.
+)

mcux/mcux-sdk/devices/MIMX9596/MIMX9596_ca55.h

@@ -0,0 +1,11 @@
+#Description: Reset Driver; user_visible: False
+include_guard(GLOBAL)
+
+message("driver_reset component is included.")
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/.
+)

mcux/mcux-sdk/devices/MIMX9596/MIMX9596_ca55_features.h

@@ -0,0 +1,7 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#include "fsl_clock.h"
+

mcux/mcux-sdk/devices/MIMX9596/MIMX9596_cm7.h

@@ -0,0 +1,16 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _FSL_CLOCK_H_
+#define _FSL_CLOCK_H_
+
+/* Definition for delay API in clock driver, users can redefine it to the real application. */
+#ifndef SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY
+#define SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY \
+    (800000000UL) /* When using Overdrive Voltage, the maximum frequency of cm7 is 800 MHz */
+#endif
+
+#endif

mcux/mcux-sdk/devices/MIMX9596/MIMX9596_cm7_features.h

@@ -0,0 +1,44 @@
+/*
+ * Copyright 2014-2016 Freescale Semiconductor, Inc.
+ * Copyright 2016-2024 NXP
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef __FSL_DEVICE_REGISTERS_H__
+#define __FSL_DEVICE_REGISTERS_H__
+
+/*
+ * Include the cpu specific register header files.
+ *
+ * The CPU macro should be declared in the project or makefile.
+ */
+#if (defined(CPU_MIMX9596AVTXN_ca55) || defined(CPU_MIMX9596AVZXN_ca55) || defined(CPU_MIMX9596DVTXQ_ca55) || \
+    defined(CPU_MIMX9596DVYXQ_ca55) || defined(CPU_MIMX9596DVZXQ_ca55) || defined(CPU_MIMX9596XVTXL_ca55))
+
+#define MIMX9596_ca55_SERIES
+
+/* CMSIS-style register definitions */
+#include "MIMX9596_ca55.h"
+/* CPU specific feature definitions */
+#include "MIMX9596_ca55_features.h"
+
+#elif (defined(CPU_MIMX9596AVTXN_cm7) || defined(CPU_MIMX9596AVZXN_cm7) || defined(CPU_MIMX9596DVTXQ_cm7) || \
+    defined(CPU_MIMX9596DVYXQ_cm7) || defined(CPU_MIMX9596DVZXQ_cm7) || defined(CPU_MIMX9596XVTXL_cm7))
+
+#define MIMX9596_cm7_SERIES
+
+/* CMSIS-style register definitions */
+#include "MIMX9596_cm7.h"
+/* CPU specific feature definitions */
+#include "MIMX9596_cm7_features.h"
+
+#else
+    #error "No valid CPU defined!"
+#endif
+
+#endif /* __FSL_DEVICE_REGISTERS_H__ */
+
+/*******************************************************************************
+ * EOF
+ ******************************************************************************/

mcux/mcux-sdk/devices/MIMX9596/device_CMSIS.cmake

@@ -0,0 +1,93 @@
+/*
+** ###################################################################
+**     Processors:          MIMX9596AVTXN_ca55
+**                          MIMX9596AVZXN_ca55
+**                          MIMX9596DVTXQ_ca55
+**                          MIMX9596DVYXQ_ca55
+**                          MIMX9596DVZXQ_ca55
+**                          MIMX9596XVTXL_ca55
+**
+**     Compilers:           GNU C Compiler
+**                          IAR ANSI C/C++ Compiler for ARM
+**                          Keil ARM C/C++ Compiler
+**
+**     Reference manual:    iMX95RM rev1 draftM
+**     Version:             rev. 1.0, 2023-01-10
+**     Build:               b240402
+**
+**     Abstract:
+**         Provides a system configuration function and a global variable that
+**         contains the system frequency. It configures the device and initializes
+**         the oscillator (PLL) that is part of the microcontroller device.
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2024 NXP
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 [email protected]
+**
+**     Revisions:
+**     - rev. 1.0 (2023-01-10)
+**         Initial version.
+**
+** ###################################################################
+*/
+
+/*!
+ * @file MIMX9596_ca55
+ * @version 1.0
+ * @date 2023-01-10
+ * @brief Device specific configuration file for MIMX9596_ca55 (implementation
+ *        file)
+ *
+ * Provides a system configuration function and a global variable that contains
+ * the system frequency. It configures the device and initializes the oscillator
+ * (PLL) that is part of the microcontroller device.
+ */
+
+#include <stdint.h>
+#include "fsl_device_registers.h"
+
+
+
+
+
+/* ----------------------------------------------------------------------------
+   -- Core clock
+   ---------------------------------------------------------------------------- */
+
+uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
+
+/* ----------------------------------------------------------------------------
+   -- SystemInit()
+   ---------------------------------------------------------------------------- */
+
+void SystemInit (void) {
+#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
+  __ASM volatile("mov x0, #(3 << 20) \n\t"
+                 "msr cpacr_el1, x0");
+#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
+
+
+  SystemInitHook();
+
+  ARM_TIMER_GetFreq(&SystemCoreClock);
+}
+
+/* ----------------------------------------------------------------------------
+   -- SystemCoreClockUpdate()
+   ---------------------------------------------------------------------------- */
+
+void SystemCoreClockUpdate (void) {
+
+
+}
+
+/* ----------------------------------------------------------------------------
+   -- SystemInitHook()
+   ---------------------------------------------------------------------------- */
+
+__attribute__ ((weak)) void SystemInitHook (void) {
+  /* Void implementation of the weak function. */
+}

mcux/mcux-sdk/devices/MIMX9596/drivers/driver_reset.cmake

@@ -0,0 +1,105 @@
+/*
+** ###################################################################
+**     Processors:          MIMX9596AVTXN_ca55
+**                          MIMX9596AVZXN_ca55
+**                          MIMX9596DVTXQ_ca55
+**                          MIMX9596DVYXQ_ca55
+**                          MIMX9596DVZXQ_ca55
+**                          MIMX9596XVTXL_ca55
+**
+**     Compilers:           GNU C Compiler
+**                          IAR ANSI C/C++ Compiler for ARM
+**                          Keil ARM C/C++ Compiler
+**
+**     Reference manual:    iMX95RM rev1 draftM
+**     Version:             rev. 1.0, 2023-01-10
+**     Build:               b240402
+**
+**     Abstract:
+**         Provides a system configuration function and a global variable that
+**         contains the system frequency. It configures the device and initializes
+**         the oscillator (PLL) that is part of the microcontroller device.
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2024 NXP
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 [email protected]
+**
+**     Revisions:
+**     - rev. 1.0 (2023-01-10)
+**         Initial version.
+**
+** ###################################################################
+*/
+
+/*!
+ * @file MIMX9596_ca55
+ * @version 1.0
+ * @date 2023-01-10
+ * @brief Device specific configuration file for MIMX9596_ca55 (header file)
+ *
+ * Provides a system configuration function and a global variable that contains
+ * the system frequency. It configures the device and initializes the oscillator
+ * (PLL) that is part of the microcontroller device.
+ */
+
+#ifndef _SYSTEM_MIMX9596_ca55_H_
+#define _SYSTEM_MIMX9596_ca55_H_                 /**< Symbol preventing repeated inclusion */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/* Define clock source values */
+#define DEFAULT_SYSTEM_CLOCK   24000000U /* Default System clock value */
+
+/**
+ * @brief System clock frequency (core clock)
+ *
+ * The system clock frequency supplied to the SysTick timer and the processor
+ * core clock. This variable can be used by the user application to setup the
+ * SysTick timer or configure other parameters. It may also be used by debugger to
+ * query the frequency of the debug timer or configure the trace clock speed
+ * SystemCoreClock is initialized with a correct predefined value.
+ */
+extern uint32_t SystemCoreClock;
+
+/**
+ * @brief Setup the microcontroller system.
+ *
+ * Typically this function configures the oscillator (PLL) that is part of the
+ * microcontroller device. For systems with variable clock speed it also updates
+ * the variable SystemCoreClock. SystemInit is called from startup_device file.
+ */
+void SystemInit (void);
+
+/**
+ * @brief Updates the SystemCoreClock variable.
+ *
+ * It must be called whenever the core clock is changed during program
+ * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
+ * the current core clock.
+ */
+void SystemCoreClockUpdate (void);
+
+/**
+ * @brief SystemInit function hook.
+ *
+ * This weak function allows to call specific initialization code during the
+ * SystemInit() execution.This can be used when an application specific code needs
+ * to be called as close to the reset entry as possible (for example the Multicore
+ * Manager MCMGR_EarlyInit() function call).
+ * NOTE: No global r/w variables can be used in this hook function because the
+ * initialization of these variables happens after this function.
+ */
+void SystemInitHook (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* _SYSTEM_MIMX9596_ca55_H_ */