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The Jupyter Notebooks in this training shows challenges of heterogenous programming and how SYCL programming language can solve application development across CPUs, GPUs and FPGAs.
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Modules also teach usage of Intel oneAPI Data Parallel C++ Library to simplify heterogenous programming and tools usage. Debugger tools and Performance analysis tools like Intel VTune Profiler and Intel Advisor.
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Also, it familiarizes you with the use of Jupyter notebooks as a front-end for all training exercises. This workshop is designed to be used on the Devcloud and includes details on submitting batch jobs on the Devcloud environment.
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Also, it familiarizes you with the use of Jupyter notebooks as a front-end for all training exercises. This workshop is designed to be used on the DevCloud and includes details on submitting batch jobs on the DevCloud environment.
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At the end of this course you will be able to:
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|[oneAPI Introduction](01_oneAPI_Intro/oneAPI_Intro.ipynb)| + Introduction and Motivation for SYCL.<br>+ SYCL __Hello World__<br>+ Compiling SYCL and __DevCloud__ Usage
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|[SYCL Program Structure](02_DPCPP_Program_Structure/DPCPP_Program_Structure.ipynb)| + __SYCL Classes__ - device, device_selector, queue, basic kernels and ND-Range kernels, Buffers-Accessor memory model<br>+ SYCL __Code Anatomy__<br>+ Implicit __Dependency__ with Accessors, __Synchronization__ with Host Accessor and Buffer Destruction<br>+ Creating __Custom__ Device Selector<br>+ ___Lab Exercise___: Vector Increment to Vector Add
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|[SYCL Unified Shared Memory](03_DPCPP_Unified_Shared_Memory/Unified_Shared_Memory.ipynb)|+ What is Unified Shared Memory(USM) and Motivation<br>+ __Implicit and Explicit USM__ code example<br>+ Handling __data dependency__ using depends_on() and ordered queues<br>+ ___Lab Exercise___: Unified Shared Memory
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|[SYCL Sub Groups](04_DPCPP_Sub_Groups/Sub_Groups.ipynb)| + What is Sub-Goups and Motivation<br>+ Quering for __sub-group info__<br>+ Sub-group __shuffle algorithms__<br>+ Sub-group __group algorithms__<br>+ ___Lab Exercise___: Sub-Groups | 90 min |
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|[SYCL Sub Groups](04_DPCPP_Sub_Groups/Sub_Groups.ipynb)| + What is Sub-Groups and Motivation<br>+ Querying for __sub-group info__<br>+ Sub-group __shuffle algorithms__<br>+ Sub-group __group algorithms__<br>+ ___Lab Exercise___: Sub-Groups | 90 min |
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|[SYCL Kernel Reductions](08_DPCPP_Reduction/Reductions.ipynb)|+ What are Reductions<br>+ Challenges with parallelizing reductions<br>+ __sycl::reduce_over_group__ function for sub-groups and work-groups<br>+ __sycl::reduction__ object in parallel_for<br>+ ___Lab Exercise___: Kernel Reductions
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|[SYCL Buffers and Accessors in depth](09_DPCPP_Buffers_And_Accessors_Indepth/DPCPP_Buffers_accessors.ipynb)| + Bufers and Accessors<br>+ Buffer properties and usecases<br>+ Create Sub-buffers<br>+ Host accessors and usecases<br>+ ___Lab Exercise___: Buffers and Accessors
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|[SYCL Buffers and Accessors in depth](09_DPCPP_Buffers_And_Accessors_Indepth/DPCPP_Buffers_accessors.ipynb)| + Buffers and Accessors<br>+ Buffer properties and usecases<br>+ Create Sub-buffers<br>+ Host accessors and usecases<br>+ ___Lab Exercise___: Buffers and Accessors
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|[SYCL Task Scheduling and Data Dependency](10_DPCPP_Graphs_Scheduling_Data_management/DPCPP_Task_Scheduling_Data_dependency.ipynb)| + Different types of data dependency handling<br>+ Execution of graph scheduling<br>+ modes of dependencies in Graphs scheduling<br>+ ___Lab Exercise___: Task Scheduling
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|[Intel® oneAPI DPC++ Library (oneDPL)](07_DPCPP_Library/oneDPL_Introduction.ipynb)| + Introduction to Intel oneAPI DPC++ Library (oneDPL)<br>+ ___Lab Exercise___: Gamma Correction with oneDPL
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#### Access using Intel DevCloud
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The Jupyter notebooks are tested and can be run on Intel Devcloud without any installation necessary, below are the steps to access these Jupyter notebooks on Intel Devcloud:
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1. Register on [Intel Devcloud](https://devcloud.intel.com/oneapi)
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The Jupyter notebooks are tested and can be run on Intel DevCloud without any installation necessary, below are the steps to access these Jupyter notebooks on Intel DevCloud:
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1. Register on [Intel DevCloud](https://devcloud.intel.com/oneapi)
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2. Login, Get Started and Launch Jupyter Lab
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3. Open Terminal in Jupyter Lab and git clone the repo and access the Notebooks
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"|[Challenges in Heterogenous Computing](01_oneAPI_Intro/oneAPI_Intro.ipynb)| + Introduction and Motivation for SYCL.<br>+ SYCL __Hello World__<br>+ Compiling SYCL and __DevCloud__ Usage | 60 min |\n",
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"|[SYCL Program Structure](02_DPCPP_Program_Structure/DPCPP_Program_Structure.ipynb)| + __SYCL Classes__ - device, device_selector, queue, basic kernels and ND-Range kernels, Buffers-Accessor memory model<br>+ SYCL __Code Anatomy__<br>+ Implicit __Dependency__ with Accessors, __Synchronization__ with Host Accessor and Buffer Destruction<br>+ Creating __Custom__ Device Selector<br>+ ___Lab Exercise___: Vector Increment to Vector Add | 120 min |\n",
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"|[SYCL Unified Shared Memory](03_DPCPP_Unified_Shared_Memory/Unified_Shared_Memory.ipynb)|+ What is Unified Shared Memory(USM) and Motivation<br>+ __Implicit and Explicit USM__ code example<br>+ Handling __data dependency__ using depends_on() and ordered queues<br>+ ___Lab Exercise___: Unified Shared Memory | 90 min |\n",
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"|[SYCL Sub Groups](04_DPCPP_Sub_Groups/Sub_Groups.ipynb)| + What is Sub-Goups and Motivation<br>+ Quering for __sub-group info__<br>+ Sub-group __shuffle algorithms__<br>+ Sub-group __group algorithms__<br>+ ___Lab Exercise___: Sub-Groups | 90 min |\n",
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"|[SYCL Sub Groups](04_DPCPP_Sub_Groups/Sub_Groups.ipynb)| + What is Sub-Groups and Motivation<br>+ Querying for __sub-group info__<br>+ Sub-group __shuffle algorithms__<br>+ Sub-group __group algorithms__<br>+ ___Lab Exercise___: Sub-Groups | 90 min |\n",
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"|[SYCL Kernel Reductions](08_DPCPP_Reduction/Reductions.ipynb)|+ What are Reductions<br>+ Challenges with parallelizing reductions<br>+ __sycl::reduce_over_group__ function for sub-groups and work-groups<br>+ __sycl::reduction__ object in parallel_for<br>+ ___Lab Exercise___: Kernel Reductions | 90 min|\n",
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"|[SYCL Buffers and Accessors in depth](09_DPCPP_Buffers_And_Accessors_Indepth/DPCPP_Buffers_accessors.ipynb)| + Bufers and Accessors<br>+ Buffer properties and usecases<br>+ Create Sub-buffers<br>+ Host accessors and usecases<br>+ ___Lab Exercise___: Buffers and Accessors | 120 min |\n",
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"|[SYCL Buffers and Accessors in depth](09_DPCPP_Buffers_And_Accessors_Indepth/DPCPP_Buffers_accessors.ipynb)| + Buffers and Accessors<br>+ Buffer properties and usecases<br>+ Create Sub-buffers<br>+ Host accessors and usecases<br>+ ___Lab Exercise___: Buffers and Accessors | 120 min |\n",
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"|[SYCL Task Scheduling and Data Dependency](10_DPCPP_Graphs_Scheduling_Data_management/DPCPP_Task_Scheduling_Data_dependency.ipynb)| + Different types of data dependency handling<br>+ Execution of graph scheduling<br>+ modes of dependencies in Graphs scheduling<br>+ ___Lab Exercise___: Task Scheduling | 120 min|\n",
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"|[Intel® oneAPI DPC++ Library (oneDPL)](07_DPCPP_Library/oneDPL_Introduction.ipynb)| + Introduction to Intel oneAPI DPC++ Library (oneDPL)<br>+ ___Lab Exercise___: Gamma Correction with oneDPL | 120 min |\n",
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"|[Intel® Advisor](05_Intel_Advisor/offload_advisor.ipynb)| + __Offload Advisor__ Tool usage and command-line options<br>+ ___Lab Exercise___: Generate Offload Advisor Report<br>+ __Roofline Analysis__ and command-line options<br>+ ___Lab Exercise___: Generate Roofline Report | 120 min |\n",
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