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[GlobalISel] Add computeNumSignBits for G_BUILD_VECTOR.
1 parent 68fc0c4 commit c128674

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3 files changed

+49
-42
lines changed

3 files changed

+49
-42
lines changed

llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -874,6 +874,23 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
874874
SrcTy.getScalarSizeInBits());
875875
break;
876876
}
877+
case TargetOpcode::G_BUILD_VECTOR: {
878+
// Collect the known bits that are shared by every demanded vector element.
879+
FirstAnswer = TyBits;
880+
for (unsigned i = 0, e = MI.getNumOperands() - 1; i < e; ++i) {
881+
if (!DemandedElts[i])
882+
continue;
883+
884+
unsigned Tmp2 = computeNumSignBits(MI.getOperand(i + 1).getReg(),
885+
APInt(1, 1), Depth + 1);
886+
FirstAnswer = std::min(FirstAnswer, Tmp2);
887+
888+
// If we don't know any bits, early out.
889+
if (FirstAnswer == 1)
890+
break;
891+
}
892+
break;
893+
}
877894
case TargetOpcode::G_SHUFFLE_VECTOR: {
878895
// Collect the minimum number of sign bits that are shared by every vector
879896
// element referenced by the shuffle.

llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll

Lines changed: 10 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -61,9 +61,9 @@ define <4 x i32> @dupsext_v4i16_v4i32(i16 %src, <4 x i16> %b) {
6161
; CHECK-GI-LABEL: dupsext_v4i16_v4i32:
6262
; CHECK-GI: // %bb.0: // %entry
6363
; CHECK-GI-NEXT: sxth w8, w0
64-
; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0
6564
; CHECK-GI-NEXT: dup v1.4s, w8
66-
; CHECK-GI-NEXT: mul v0.4s, v1.4s, v0.4s
65+
; CHECK-GI-NEXT: xtn v1.4h, v1.4s
66+
; CHECK-GI-NEXT: smull v0.4s, v1.4h, v0.4h
6767
; CHECK-GI-NEXT: ret
6868
entry:
6969
%in = sext i16 %src to i32
@@ -108,16 +108,9 @@ define <2 x i64> @dupsext_v2i32_v2i64(i32 %src, <2 x i32> %b) {
108108
; CHECK-GI: // %bb.0: // %entry
109109
; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0
110110
; CHECK-GI-NEXT: sxtw x8, w0
111-
; CHECK-GI-NEXT: sshll v0.2d, v0.2s, #0
112111
; CHECK-GI-NEXT: dup v1.2d, x8
113-
; CHECK-GI-NEXT: fmov x9, d0
114-
; CHECK-GI-NEXT: mov x11, v0.d[1]
115-
; CHECK-GI-NEXT: fmov x8, d1
116-
; CHECK-GI-NEXT: mov x10, v1.d[1]
117-
; CHECK-GI-NEXT: mul x8, x8, x9
118-
; CHECK-GI-NEXT: mul x9, x10, x11
119-
; CHECK-GI-NEXT: mov v0.d[0], x8
120-
; CHECK-GI-NEXT: mov v0.d[1], x9
112+
; CHECK-GI-NEXT: xtn v1.2s, v1.2d
113+
; CHECK-GI-NEXT: smull v0.2d, v1.2s, v0.2s
121114
; CHECK-GI-NEXT: ret
122115
entry:
123116
%in = sext i32 %src to i64
@@ -293,15 +286,14 @@ define <4 x i32> @nonsplat_shuffleinsert2(<4 x i16> %b, i16 %b0, i16 %b1, i16 %b
293286
; CHECK-GI-LABEL: nonsplat_shuffleinsert2:
294287
; CHECK-GI: // %bb.0: // %entry
295288
; CHECK-GI-NEXT: sxth w8, w0
296-
; CHECK-GI-NEXT: sshll v0.4s, v0.4h, #0
297-
; CHECK-GI-NEXT: mov v1.s[0], w8
298-
; CHECK-GI-NEXT: sxth w8, w1
299-
; CHECK-GI-NEXT: mov v1.s[1], w8
289+
; CHECK-GI-NEXT: sxth w9, w1
290+
; CHECK-GI-NEXT: fmov s1, w8
300291
; CHECK-GI-NEXT: sxth w8, w2
301-
; CHECK-GI-NEXT: mov v1.s[2], w8
292+
; CHECK-GI-NEXT: mov v1.h[1], w9
293+
; CHECK-GI-NEXT: mov v1.h[2], w8
302294
; CHECK-GI-NEXT: sxth w8, w3
303-
; CHECK-GI-NEXT: mov v1.s[3], w8
304-
; CHECK-GI-NEXT: mul v0.4s, v1.4s, v0.4s
295+
; CHECK-GI-NEXT: mov v1.h[3], w8
296+
; CHECK-GI-NEXT: smull v0.4s, v1.4h, v0.4h
305297
; CHECK-GI-NEXT: ret
306298
entry:
307299
%s0 = sext i16 %b0 to i32

llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll

Lines changed: 22 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -108,22 +108,21 @@ define void @matrix_mul_signed(i32 %N, ptr nocapture %C, ptr nocapture readonly
108108
;
109109
; CHECK-GI-LABEL: matrix_mul_signed:
110110
; CHECK-GI: // %bb.0: // %vector.header
111-
; CHECK-GI-NEXT: sxth w9, w3
111+
; CHECK-GI-NEXT: sxth w8, w3
112112
; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0
113+
; CHECK-GI-NEXT: dup v0.4s, w8
113114
; CHECK-GI-NEXT: sxtw x8, w0
114-
; CHECK-GI-NEXT: dup v0.4s, w9
115115
; CHECK-GI-NEXT: and x8, x8, #0xfffffff8
116+
; CHECK-GI-NEXT: xtn v0.4h, v0.4s
116117
; CHECK-GI-NEXT: .LBB1_1: // %vector.body
117118
; CHECK-GI-NEXT: // =>This Inner Loop Header: Depth=1
118119
; CHECK-GI-NEXT: add x9, x2, w0, sxtw #1
119120
; CHECK-GI-NEXT: subs x8, x8, #8
120121
; CHECK-GI-NEXT: ldp d1, d2, [x9]
121122
; CHECK-GI-NEXT: add x9, x1, w0, sxtw #2
122123
; CHECK-GI-NEXT: add w0, w0, #8
123-
; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #0
124-
; CHECK-GI-NEXT: sshll v2.4s, v2.4h, #0
125-
; CHECK-GI-NEXT: mul v1.4s, v0.4s, v1.4s
126-
; CHECK-GI-NEXT: mul v2.4s, v0.4s, v2.4s
124+
; CHECK-GI-NEXT: smull v1.4s, v0.4h, v1.4h
125+
; CHECK-GI-NEXT: smull v2.4s, v0.4h, v2.4h
127126
; CHECK-GI-NEXT: stp q1, q2, [x9]
128127
; CHECK-GI-NEXT: b.ne .LBB1_1
129128
; CHECK-GI-NEXT: // %bb.2: // %for.end12
@@ -305,40 +304,39 @@ define void @larger_smull(ptr nocapture noundef readonly %x, i16 noundef %y, ptr
305304
; CHECK-GI-NEXT: b.le .LBB3_7
306305
; CHECK-GI-NEXT: // %bb.1: // %for.body.preheader
307306
; CHECK-GI-NEXT: sxth w8, w1
308-
; CHECK-GI-NEXT: mov x9, xzr
307+
; CHECK-GI-NEXT: mov x10, xzr
309308
; CHECK-GI-NEXT: cmp w3, #16
310-
; CHECK-GI-NEXT: mov w10, w3
309+
; CHECK-GI-NEXT: mov w9, w3
311310
; CHECK-GI-NEXT: b.lo .LBB3_5
312311
; CHECK-GI-NEXT: // %bb.2: // %vector.ph
313312
; CHECK-GI-NEXT: dup v0.4s, w8
314-
; CHECK-GI-NEXT: and x9, x10, #0xfffffff0
313+
; CHECK-GI-NEXT: and x10, x9, #0xfffffff0
315314
; CHECK-GI-NEXT: add x11, x2, #32
316315
; CHECK-GI-NEXT: add x12, x0, #16
317-
; CHECK-GI-NEXT: mov x13, x9
316+
; CHECK-GI-NEXT: mov x13, x10
317+
; CHECK-GI-NEXT: xtn v0.4h, v0.4s
318318
; CHECK-GI-NEXT: .LBB3_3: // %vector.body
319319
; CHECK-GI-NEXT: // =>This Inner Loop Header: Depth=1
320320
; CHECK-GI-NEXT: ldp q1, q2, [x12, #-16]
321321
; CHECK-GI-NEXT: mov x14, x11
322322
; CHECK-GI-NEXT: subs x13, x13, #16
323323
; CHECK-GI-NEXT: add x12, x12, #32
324-
; CHECK-GI-NEXT: sshll v3.4s, v1.4h, #0
325-
; CHECK-GI-NEXT: sshll2 v1.4s, v1.8h, #0
326-
; CHECK-GI-NEXT: sshll v4.4s, v2.4h, #0
327-
; CHECK-GI-NEXT: sshll2 v2.4s, v2.8h, #0
328-
; CHECK-GI-NEXT: mul v3.4s, v0.4s, v3.4s
329-
; CHECK-GI-NEXT: mul v1.4s, v0.4s, v1.4s
330-
; CHECK-GI-NEXT: mul v4.4s, v0.4s, v4.4s
331-
; CHECK-GI-NEXT: mul v2.4s, v0.4s, v2.4s
332-
; CHECK-GI-NEXT: stp q3, q1, [x14, #-32]!
333-
; CHECK-GI-NEXT: stp q4, q2, [x11], #64
324+
; CHECK-GI-NEXT: mov d3, v1.d[1]
325+
; CHECK-GI-NEXT: mov d4, v2.d[1]
326+
; CHECK-GI-NEXT: smull v1.4s, v0.4h, v1.4h
327+
; CHECK-GI-NEXT: smull v2.4s, v0.4h, v2.4h
328+
; CHECK-GI-NEXT: smull v3.4s, v0.4h, v3.4h
329+
; CHECK-GI-NEXT: smull v4.4s, v0.4h, v4.4h
330+
; CHECK-GI-NEXT: stp q1, q3, [x14, #-32]!
331+
; CHECK-GI-NEXT: stp q2, q4, [x11], #64
334332
; CHECK-GI-NEXT: b.ne .LBB3_3
335333
; CHECK-GI-NEXT: // %bb.4: // %middle.block
336-
; CHECK-GI-NEXT: cmp x9, x10
334+
; CHECK-GI-NEXT: cmp x10, x9
337335
; CHECK-GI-NEXT: b.eq .LBB3_7
338336
; CHECK-GI-NEXT: .LBB3_5: // %for.body.preheader1
339-
; CHECK-GI-NEXT: add x11, x2, x9, lsl #2
340-
; CHECK-GI-NEXT: add x12, x0, x9, lsl #1
341-
; CHECK-GI-NEXT: sub x9, x10, x9
337+
; CHECK-GI-NEXT: add x11, x2, x10, lsl #2
338+
; CHECK-GI-NEXT: add x12, x0, x10, lsl #1
339+
; CHECK-GI-NEXT: sub x9, x9, x10
342340
; CHECK-GI-NEXT: .LBB3_6: // %for.body
343341
; CHECK-GI-NEXT: // =>This Inner Loop Header: Depth=1
344342
; CHECK-GI-NEXT: ldrsh w10, [x12], #2

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