Search results

[WIP][SPARC] Properly handle CC for long double on sparc32

backend:Sparc

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:codegenIR generation bugs: mangling, exceptions, etc.IR generation bugs: mangling, exceptions, etc.

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

compiler-rt

compiler-rt:builtins

Status: Open (in progress).

llvm/llvm-projectnumber 162226

#162226 In llvm/llvm-project;

· koachan opened on Oct 7, 2025

CodeGen: Make all targets override pseudos with pointers

backend:AArch64

backend:AMDGPU

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:m68k

backend:MIPS

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

backend:Xtensa

Status: Open (in progress).

llvm/llvm-projectnumber 159881

#159881 In llvm/llvm-project;

· arsenm opened on Sep 19, 2025

CodeGen: Remove TRI arguments from stack load/store hooks

backend:AArch64

backend:AMDGPU

backend:ARC

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

backend:Xtensa

Status: Open (in progress).

llvm/llvm-projectnumber 158240

#158240 In llvm/llvm-project;

· arsenm opened on Sep 12, 2025

CodeGen: Remove TRI argument from reMaterialize

backend:AArch64

backend:AMDGPU

backend:ARC

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

backend:Xtensa

Status: Open (in progress).

llvm/llvm-projectnumber 158229

#158229 In llvm/llvm-project;

· arsenm opened on Sep 12, 2025

ARM: Remove TRI argument from AddDReg

backend:AArch64

backend:AMDGPU

backend:ARC

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

backend:Xtensa

Status: Open (in progress).

llvm/llvm-projectnumber 158228

#158228 In llvm/llvm-project;

· arsenm opened on Sep 12, 2025

CodeGen: Remove TRI argument from getRegClass

backend:AArch64

backend:AMDGPU

backend:ARC

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

backend:Xtensa

Status: Open (in progress).

llvm/llvm-projectnumber 158225

#158225 In llvm/llvm-project;

· arsenm opened on Sep 12, 2025

CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo

backend:AArch64

backend:AMDGPU

backend:ARC

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

backend:Xtensa

Status: Open (in progress).

llvm/llvm-projectnumber 158224

#158224 In llvm/llvm-project;

· arsenm opened on Sep 12, 2025

[SelectionDAG] Verify SDTCisVT and SDTCVecEltisVT constraints

backend:AArch64

backend:m68k

backend:RISC-V

backend:Sparc

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

tablegen

Status: Open (in progress).

llvm/llvm-projectnumber 150125

#150125 In llvm/llvm-project;

· s-barannikov opened on Jul 22, 2025

[CMake] Move common target dependencies into ${TARGET_LIBRARIES}

backend:AArch64

backend:AMDGPU

backend:ARC

backend:ARM

backend:CSKY

backend:DirectX

backend:Hexagon

backend:Lanai

backend:loongarch

backend:m68k

backend:MSP430

backend:NVPTX

backend:PowerPC

backend:Sparc

backend:SPIR-V

backend:SystemZ

backend:WebAssembly

backend:X86

Status: Open (in progress).

llvm/llvm-projectnumber 141271

#141271 In llvm/llvm-project;

· CBSears opened on May 23, 2025

[SPARC] llvm-objdump doesn't recognize V9 instructions in 32-bit SPARC object files

backend:Sparc

tools:llvm-objdump

Status: Open.

#122195 In llvm/llvm-project;

· koachan opened on Jan 8, 2025

[SPARC] Asan test failure in TestCases/alloca_vla_interact.cpp

backend:Sparc

compiler-rt:asanAddress sanitizerAddress sanitizer

Status: Open.

#110956 In llvm/llvm-project;

· koachan opened on Oct 3, 2024

ContinuousSyncMode/runtime-counter-relocation.c etc. FAIL on 32-bit SPARC

backend:Sparc

PGOProfile Guided OptimizationsProfile Guided Optimizations

test-suite

Status: Open.

#101667 In llvm/llvm-project;

· rorth opened on Aug 2, 2024