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qualcommax: ipq8074-nss clean up spacing
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‎target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nss.dtsi

Lines changed: 93 additions & 94 deletions
Original file line numberDiff line numberDiff line change
@@ -22,57 +22,57 @@
2222
nss0: nss@40000000 {
2323
compatible = "qcom,nss";
2424
interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
25-
<GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
26-
<GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
27-
<GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
28-
<GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
29-
<GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
30-
<GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
31-
<GIC_SPI 384 IRQ_TYPE_EDGE_RISING>,
32-
<GIC_SPI 385 IRQ_TYPE_EDGE_RISING>,
33-
<GIC_SPI 386 IRQ_TYPE_EDGE_RISING>;
25+
<GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
26+
<GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
27+
<GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
28+
<GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
29+
<GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
30+
<GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
31+
<GIC_SPI 384 IRQ_TYPE_EDGE_RISING>,
32+
<GIC_SPI 385 IRQ_TYPE_EDGE_RISING>,
33+
<GIC_SPI 386 IRQ_TYPE_EDGE_RISING>;
3434
reg = <0x39000000 0x1000>,
3535
<0x38000000 0x30000>,
3636
<0x0b111000 0x1000>;
3737
reg-names = "nphys", "vphys", "qgic-phys";
3838
clocks = <&gcc GCC_NSS_NOC_CLK>,
39-
<&gcc GCC_NSS_PTP_REF_CLK>,
40-
<&gcc GCC_NSS_CSR_CLK>,
41-
<&gcc GCC_NSS_CFG_CLK>,
42-
<&gcc GCC_NSS_IMEM_CLK>,
43-
<&gcc GCC_NSSNOC_QOSGEN_REF_CLK>,
44-
<&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
45-
<&gcc GCC_NSSNOC_SNOC_CLK>,
46-
<&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>,
47-
<&gcc GCC_NSS_CE_AXI_CLK>,
48-
<&gcc GCC_NSS_CE_APB_CLK>,
49-
<&gcc GCC_NSSNOC_CE_AXI_CLK>,
50-
<&gcc GCC_NSSNOC_CE_APB_CLK>,
51-
<&gcc GCC_NSSNOC_UBI0_AHB_CLK>,
52-
<&gcc GCC_UBI0_CORE_CLK>,
53-
<&gcc GCC_UBI0_AHB_CLK>,
54-
<&gcc GCC_UBI0_AXI_CLK>,
55-
<&gcc GCC_UBI0_MPT_CLK>,
56-
<&gcc GCC_UBI0_NC_AXI_CLK>;
39+
<&gcc GCC_NSS_PTP_REF_CLK>,
40+
<&gcc GCC_NSS_CSR_CLK>,
41+
<&gcc GCC_NSS_CFG_CLK>,
42+
<&gcc GCC_NSS_IMEM_CLK>,
43+
<&gcc GCC_NSSNOC_QOSGEN_REF_CLK>,
44+
<&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
45+
<&gcc GCC_NSSNOC_SNOC_CLK>,
46+
<&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>,
47+
<&gcc GCC_NSS_CE_AXI_CLK>,
48+
<&gcc GCC_NSS_CE_APB_CLK>,
49+
<&gcc GCC_NSSNOC_CE_AXI_CLK>,
50+
<&gcc GCC_NSSNOC_CE_APB_CLK>,
51+
<&gcc GCC_NSSNOC_UBI0_AHB_CLK>,
52+
<&gcc GCC_UBI0_CORE_CLK>,
53+
<&gcc GCC_UBI0_AHB_CLK>,
54+
<&gcc GCC_UBI0_AXI_CLK>,
55+
<&gcc GCC_UBI0_MPT_CLK>,
56+
<&gcc GCC_UBI0_NC_AXI_CLK>;
5757
clock-names = "nss-noc-clk",
58-
"nss-ptp-ref-clk",
59-
"nss-csr-clk",
60-
"nss-cfg-clk",
61-
"nss-imem-clk",
62-
"nss-nssnoc-qosgen-ref-clk",
63-
"nss-mem-noc-nss-axi-clk",
64-
"nss-nssnoc-snoc-clk",
65-
"nss-nssnoc-timeout-ref-clk",
66-
"nss-ce-axi-clk",
67-
"nss-ce-apb-clk",
68-
"nss-nssnoc-ce-axi-clk",
69-
"nss-nssnoc-ce-apb-clk",
70-
"nss-nssnoc-ahb-clk",
71-
"nss-core-clk",
72-
"nss-ahb-clk",
73-
"nss-axi-clk",
74-
"nss-mpt-clk",
75-
"nss-nc-axi-clk";
58+
"nss-ptp-ref-clk",
59+
"nss-csr-clk",
60+
"nss-cfg-clk",
61+
"nss-imem-clk",
62+
"nss-nssnoc-qosgen-ref-clk",
63+
"nss-mem-noc-nss-axi-clk",
64+
"nss-nssnoc-snoc-clk",
65+
"nss-nssnoc-timeout-ref-clk",
66+
"nss-ce-axi-clk",
67+
"nss-ce-apb-clk",
68+
"nss-nssnoc-ce-axi-clk",
69+
"nss-nssnoc-ce-apb-clk",
70+
"nss-nssnoc-ahb-clk",
71+
"nss-core-clk",
72+
"nss-ahb-clk",
73+
"nss-axi-clk",
74+
"nss-mpt-clk",
75+
"nss-nc-axi-clk";
7676
qcom,id = <0>;
7777
qcom,num-queue = <4>;
7878
qcom,num-irq = <10>;
@@ -113,56 +113,56 @@
113113
nss1: nss@40800000 {
114114
compatible = "qcom,nss";
115115
interrupts = <GIC_SPI 390 IRQ_TYPE_EDGE_RISING>,
116-
<GIC_SPI 391 IRQ_TYPE_EDGE_RISING>,
117-
<GIC_SPI 392 IRQ_TYPE_EDGE_RISING>,
118-
<GIC_SPI 393 IRQ_TYPE_EDGE_RISING>,
119-
<GIC_SPI 394 IRQ_TYPE_EDGE_RISING>,
120-
<GIC_SPI 395 IRQ_TYPE_EDGE_RISING>,
121-
<GIC_SPI 396 IRQ_TYPE_EDGE_RISING>,
122-
<GIC_SPI 397 IRQ_TYPE_EDGE_RISING>,
123-
<GIC_SPI 398 IRQ_TYPE_EDGE_RISING>;
116+
<GIC_SPI 391 IRQ_TYPE_EDGE_RISING>,
117+
<GIC_SPI 392 IRQ_TYPE_EDGE_RISING>,
118+
<GIC_SPI 393 IRQ_TYPE_EDGE_RISING>,
119+
<GIC_SPI 394 IRQ_TYPE_EDGE_RISING>,
120+
<GIC_SPI 395 IRQ_TYPE_EDGE_RISING>,
121+
<GIC_SPI 396 IRQ_TYPE_EDGE_RISING>,
122+
<GIC_SPI 397 IRQ_TYPE_EDGE_RISING>,
123+
<GIC_SPI 398 IRQ_TYPE_EDGE_RISING>;
124124
reg = <0x39400000 0x1000>,
125125
<0x38030000 0x30000>,
126126
<0x0b111000 0x1000>;
127127
reg-names = "nphys", "vphys", "qgic-phys";
128128
clocks = <&gcc GCC_NSS_NOC_CLK>,
129-
<&gcc GCC_NSS_PTP_REF_CLK>,
130-
<&gcc GCC_NSS_CSR_CLK>,
131-
<&gcc GCC_NSS_CFG_CLK>,
132-
<&gcc GCC_NSS_IMEM_CLK>,
133-
<&gcc GCC_NSSNOC_QOSGEN_REF_CLK>,
134-
<&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
135-
<&gcc GCC_NSSNOC_SNOC_CLK>,
136-
<&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>,
137-
<&gcc GCC_NSS_CE_AXI_CLK>,
138-
<&gcc GCC_NSS_CE_APB_CLK>,
139-
<&gcc GCC_NSSNOC_CE_AXI_CLK>,
140-
<&gcc GCC_NSSNOC_CE_APB_CLK>,
141-
<&gcc GCC_NSSNOC_UBI1_AHB_CLK>,
142-
<&gcc GCC_UBI1_CORE_CLK>,
143-
<&gcc GCC_UBI1_AHB_CLK>,
144-
<&gcc GCC_UBI1_AXI_CLK>,
145-
<&gcc GCC_UBI1_MPT_CLK>,
146-
<&gcc GCC_UBI1_NC_AXI_CLK>;
129+
<&gcc GCC_NSS_PTP_REF_CLK>,
130+
<&gcc GCC_NSS_CSR_CLK>,
131+
<&gcc GCC_NSS_CFG_CLK>,
132+
<&gcc GCC_NSS_IMEM_CLK>,
133+
<&gcc GCC_NSSNOC_QOSGEN_REF_CLK>,
134+
<&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
135+
<&gcc GCC_NSSNOC_SNOC_CLK>,
136+
<&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>,
137+
<&gcc GCC_NSS_CE_AXI_CLK>,
138+
<&gcc GCC_NSS_CE_APB_CLK>,
139+
<&gcc GCC_NSSNOC_CE_AXI_CLK>,
140+
<&gcc GCC_NSSNOC_CE_APB_CLK>,
141+
<&gcc GCC_NSSNOC_UBI1_AHB_CLK>,
142+
<&gcc GCC_UBI1_CORE_CLK>,
143+
<&gcc GCC_UBI1_AHB_CLK>,
144+
<&gcc GCC_UBI1_AXI_CLK>,
145+
<&gcc GCC_UBI1_MPT_CLK>,
146+
<&gcc GCC_UBI1_NC_AXI_CLK>;
147147
clock-names = "nss-noc-clk",
148-
"nss-ptp-ref-clk",
149-
"nss-csr-clk",
150-
"nss-cfg-clk",
151-
"nss-imem-clk",
152-
"nss-nssnoc-qosgen-ref-clk",
153-
"nss-mem-noc-nss-axi-clk",
154-
"nss-nssnoc-snoc-clk",
155-
"nss-nssnoc-timeout-ref-clk",
156-
"nss-ce-axi-clk",
157-
"nss-ce-apb-clk",
158-
"nss-nssnoc-ce-axi-clk",
159-
"nss-nssnoc-ce-apb-clk",
160-
"nss-nssnoc-ahb-clk",
161-
"nss-core-clk",
162-
"nss-ahb-clk",
163-
"nss-axi-clk",
164-
"nss-mpt-clk",
165-
"nss-nc-axi-clk";
148+
"nss-ptp-ref-clk",
149+
"nss-csr-clk",
150+
"nss-cfg-clk",
151+
"nss-imem-clk",
152+
"nss-nssnoc-qosgen-ref-clk",
153+
"nss-mem-noc-nss-axi-clk",
154+
"nss-nssnoc-snoc-clk",
155+
"nss-nssnoc-timeout-ref-clk",
156+
"nss-ce-axi-clk",
157+
"nss-ce-apb-clk",
158+
"nss-nssnoc-ce-axi-clk",
159+
"nss-nssnoc-ce-apb-clk",
160+
"nss-nssnoc-ahb-clk",
161+
"nss-core-clk",
162+
"nss-ahb-clk",
163+
"nss-axi-clk",
164+
"nss-mpt-clk",
165+
"nss-nc-axi-clk";
166166
qcom,id = <1>;
167167
qcom,num-queue = <4>;
168168
qcom,num-irq = <9>;
@@ -192,11 +192,11 @@
192192
reg-names = "crypto_pbase";
193193
reg = <0x39800000 0x7ffff>;
194194
clocks = <&gcc GCC_NSS_CRYPTO_CLK>,
195-
<&gcc GCC_NSSNOC_CRYPTO_CLK>,
196-
<&gcc GCC_CRYPTO_PPE_CLK>;
195+
<&gcc GCC_NSSNOC_CRYPTO_CLK>,
196+
<&gcc GCC_CRYPTO_PPE_CLK>;
197197
clock-names = "crypto_clk",
198-
"crypto_nocclk",
199-
"crypto_ppeclk";
198+
"crypto_nocclk",
199+
"crypto_ppeclk";
200200
clock-frequency = /bits/ 64 <600000000 600000000 300000000>;
201201
qcom,dma-mask = <0xff>;
202202
qcom,transform-enabled;
@@ -282,5 +282,4 @@
282282
phy_addr = <0x1c>;
283283
phy_access_mode = <0x00>;
284284
};
285-
286285
};

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