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[BDCE] Regenerate test checks; NFC
llvm-svn: 350190
1 parent d4bf57b commit c5a023b

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llvm/test/Transforms/BDCE/invalidate-assumptions.ll

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
12
; RUN: opt -bdce %s -S | FileCheck %s
23

34
; The 'nuw' on the subtract allows us to deduce that %setbit is not demanded.
@@ -8,8 +9,8 @@
89

910
define i1 @PR33695(i1 %b, i8 %x) {
1011
; CHECK-LABEL: @PR33695(
11-
; CHECK-NEXT: [[SETBIT:%.*]] = or i8 %x, 64
12-
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 %b to i8
12+
; CHECK-NEXT: [[SETBIT:%.*]] = or i8 [[X:%.*]], 64
13+
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 [[B:%.*]] to i8
1314
; CHECK-NEXT: [[BIG_NUMBER:%.*]] = shl i8 0, 1
1415
; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[BIG_NUMBER]], [[LITTLE_NUMBER]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[SUB]] to i1
@@ -28,16 +29,16 @@ define i1 @PR33695(i1 %b, i8 %x) {
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define i64 @PR34037(i64 %m, i32 %r, i64 %j, i1 %b, i32 %k, i64 %p) {
3031
; CHECK-LABEL: @PR34037(
31-
; CHECK-NEXT: [[CONV:%.*]] = zext i32 %r to i64
32-
; CHECK-NEXT: [[AND:%.*]] = and i64 %m, 0
32+
; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[R:%.*]] to i64
33+
; CHECK-NEXT: [[AND:%.*]] = and i64 [[M:%.*]], 0
3334
; CHECK-NEXT: [[NEG:%.*]] = xor i64 0, 34359738367
34-
; CHECK-NEXT: [[OR:%.*]] = or i64 %j, 0
35+
; CHECK-NEXT: [[OR:%.*]] = or i64 [[J:%.*]], 0
3536
; CHECK-NEXT: [[SHL:%.*]] = shl i64 0, 29
36-
; CHECK-NEXT: [[CONV1:%.*]] = select i1 %b, i64 7, i64 0
37+
; CHECK-NEXT: [[CONV1:%.*]] = select i1 [[B:%.*]], i64 7, i64 0
3738
; CHECK-NEXT: [[SUB:%.*]] = sub i64 [[SHL]], [[CONV1]]
38-
; CHECK-NEXT: [[CONV2:%.*]] = zext i32 %k to i64
39+
; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[K:%.*]] to i64
3940
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[SUB]], [[CONV2]]
40-
; CHECK-NEXT: [[CONV4:%.*]] = and i64 %p, 65535
41+
; CHECK-NEXT: [[CONV4:%.*]] = and i64 [[P:%.*]], 65535
4142
; CHECK-NEXT: [[AND5:%.*]] = and i64 [[MUL]], [[CONV4]]
4243
; CHECK-NEXT: ret i64 [[AND5]]
4344
;
@@ -63,8 +64,8 @@ declare i1 @foo(i1)
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define i1 @poison_on_call_user_is_ok(i1 %b, i8 %x) {
6566
; CHECK-LABEL: @poison_on_call_user_is_ok(
66-
; CHECK-NEXT: [[SETBIT:%.*]] = or i8 %x, 64
67-
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 %b to i8
67+
; CHECK-NEXT: [[SETBIT:%.*]] = or i8 [[X:%.*]], 64
68+
; CHECK-NEXT: [[LITTLE_NUMBER:%.*]] = zext i1 [[B:%.*]] to i8
6869
; CHECK-NEXT: [[BIG_NUMBER:%.*]] = shl i8 0, 1
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; CHECK-NEXT: [[SUB:%.*]] = sub i8 [[BIG_NUMBER]], [[LITTLE_NUMBER]]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i8 [[SUB]] to i1
@@ -90,7 +91,7 @@ define i1 @poison_on_call_user_is_ok(i1 %b, i8 %x) {
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define void @PR34179(i32* %a) {
9293
; CHECK-LABEL: @PR34179(
93-
; CHECK-NEXT: [[T0:%.*]] = load volatile i32, i32* %a
94+
; CHECK-NEXT: [[T0:%.*]] = load volatile i32, i32* [[A:%.*]]
9495
; CHECK-NEXT: ret void
9596
;
9697
%t0 = load volatile i32, i32* %a

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