36
36
#define REG_DETECTION_THRESHOLD 0x37
37
37
#define REG_SYNC_WORD 0x39
38
38
#define REG_INVERTIQ2 0x3b
39
+ #define REG_IMAGECAL 0x3b // Modified
40
+ #define REG_TEMP 0x3c // Modified
39
41
#define REG_DIO_MAPPING_1 0x40
40
42
#define REG_VERSION 0x42
41
43
#define REG_PA_DAC 0x4d
42
44
43
45
// modes
44
46
#define MODE_LONG_RANGE_MODE 0x80
47
+ #define MODE_FSK_MODE 0x00 // Modified
45
48
#define MODE_SLEEP 0x00
46
49
#define MODE_STDBY 0x01
47
50
#define MODE_TX 0x03
48
51
#define MODE_RX_CONTINUOUS 0x05
49
52
#define MODE_RX_SINGLE 0x06
50
- #define MODE_CAD 0x07
51
53
52
54
// PA config
53
55
#define PA_BOOST 0x80
56
58
#define IRQ_TX_DONE_MASK 0x08
57
59
#define IRQ_PAYLOAD_CRC_ERROR_MASK 0x20
58
60
#define IRQ_RX_DONE_MASK 0x40
59
- #define IRQ_CAD_DONE_MASK 0x04
60
- #define IRQ_CAD_DETECTED_MASK 0x01
61
61
62
62
#define RF_MID_BAND_THRESHOLD 525E6
63
63
#define RSSI_OFFSET_HF_PORT 157
@@ -79,7 +79,6 @@ LoRaClass::LoRaClass() :
79
79
_packetIndex(0 ),
80
80
_implicitHeaderMode(0 ),
81
81
_onReceive(NULL ),
82
- _onCadDone(NULL ),
83
82
_onTxDone(NULL )
84
83
{
85
84
// overide Stream timeout value
@@ -278,14 +277,14 @@ float LoRaClass::packetSnr()
278
277
long LoRaClass::packetFrequencyError ()
279
278
{
280
279
int32_t freqError = 0 ;
281
- freqError = static_cast <int32_t >(readRegister (REG_FREQ_ERROR_MSB) & 0b111 );
280
+ freqError = static_cast <int32_t >(readRegister (REG_FREQ_ERROR_MSB) & B111 );
282
281
freqError <<= 8L ;
283
282
freqError += static_cast <int32_t >(readRegister (REG_FREQ_ERROR_MID));
284
283
freqError <<= 8L ;
285
284
freqError += static_cast <int32_t >(readRegister (REG_FREQ_ERROR_LSB));
286
285
287
- if (readRegister (REG_FREQ_ERROR_MSB) & 0b1000 ) { // Sign bit is on
288
- freqError -= 524288 ; // 0b1000 '0000'0000'0000'0000
286
+ if (readRegister (REG_FREQ_ERROR_MSB) & B1000 ) { // Sign bit is on
287
+ freqError -= 524288 ; // B1000 '0000'0000'0000'0000
289
288
}
290
289
291
290
const float fXtal = 32E6 ; // FXOSC: crystal oscillator (XTAL) frequency (2.5. Chip Specification, p. 14)
@@ -294,6 +293,29 @@ long LoRaClass::packetFrequencyError()
294
293
return static_cast <long >(fError );
295
294
}
296
295
296
+ // Modified
297
+ int LoRaClass::temperature () {
298
+ uint8_t opModeState = readRegister (REG_OP_MODE);
299
+ sleep (); // must be in sleep mode in order to switch between FSK and long range mode
300
+ writeRegister (REG_OP_MODE, MODE_FSK_MODE | MODE_SLEEP); // must be in FSK/OOK mode in order to access temp / imgage cal registers
301
+ writeRegister (REG_OP_MODE, MODE_FSK_MODE | MODE_RX_CONTINUOUS); // Temperature monitoring done in all modes except Sleep and Standby
302
+
303
+ uint8_t imgCalState = readRegister (REG_IMAGECAL);
304
+ writeRegister (REG_IMAGECAL,imgCalState &!0x01 ); // enable temperature reading
305
+ delayMicroseconds (140 );
306
+ writeRegister (REG_IMAGECAL,imgCalState | 0x01 ); // stop temperature reading
307
+ uint8_t rawTemp = readRegister (REG_TEMP);
308
+
309
+ sleep (); // restore REG_OP_MODE trough sleep
310
+ writeRegister (REG_OP_MODE, opModeState);
311
+
312
+ if ((rawTemp&0x80 )==0x80 ){ // datasheet unclear, int8_t would make more sense but this was example code
313
+ return (0xff - rawTemp);
314
+ }
315
+ return (-rawTemp);
316
+
317
+ }
318
+
297
319
int LoRaClass::rssi ()
298
320
{
299
321
return (readRegister (REG_RSSI_VALUE) - (_frequency < RF_MID_BAND_THRESHOLD ? RSSI_OFFSET_LF_PORT : RSSI_OFFSET_HF_PORT));
@@ -381,24 +403,6 @@ void LoRaClass::onReceive(void(*callback)(int))
381
403
}
382
404
}
383
405
384
- void LoRaClass::onCadDone (void (*callback)(boolean))
385
- {
386
- _onCadDone = callback;
387
-
388
- if (callback) {
389
- pinMode (_dio0, INPUT);
390
- #ifdef SPI_HAS_NOTUSINGINTERRUPT
391
- SPI.usingInterrupt (digitalPinToInterrupt (_dio0));
392
- #endif
393
- attachInterrupt (digitalPinToInterrupt (_dio0), LoRaClass::onDio0Rise, RISING);
394
- } else {
395
- detachInterrupt (digitalPinToInterrupt (_dio0));
396
- #ifdef SPI_HAS_NOTUSINGINTERRUPT
397
- SPI.notUsingInterrupt (digitalPinToInterrupt (_dio0));
398
- #endif
399
- }
400
- }
401
-
402
406
void LoRaClass::onTxDone (void (*callback)())
403
407
{
404
408
_onTxDone = callback;
@@ -432,12 +436,6 @@ void LoRaClass::receive(int size)
432
436
433
437
writeRegister (REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS);
434
438
}
435
-
436
- void LoRaClass::channelActivityDetection (void )
437
- {
438
- writeRegister (REG_DIO_MAPPING_1, 0x80 );// DIO0 => CADDONE
439
- writeRegister (REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_CAD);
440
- }
441
439
#endif
442
440
443
441
void LoRaClass::idle ()
@@ -724,11 +722,7 @@ void LoRaClass::handleDio0Rise()
724
722
// clear IRQ's
725
723
writeRegister (REG_IRQ_FLAGS, irqFlags);
726
724
727
- if ((irqFlags & IRQ_CAD_DONE_MASK) != 0 ) {
728
- if (_onCadDone) {
729
- _onCadDone ((irqFlags & IRQ_CAD_DETECTED_MASK) != 0 );
730
- }
731
- } else if ((irqFlags & IRQ_PAYLOAD_CRC_ERROR_MASK) == 0 ) {
725
+ if ((irqFlags & IRQ_PAYLOAD_CRC_ERROR_MASK) == 0 ) {
732
726
733
727
if ((irqFlags & IRQ_RX_DONE_MASK) != 0 ) {
734
728
// received a packet
@@ -743,7 +737,8 @@ void LoRaClass::handleDio0Rise()
743
737
if (_onReceive) {
744
738
_onReceive (packetLength);
745
739
}
746
- } else if ((irqFlags & IRQ_TX_DONE_MASK) != 0 ) {
740
+ }
741
+ else if ((irqFlags & IRQ_TX_DONE_MASK) != 0 ) {
747
742
if (_onTxDone) {
748
743
_onTxDone ();
749
744
}
@@ -765,13 +760,15 @@ uint8_t LoRaClass::singleTransfer(uint8_t address, uint8_t value)
765
760
{
766
761
uint8_t response;
767
762
768
- _spi->beginTransaction (_spiSettings);
769
763
digitalWrite (_ss, LOW);
764
+
765
+ _spi->beginTransaction (_spiSettings);
770
766
_spi->transfer (address);
771
767
response = _spi->transfer (value);
772
- digitalWrite (_ss, HIGH);
773
768
_spi->endTransaction ();
774
769
770
+ digitalWrite (_ss, HIGH);
771
+
775
772
return response;
776
773
}
777
774
0 commit comments