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ALCHA aims to reduce FPGA project develop time by means of automation and abstraction, but without loosing the low-level control that HDLs, such as Verilog, provides.
It will support an object oriented programming model, abstract data and signal types, and compile-time scripting.
a new concept for programing:
new syntax and a new way of coding source files.
not bytecode or any typical implementation for vm.
in fact, it encodes functions and keywords for a smaller code, which is good for small devices and embebbed devices. small code, small size, RUN faster.