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| 1 | +# dump-diff |
| 2 | + |
| 3 | +Crude diff tools for assembly binary blobs |
| 4 | + |
| 5 | +## usage |
| 6 | + |
| 7 | +```console |
| 8 | +Usage: dump-diff [OPTIONS] --target <TARGET> --current <CURRENT> --addr <ADDR> --arch <ARCH> --mode <MODE> |
| 9 | + |
| 10 | +Options: |
| 11 | + -t, --target <TARGET> Target |
| 12 | + -c, --current <CURRENT> Current |
| 13 | + -x, --addr <ADDR> Address |
| 14 | + -a, --arch <ARCH> Architecture |
| 15 | + -m, --mode <MODE> Mode |
| 16 | + -e, --endianness <ENDIANNESS> Endianness |
| 17 | + -h, --help Print help |
| 18 | +``` |
| 19 | + |
| 20 | +- TARGET: the target binary |
| 21 | +- CURRENT: your current compiled code |
| 22 | +- ADDR: the (virtual) memory address where the code is located at. |
| 23 | +- ARCH: the [architecture](https://docs.rs/capstone/latest/capstone/enum.Arch.html) |
| 24 | +- MODE: the [mode](https://docs.rs/capstone/latest/capstone/enum.Mode.html) |
| 25 | +- ENDIANNESS: big or little (defaults: little) |
| 26 | + |
| 27 | +⚠️ WARNING ⚠️ The tool doesn't check the arch/mode tuple, so you can ask for ARM64 + RiscV64 (and it will panic). |
| 28 | + |
| 29 | +## Example |
| 30 | + |
| 31 | +```console |
| 32 | +$ dump-diff -t target.bin -c current.bin -x 0x821843e8 -a ppc -m mode32 -e big |
| 33 | +mflr r12 mflr r12 |
| 34 | +stw r12, -8(r1) stw r12, -8(r1) |
| 35 | +std r30, -0x18(r1) std r30, -0x18(r1) |
| 36 | +std r31, -0x10(r1) std r31, -0x10(r1) |
| 37 | +stfd f31, -0x20(r1) stfd f31, -0x20(r1) |
| 38 | +stwu r1, -0x80(r1) stwu r1, -0x80(r1) |
| 39 | +lfs f31, 0x54(r3) mr r31, r3 <=========== |
| 40 | +mr r31, r3 mr r30, r4 <=========== |
| 41 | +mr r30, r4 lfs f31, 0x54(r31) <=========== |
| 42 | +bl 0x8210fb68 bl 0x8210fb68 |
| 43 | +extsh r11, r30 extsh r11, r30 |
| 44 | +lis r10, -0x7dff lis r10, -0x7dff |
| 45 | +std r11, 0x50(r1) std r11, 0x50(r1) |
| 46 | +lfd f0, 0x50(r1) lfd f0, 0x50(r1) |
| 47 | +fcfid f0, f0 fcfid f0, f0 |
| 48 | +lis r9, -0x7e00 lis r9, -0x7e00 |
| 49 | +frsp f12, f0 frsp f12, f0 |
| 50 | +lfd f0, -0x3fb0(r10) lfd f0, -0x3fb0(r10) |
| 51 | +lfs f13, 0x1580(r9) lfs f13, 0x1580(r9) |
| 52 | +fmuls f12, f1, f12 fmuls f12, f1, f12 |
| 53 | +fmsub f0, f12, f0, f31 fnmsub f0, f12, f0, f31 <=========== |
| 54 | +frsp f0, f0 frsp f0, f0 |
| 55 | +fcmpu cr6, f0, f13 fcmpu cr6, f0, f13 |
| 56 | +blt cr6, 0x82184450 blt cr6, 0x82184450 |
| 57 | +fsubs f0, f0, f13 fsubs f0, f0, f13 |
| 58 | +b 0x82184464 b 0x82184464 |
| 59 | +lis r11, -0x7e00 lis r11, -0x7e00 |
| 60 | +lfs f12, 0x7a0(r11) lfs f12, 0x7a0(r11) |
| 61 | +fcmpu cr6, f0, f12 fcmpu cr6, f0, f12 |
| 62 | +bge cr6, 0x82184464 bge cr6, 0x82184464 |
| 63 | +fadds f0, f0, f13 fadds f0, f0, f13 |
| 64 | +stfs f0, 0x54(r31) stfs f0, 0x54(r31) |
| 65 | +addi r1, r1, 0x80 addi r1, r1, 0x80 |
| 66 | +lwz r12, -8(r1) lwz r12, -8(r1) |
| 67 | +mtlr r12 mtlr r12 |
| 68 | +lfd f31, -0x20(r1) lfd f31, -0x20(r1) |
| 69 | +ld r30, -0x18(r1) ld r30, -0x18(r1) |
| 70 | +ld r31, -0x10(r1) ld r31, -0x10(r1) |
| 71 | +blr blr |
| 72 | +``` |
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