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Fixed a bug with ihx writing. Writes must start on an even address so put a 0xFF padding byte in front when writing an odd address.
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-4
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+12
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src/intel_hex.c

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -115,12 +115,20 @@ void ihx_write(char line[]) {
115115

116116
switch (record_type) {
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case IHX_RECORD_DATA:
118+
buff[0] = 0xFF; // Padding in case the flash start address is not even.
118119
for (i=0; i<byte_count; i++)
119-
buff[i] = hex8(&line[9 + i*2]);
120-
buff[byte_count] = 0xFF; // If there are not an even no. of bytes, pad with 0xFF to preserve flash.
120+
buff[i+1] = hex8(&line[9 + i*2]);
121+
buff[byte_count+1] = 0xFF; // If there are not an even no. of bytes, pad with 0xFF to preserve flash.
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122-
// (byte_count+1)/2 == number of 16-bit words to transfer, rounded up
123-
flash_check_erase_and_write((uint16_t*)buff, (byte_count+1)/2, address);
123+
if (address & 1) {
124+
// Odd start address
125+
// (byte_count+1)/2 == number of 16-bit words to transfer, rounded up
126+
flash_check_erase_and_write((uint16_t*)buff, (byte_count+2)/2, address-1);
127+
} else {
128+
// Even start address
129+
// (byte_count+1)/2 == number of 16-bit words to transfer, rounded up
130+
flash_check_erase_and_write((uint16_t*)(buff+1), (byte_count+1)/2, address);
131+
}
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break;
126134
case IHX_RECORD_EOF:

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