@@ -807,16 +807,29 @@ void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assemble
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__ mov (tmp1, res);
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__ shrptr (tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint ());
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__ movptr (tmp2, (intptr_t ) ShenandoahHeap::in_cset_fast_test_addr ());
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+ #ifdef _LP64
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__ movbool (tmp2, Address (tmp2, tmp1, Address::times_1));
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__ testbool (tmp2);
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+ #else
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+ // On x86_32, C1 register allocator can give us the register without 8-bit support.
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+ // Do the full-register access and test to avoid compilation failures.
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+ __ movptr (tmp2, Address (tmp2, tmp1, Address::times_1));
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+ __ testptr (tmp2, 0xFF );
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+ #endif
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__ jcc (Assembler::zero, *stub->continuation ());
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// Test if object is resolved.
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__ movptr (tmp1, Address (res, oopDesc::mark_offset_in_bytes ()));
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// Test if both lowest bits are set. We trick it by negating the bits
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// then test for both bits clear.
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__ notptr (tmp1);
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+ #ifdef _LP64
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__ testb (tmp1, markOopDesc::marked_value);
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+ #else
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+ // On x86_32, C1 register allocator can give us the register without 8-bit support.
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+ // Do the full-register access and test to avoid compilation failures.
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+ __ testptr (tmp1, markOopDesc::marked_value);
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+ #endif
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__ jccb (Assembler::notZero, slow_path);
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// Clear both lower bits. It's still inverted, so set them, and then invert back.
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__ orptr (tmp1, markOopDesc::marked_value);
@@ -898,8 +911,8 @@ void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_s
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// arg0 : object to be resolved
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__ save_live_registers_no_oop_map (true );
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- __ load_parameter (0 , c_rarg0);
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- __ call_VM_leaf (CAST_FROM_FN_PTR (address, ShenandoahRuntime::load_reference_barrier), c_rarg0);
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+ __ load_parameter (0 , LP64_ONLY ( c_rarg0) NOT_LP64 (rax) );
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+ __ call_VM_leaf (CAST_FROM_FN_PTR (address, ShenandoahRuntime::load_reference_barrier), LP64_ONLY ( c_rarg0) NOT_LP64 (rax) );
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__ restore_live_registers_except_rax (true );
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__ epilogue ();
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