Skip to content

Commit e8e4398

Browse files
jgunthorpewilldeacon
authored andcommitted
iommu/arm-smmu-v3: Add a type for the CD entry
Instead of passing a naked __le16 * around to represent a CD table entry wrap it in a "struct arm_smmu_cd" with an array of the correct size. This makes it much clearer which functions will comprise the "CD API". Tested-by: Nicolin Chen <[email protected]> Tested-by: Shameer Kolothum <[email protected]> Reviewed-by: Michael Shavit <[email protected]> Reviewed-by: Moritz Fischer <[email protected]> Reviewed-by: Nicolin Chen <[email protected]> Reviewed-by: Mostafa Saleh <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
1 parent 86e5ca0 commit e8e4398

File tree

2 files changed

+17
-10
lines changed

2 files changed

+17
-10
lines changed

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1209,7 +1209,8 @@ static void arm_smmu_write_cd_l1_desc(__le64 *dst,
12091209
WRITE_ONCE(*dst, cpu_to_le64(val));
12101210
}
12111211

1212-
static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid)
1212+
static struct arm_smmu_cd *arm_smmu_get_cd_ptr(struct arm_smmu_master *master,
1213+
u32 ssid)
12131214
{
12141215
__le64 *l1ptr;
12151216
unsigned int idx;
@@ -1218,7 +1219,8 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid)
12181219
struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table;
12191220

12201221
if (cd_table->s1fmt == STRTAB_STE_0_S1FMT_LINEAR)
1221-
return cd_table->cdtab + ssid * CTXDESC_CD_DWORDS;
1222+
return (struct arm_smmu_cd *)(cd_table->cdtab +
1223+
ssid * CTXDESC_CD_DWORDS);
12221224

12231225
idx = ssid >> CTXDESC_SPLIT;
12241226
l1_desc = &cd_table->l1_desc[idx];
@@ -1232,7 +1234,7 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, u32 ssid)
12321234
arm_smmu_sync_cd(master, ssid, false);
12331235
}
12341236
idx = ssid & (CTXDESC_L2_ENTRIES - 1);
1235-
return l1_desc->l2ptr + idx * CTXDESC_CD_DWORDS;
1237+
return &l1_desc->l2ptr[idx];
12361238
}
12371239

12381240
int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
@@ -1251,7 +1253,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
12511253
*/
12521254
u64 val;
12531255
bool cd_live;
1254-
__le64 *cdptr;
1256+
struct arm_smmu_cd *cdptr;
12551257
struct arm_smmu_ctx_desc_cfg *cd_table = &master->cd_table;
12561258
struct arm_smmu_device *smmu = master->smmu;
12571259

@@ -1262,7 +1264,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
12621264
if (!cdptr)
12631265
return -ENOMEM;
12641266

1265-
val = le64_to_cpu(cdptr[0]);
1267+
val = le64_to_cpu(cdptr->data[0]);
12661268
cd_live = !!(val & CTXDESC_CD_0_V);
12671269

12681270
if (!cd) { /* (5) */
@@ -1279,9 +1281,9 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
12791281
* this substream's traffic
12801282
*/
12811283
} else { /* (1) and (2) */
1282-
cdptr[1] = cpu_to_le64(cd->ttbr & CTXDESC_CD_1_TTB0_MASK);
1283-
cdptr[2] = 0;
1284-
cdptr[3] = cpu_to_le64(cd->mair);
1284+
cdptr->data[1] = cpu_to_le64(cd->ttbr & CTXDESC_CD_1_TTB0_MASK);
1285+
cdptr->data[2] = 0;
1286+
cdptr->data[3] = cpu_to_le64(cd->mair);
12851287

12861288
/*
12871289
* STE may be live, and the SMMU might read dwords of this CD in any
@@ -1313,7 +1315,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
13131315
* field within an aligned 64-bit span of a structure can be altered
13141316
* without first making the structure invalid.
13151317
*/
1316-
WRITE_ONCE(cdptr[0], cpu_to_le64(val));
1318+
WRITE_ONCE(cdptr->data[0], cpu_to_le64(val));
13171319
arm_smmu_sync_cd(master, ssid, true);
13181320
return 0;
13191321
}

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -283,6 +283,11 @@ struct arm_smmu_ste {
283283
#define CTXDESC_L1_DESC_L2PTR_MASK GENMASK_ULL(51, 12)
284284

285285
#define CTXDESC_CD_DWORDS 8
286+
287+
struct arm_smmu_cd {
288+
__le64 data[CTXDESC_CD_DWORDS];
289+
};
290+
286291
#define CTXDESC_CD_0_TCR_T0SZ GENMASK_ULL(5, 0)
287292
#define CTXDESC_CD_0_TCR_TG0 GENMASK_ULL(7, 6)
288293
#define CTXDESC_CD_0_TCR_IRGN0 GENMASK_ULL(9, 8)
@@ -592,7 +597,7 @@ struct arm_smmu_ctx_desc {
592597
};
593598

594599
struct arm_smmu_l1_ctx_desc {
595-
__le64 *l2ptr;
600+
struct arm_smmu_cd *l2ptr;
596601
dma_addr_t l2ptr_dma;
597602
};
598603

0 commit comments

Comments
 (0)