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dwc_otg_attr.c

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00001 /* ==========================================================================
00002  * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.c $
00003  * $Revision: #44 $
00004  * $Date: 2010/11/29 $
00005  * $Change: 1636033 $
00006  *
00007  * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
00008  * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
00009  * otherwise expressly agreed to in writing between Synopsys and you.
00010  *
00011  * The Software IS NOT an item of Licensed Software or Licensed Product under
00012  * any End User Software License Agreement or Agreement for Licensed Product
00013  * with Synopsys or any supplement thereto. You are permitted to use and
00014  * redistribute this Software in source and binary forms, with or without
00015  * modification, provided that redistributions of source code must retain this
00016  * notice. You may not view, use, disclose, copy or distribute this file or
00017  * any information contained herein except pursuant to this license grant from
00018  * Synopsys. If you do not agree with this notice, including the disclaimer
00019  * below, then you are not authorized to use the Software.
00020  *
00021  * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
00022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00024  * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
00025  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00026  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00027  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00028  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00029  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00030  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
00031  * DAMAGE.
00032  * ========================================================================== */
00033 
00311 #include "dwc_otg_os_dep.h"
00312 #include "dwc_os.h"
00313 #include "dwc_otg_driver.h"
00314 #include "dwc_otg_attr.h"
00315 #include "dwc_otg_core_if.h"
00316 #include "dwc_otg_pcd_if.h"
00317 #include "dwc_otg_hcd_if.h"
00318 
00319 /*
00320  * MACROs for defining sysfs attribute
00321  */
00322 #ifdef LM_INTERFACE
00323 
00324 #define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
00325 static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
00326 { \
00327         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
00328         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);             \
00329         uint32_t val; \
00330         val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
00331         return sprintf (buf, "%s = 0x%x\n", _string_, val); \
00332 }
00333 #define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
00334 static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
00335                                         const char *buf, size_t count) \
00336 { \
00337         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
00338         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \
00339         uint32_t set = simple_strtoul(buf, NULL, 16); \
00340         dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\
00341         return count; \
00342 }
00343 
00344 #elif defined(PCI_INTERFACE)
00345 
00346 #define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
00347 static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
00348 { \
00349         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);      \
00350         uint32_t val; \
00351         val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
00352         return sprintf (buf, "%s = 0x%x\n", _string_, val); \
00353 }
00354 #define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
00355 static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
00356                                         const char *buf, size_t count) \
00357 { \
00358         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);  \
00359         uint32_t set = simple_strtoul(buf, NULL, 16); \
00360         dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\
00361         return count; \
00362 }
00363 
00364 #endif
00365 
00366 /*
00367  * MACROs for defining sysfs attribute for 32-bit registers
00368  */
00369 #ifdef LM_INTERFACE
00370 #define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
00371 static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
00372 { \
00373         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
00374         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \
00375         uint32_t val; \
00376         val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
00377         return sprintf (buf, "%s = 0x%08x\n", _string_, val); \
00378 }
00379 #define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
00380 static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
00381                                         const char *buf, size_t count) \
00382 { \
00383         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \
00384         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \
00385         uint32_t val = simple_strtoul(buf, NULL, 16); \
00386         dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \
00387         return count; \
00388 }
00389 #elif defined(PCI_INTERFACE)
00390 #define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
00391 static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
00392 { \
00393         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);  \
00394         uint32_t val; \
00395         val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
00396         return sprintf (buf, "%s = 0x%08x\n", _string_, val); \
00397 }
00398 #define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
00399 static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
00400                                         const char *buf, size_t count) \
00401 { \
00402         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);  \
00403         uint32_t val = simple_strtoul(buf, NULL, 16); \
00404         dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \
00405         return count; \
00406 }
00407 
00408 #endif
00409 
00410 #define DWC_OTG_DEVICE_ATTR_BITFIELD_RW(_otg_attr_name_,_string_) \
00411 DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
00412 DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
00413 DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store);
00414 
00415 #define DWC_OTG_DEVICE_ATTR_BITFIELD_RO(_otg_attr_name_,_string_) \
00416 DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
00417 DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL);
00418 
00419 #define DWC_OTG_DEVICE_ATTR_REG32_RW(_otg_attr_name_,_addr_,_string_) \
00420 DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
00421 DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
00422 DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store);
00423 
00424 #define DWC_OTG_DEVICE_ATTR_REG32_RO(_otg_attr_name_,_addr_,_string_) \
00425 DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
00426 DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL);
00427 
00434 static ssize_t regoffset_show(struct device *_dev,
00435                               struct device_attribute *attr, char *buf)
00436 {
00437 #ifdef LM_INTERFACE
00438         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00439         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00440 #elif defined(PCI_INTERFACE)
00441         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00442 #endif
00443 
00444         return snprintf(buf, sizeof("0xFFFFFFFF\n") + 1, "0x%08x\n",
00445                         otg_dev->os_dep.reg_offset);
00446 }
00447 
00451 static ssize_t regoffset_store(struct device *_dev,
00452                                struct device_attribute *attr,
00453                                const char *buf, size_t count)
00454 {
00455 #ifdef LM_INTERFACE
00456         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00457         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00458 #elif defined(PCI_INTERFACE)
00459         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00460 #endif
00461 
00462         uint32_t offset = simple_strtoul(buf, NULL, 16);
00463 #ifdef LM_INTERFACE
00464         if (offset < SZ_256K) {
00465 #elif  defined(PCI_INTERFACE)
00466         if (offset < 0x00040000) {
00467 #endif
00468                 otg_dev->os_dep.reg_offset = offset;
00469         } else {
00470                 dev_err(_dev, "invalid offset\n");
00471         }
00472 
00473         return count;
00474 }
00475 
00476 DEVICE_ATTR(regoffset, S_IRUGO | S_IWUSR, regoffset_show, regoffset_store);
00477 
00482 static ssize_t regvalue_show(struct device *_dev,
00483                              struct device_attribute *attr, char *buf)
00484 {
00485 #ifdef LM_INTERFACE
00486         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00487         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00488 #elif defined(PCI_INTERFACE)
00489         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00490 #endif
00491 
00492         uint32_t val;
00493         volatile uint32_t *addr;
00494 
00495         if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
00496                 /* Calculate the address */
00497                 addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
00498                                      (uint8_t *) otg_dev->os_dep.base);
00499                 val = DWC_READ_REG32(addr);
00500                 return snprintf(buf,
00501                                 sizeof("Reg@0xFFFFFFFF = 0xFFFFFFFF\n") + 1,
00502                                 "Reg@0x%06x = 0x%08x\n", otg_dev->os_dep.reg_offset,
00503                                 val);
00504         } else {
00505                 dev_err(_dev, "Invalid offset (0x%0x)\n", otg_dev->os_dep.reg_offset);
00506                 return sprintf(buf, "invalid offset\n");
00507         }
00508 }
00509 
00515 static ssize_t regvalue_store(struct device *_dev,
00516                               struct device_attribute *attr,
00517                               const char *buf, size_t count)
00518 {
00519 #ifdef LM_INTERFACE
00520         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00521         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00522 #elif defined(PCI_INTERFACE)
00523         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00524 #endif
00525 
00526         volatile uint32_t *addr;
00527         uint32_t val = simple_strtoul(buf, NULL, 16);
00528         //dev_dbg(_dev, "Offset=0x%08x Val=0x%08x\n", otg_dev->reg_offset, val);
00529         if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
00530                 /* Calculate the address */
00531                 addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
00532                                      (uint8_t *) otg_dev->os_dep.base);
00533                 DWC_WRITE_REG32(addr, val);
00534         } else {
00535                 dev_err(_dev, "Invalid Register Offset (0x%08x)\n",
00536                         otg_dev->os_dep.reg_offset);
00537         }
00538         return count;
00539 }
00540 
00541 DEVICE_ATTR(regvalue, S_IRUGO | S_IWUSR, regvalue_show, regvalue_store);
00542 
00543 /*
00544  * Attributes
00545  */
00546 DWC_OTG_DEVICE_ATTR_BITFIELD_RO(mode, "Mode");
00547 DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hnpcapable, "HNPCapable");
00548 DWC_OTG_DEVICE_ATTR_BITFIELD_RW(srpcapable, "SRPCapable");
00549 DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hsic_connect, "HSIC Connect");
00550 DWC_OTG_DEVICE_ATTR_BITFIELD_RW(inv_sel_hsic, "Invert Select HSIC");
00551 
00552 //DWC_OTG_DEVICE_ATTR_BITFIELD_RW(buspower,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode");
00553 //DWC_OTG_DEVICE_ATTR_BITFIELD_RW(bussuspend,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode");
00554 DWC_OTG_DEVICE_ATTR_BITFIELD_RO(busconnected, "Bus Connected");
00555 
00556 DWC_OTG_DEVICE_ATTR_REG32_RW(gotgctl, 0, "GOTGCTL");
00557 DWC_OTG_DEVICE_ATTR_REG32_RW(gusbcfg,
00558                              &(otg_dev->core_if->core_global_regs->gusbcfg),
00559                              "GUSBCFG");
00560 DWC_OTG_DEVICE_ATTR_REG32_RW(grxfsiz,
00561                              &(otg_dev->core_if->core_global_regs->grxfsiz),
00562                              "GRXFSIZ");
00563 DWC_OTG_DEVICE_ATTR_REG32_RW(gnptxfsiz,
00564                              &(otg_dev->core_if->core_global_regs->gnptxfsiz),
00565                              "GNPTXFSIZ");
00566 DWC_OTG_DEVICE_ATTR_REG32_RW(gpvndctl,
00567                              &(otg_dev->core_if->core_global_regs->gpvndctl),
00568                              "GPVNDCTL");
00569 DWC_OTG_DEVICE_ATTR_REG32_RW(ggpio,
00570                              &(otg_dev->core_if->core_global_regs->ggpio),
00571                              "GGPIO");
00572 DWC_OTG_DEVICE_ATTR_REG32_RW(guid, &(otg_dev->core_if->core_global_regs->guid),
00573                              "GUID");
00574 DWC_OTG_DEVICE_ATTR_REG32_RO(gsnpsid,
00575                              &(otg_dev->core_if->core_global_regs->gsnpsid),
00576                              "GSNPSID");
00577 DWC_OTG_DEVICE_ATTR_BITFIELD_RW(devspeed, "Device Speed");
00578 DWC_OTG_DEVICE_ATTR_BITFIELD_RO(enumspeed, "Device Enumeration Speed");
00579 
00580 DWC_OTG_DEVICE_ATTR_REG32_RO(hptxfsiz,
00581                              &(otg_dev->core_if->core_global_regs->hptxfsiz),
00582                              "HPTXFSIZ");
00583 DWC_OTG_DEVICE_ATTR_REG32_RW(hprt0, otg_dev->core_if->host_if->hprt0, "HPRT0");
00584 
00591 static ssize_t hnp_show(struct device *_dev,
00592                         struct device_attribute *attr, char *buf)
00593 {
00594 #ifdef LM_INTERFACE
00595         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00596         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00597 #elif defined(PCI_INTERFACE)
00598         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00599 #endif
00600         return sprintf(buf, "HstNegScs = 0x%x\n",
00601                        dwc_otg_get_hnpstatus(otg_dev->core_if));
00602 }
00603 
00607 static ssize_t hnp_store(struct device *_dev,
00608                          struct device_attribute *attr,
00609                          const char *buf, size_t count)
00610 {
00611 #ifdef LM_INTERFACE
00612         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00613         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00614 #elif defined(PCI_INTERFACE)
00615         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00616 #endif
00617         uint32_t in = simple_strtoul(buf, NULL, 16);
00618         dwc_otg_set_hnpreq(otg_dev->core_if, in);
00619         return count;
00620 }
00621 
00622 DEVICE_ATTR(hnp, 0644, hnp_show, hnp_store);
00623 
00630 static ssize_t srp_show(struct device *_dev,
00631                         struct device_attribute *attr, char *buf)
00632 {
00633 #ifndef DWC_HOST_ONLY
00634 #ifdef LM_INTERFACE
00635         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00636         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00637 #elif defined(PCI_INTERFACE)
00638         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00639 #endif
00640         return sprintf(buf, "SesReqScs = 0x%x\n",
00641                        dwc_otg_get_srpstatus(otg_dev->core_if));
00642 #else
00643         return sprintf(buf, "Host Only Mode!\n");
00644 #endif
00645 }
00646 
00650 static ssize_t srp_store(struct device *_dev,
00651                          struct device_attribute *attr,
00652                          const char *buf, size_t count)
00653 {
00654 #ifndef DWC_HOST_ONLY
00655 #ifdef LM_INTERFACE
00656         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00657         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00658 #elif defined(PCI_INTERFACE)
00659         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00660 #endif
00661         dwc_otg_pcd_initiate_srp(otg_dev->pcd);
00662 #endif
00663         return count;
00664 }
00665 
00666 DEVICE_ATTR(srp, 0644, srp_show, srp_store);
00667 
00674 static ssize_t buspower_show(struct device *_dev,
00675                              struct device_attribute *attr, char *buf)
00676 {
00677 #ifdef LM_INTERFACE
00678         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00679         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00680 #elif defined(PCI_INTERFACE)
00681         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00682 #endif
00683         return sprintf(buf, "Bus Power = 0x%x\n",
00684                        dwc_otg_get_prtpower(otg_dev->core_if));
00685 }
00686 
00690 static ssize_t buspower_store(struct device *_dev,
00691                               struct device_attribute *attr,
00692                               const char *buf, size_t count)
00693 {
00694 #ifdef LM_INTERFACE
00695         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00696         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00697 #elif defined(PCI_INTERFACE)
00698         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00699 #endif
00700         uint32_t on = simple_strtoul(buf, NULL, 16);
00701         dwc_otg_set_prtpower(otg_dev->core_if, on);
00702         return count;
00703 }
00704 
00705 DEVICE_ATTR(buspower, 0644, buspower_show, buspower_store);
00706 
00713 static ssize_t bussuspend_show(struct device *_dev,
00714                                struct device_attribute *attr, char *buf)
00715 {
00716 #ifdef LM_INTERFACE
00717         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00718         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00719 #elif defined(PCI_INTERFACE)
00720         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00721 #endif
00722 
00723         return sprintf(buf, "Bus Suspend = 0x%x\n",
00724                        dwc_otg_get_prtsuspend(otg_dev->core_if));
00725 }
00726 
00730 static ssize_t bussuspend_store(struct device *_dev,
00731                                 struct device_attribute *attr,
00732                                 const char *buf, size_t count)
00733 {
00734 #ifdef LM_INTERFACE
00735         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00736         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00737 #elif defined(PCI_INTERFACE)
00738         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00739 #endif
00740 
00741         uint32_t in = simple_strtoul(buf, NULL, 16);
00742         dwc_otg_set_prtsuspend(otg_dev->core_if, in);
00743         return count;
00744 }
00745 
00746 DEVICE_ATTR(bussuspend, 0644, bussuspend_show, bussuspend_store);
00747 
00751 static ssize_t mode_ch_tim_en_show(struct device *_dev,
00752                                    struct device_attribute *attr, char *buf)
00753 {
00754 #ifdef LM_INTERFACE
00755         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00756         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00757 #elif defined(PCI_INTERFACE)
00758         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00759 #endif
00760 
00761         return sprintf(buf, "Mode Change Ready Timer Enable = 0x%x\n",
00762                        dwc_otg_get_mode_ch_tim(otg_dev->core_if));
00763 }
00764 
00768 static ssize_t mode_ch_tim_en_store(struct device *_dev,
00769                                     struct device_attribute *attr,
00770                                     const char *buf, size_t count)
00771 {
00772 #ifdef LM_INTERFACE
00773         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00774         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00775 #elif defined(PCI_INTERFACE)
00776         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00777 #endif
00778 
00779         uint32_t in = simple_strtoul(buf, NULL, 16);
00780         dwc_otg_set_mode_ch_tim(otg_dev->core_if, in);
00781         return count;
00782 }
00783 
00784 DEVICE_ATTR(mode_ch_tim_en, 0644, mode_ch_tim_en_show, mode_ch_tim_en_store);
00785 
00789 static ssize_t fr_interval_show(struct device *_dev,
00790                                 struct device_attribute *attr, char *buf)
00791 {
00792 #ifdef LM_INTERFACE
00793         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00794         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00795 #elif defined(PCI_INTERFACE)
00796         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00797 #endif
00798 
00799         return sprintf(buf, "Frame Interval = 0x%x\n",
00800                        dwc_otg_get_fr_interval(otg_dev->core_if));
00801 }
00802 
00806 static ssize_t fr_interval_store(struct device *_dev,
00807                                  struct device_attribute *attr,
00808                                  const char *buf, size_t count)
00809 {
00810 #ifdef LM_INTERFACE
00811         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00812         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00813 #elif defined(PCI_INTERFACE)
00814         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00815 #endif
00816 
00817         uint32_t in = simple_strtoul(buf, NULL, 10);
00818         dwc_otg_set_fr_interval(otg_dev->core_if, in);
00819         return count;
00820 }
00821 
00822 DEVICE_ATTR(fr_interval, 0644, fr_interval_show, fr_interval_store);
00823 
00827 static ssize_t remote_wakeup_show(struct device *_dev,
00828                                   struct device_attribute *attr, char *buf)
00829 {
00830 #ifndef DWC_HOST_ONLY
00831 #ifdef LM_INTERFACE
00832         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00833         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00834 #elif defined(PCI_INTERFACE)
00835         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00836 #endif
00837 
00838         return sprintf(buf,
00839                        "Remote Wakeup Sig = %d Enabled = %d LPM Remote Wakeup = %d\n",
00840                        dwc_otg_get_remotewakesig(otg_dev->core_if),
00841                        dwc_otg_pcd_get_rmwkup_enable(otg_dev->pcd),
00842                        dwc_otg_get_lpm_remotewakeenabled(otg_dev->core_if));
00843 #else
00844         return sprintf(buf, "Host Only Mode!\n");
00845 #endif /* DWC_HOST_ONLY */
00846 }
00847 
00854 static ssize_t remote_wakeup_store(struct device *_dev,
00855                                    struct device_attribute *attr,
00856                                    const char *buf, size_t count)
00857 {
00858 #ifndef DWC_HOST_ONLY
00859 #ifdef LM_INTERFACE
00860         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00861         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00862 #elif defined(PCI_INTERFACE)
00863         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00864 #endif
00865 
00866         uint32_t val = simple_strtoul(buf, NULL, 16);
00867 
00868         if (val & 1) {
00869                 dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 1);
00870         } else {
00871                 dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 0);
00872         }
00873 #endif /* DWC_HOST_ONLY */
00874         return count;
00875 }
00876 
00877 DEVICE_ATTR(remote_wakeup, S_IRUGO | S_IWUSR, remote_wakeup_show,
00878             remote_wakeup_store);
00879 
00883 static ssize_t rem_wakeup_pwrdn_show(struct device *_dev,
00884                                      struct device_attribute *attr, char *buf)
00885 {
00886 #ifndef DWC_HOST_ONLY
00887 #ifdef LM_INTERFACE
00888         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00889         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00890 #elif defined(PCI_INTERFACE)
00891         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00892 #endif
00893         if (dwc_otg_get_core_state(otg_dev->core_if)) {
00894                 DWC_PRINTF("Core is in hibernation\n");
00895         } else {
00896                 DWC_PRINTF("Core is not in hibernation\n");
00897         }
00898 #endif /* DWC_HOST_ONLY */
00899         return 0;
00900 }
00901 
00902 extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if,
00903                                               int rem_wakeup, int reset);
00904 
00908 static ssize_t rem_wakeup_pwrdn_store(struct device *_dev,
00909                                       struct device_attribute *attr,
00910                                       const char *buf, size_t count)
00911 {
00912 #ifndef DWC_HOST_ONLY
00913 #ifdef LM_INTERFACE
00914         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00915         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00916 #elif defined(PCI_INTERFACE)
00917         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00918 #endif
00919         dwc_otg_device_hibernation_restore(otg_dev->core_if, 1, 0);
00920 #endif
00921         return count;
00922 }
00923 
00924 DEVICE_ATTR(rem_wakeup_pwrdn, S_IRUGO | S_IWUSR, rem_wakeup_pwrdn_show,
00925             rem_wakeup_pwrdn_store);
00926 
00927 static ssize_t disconnect_us(struct device *_dev,
00928                              struct device_attribute *attr,
00929                              const char *buf, size_t count)
00930 {
00931 
00932 #ifndef DWC_HOST_ONLY
00933 #ifdef LM_INTERFACE
00934         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00935         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00936 #elif defined(PCI_INTERFACE)
00937         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00938 #endif
00939         uint32_t val = simple_strtoul(buf, NULL, 16);
00940         DWC_PRINTF("The Passed value is %04x\n", val);
00941 
00942         dwc_otg_pcd_disconnect_us(otg_dev->pcd, 50);
00943 
00944 #endif /* DWC_HOST_ONLY */
00945         return count;
00946 }
00947 
00948 DEVICE_ATTR(disconnect_us, S_IWUSR, 0, disconnect_us);
00949 
00954 static ssize_t regdump_show(struct device *_dev,
00955                             struct device_attribute *attr, char *buf)
00956 {
00957 #ifdef LM_INTERFACE
00958         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00959         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00960 #elif defined(PCI_INTERFACE)
00961         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00962 #endif
00963 
00964         dwc_otg_dump_global_registers(otg_dev->core_if);
00965         if (dwc_otg_is_host_mode(otg_dev->core_if)) {
00966                 dwc_otg_dump_host_registers(otg_dev->core_if);
00967         } else {
00968                 dwc_otg_dump_dev_registers(otg_dev->core_if);
00969 
00970         }
00971         return sprintf(buf, "Register Dump\n");
00972 }
00973 
00974 DEVICE_ATTR(regdump, S_IRUGO | S_IWUSR, regdump_show, 0);
00975 
00980 static ssize_t spramdump_show(struct device *_dev,
00981                               struct device_attribute *attr, char *buf)
00982 {
00983 #ifdef LM_INTERFACE
00984         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
00985         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
00986 #elif defined(PCI_INTERFACE)
00987         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
00988 #endif
00989 
00990         dwc_otg_dump_spram(otg_dev->core_if);
00991 
00992         return sprintf(buf, "SPRAM Dump\n");
00993 }
00994 
00995 DEVICE_ATTR(spramdump, S_IRUGO | S_IWUSR, spramdump_show, 0);
00996 
01000 static ssize_t hcddump_show(struct device *_dev,
01001                             struct device_attribute *attr, char *buf)
01002 {
01003 #ifndef DWC_DEVICE_ONLY
01004 #ifdef LM_INTERFACE
01005         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01006         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01007 #elif defined(PCI_INTERFACE)
01008         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01009 #endif
01010 
01011         dwc_otg_hcd_dump_state(otg_dev->hcd);
01012 #endif /* DWC_DEVICE_ONLY */
01013         return sprintf(buf, "HCD Dump\n");
01014 }
01015 
01016 DEVICE_ATTR(hcddump, S_IRUGO | S_IWUSR, hcddump_show, 0);
01017 
01023 static ssize_t hcd_frrem_show(struct device *_dev,
01024                               struct device_attribute *attr, char *buf)
01025 {
01026 #ifndef DWC_DEVICE_ONLY
01027 #ifdef LM_INTERFACE
01028         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01029         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01030 #elif defined(PCI_INTERFACE)
01031         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01032 #endif
01033 
01034         dwc_otg_hcd_dump_frrem(otg_dev->hcd);
01035 #endif /* DWC_DEVICE_ONLY */
01036         return sprintf(buf, "HCD Dump Frame Remaining\n");
01037 }
01038 
01039 DEVICE_ATTR(hcd_frrem, S_IRUGO | S_IWUSR, hcd_frrem_show, 0);
01040 
01045 #define RW_REG_COUNT 10000000
01046 #define MSEC_PER_JIFFIE 1000/HZ
01047 static ssize_t rd_reg_test_show(struct device *_dev,
01048                                 struct device_attribute *attr, char *buf)
01049 {
01050 #ifdef LM_INTERFACE
01051         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01052         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01053 #elif defined(PCI_INTERFACE)
01054         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01055 #endif
01056 
01057         int i;
01058         int time;
01059         int start_jiffies;
01060 
01061         printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
01062                HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
01063         start_jiffies = jiffies;
01064         for (i = 0; i < RW_REG_COUNT; i++) {
01065                 dwc_otg_get_gnptxfsiz(otg_dev->core_if);
01066         }
01067         time = jiffies - start_jiffies;
01068         return sprintf(buf,
01069                        "Time to read GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
01070                        RW_REG_COUNT, time * MSEC_PER_JIFFIE, time);
01071 }
01072 
01073 DEVICE_ATTR(rd_reg_test, S_IRUGO | S_IWUSR, rd_reg_test_show, 0);
01074 
01079 static ssize_t wr_reg_test_show(struct device *_dev,
01080                                 struct device_attribute *attr, char *buf)
01081 {
01082 #ifdef LM_INTERFACE
01083         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01084         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01085 #elif defined(PCI_INTERFACE)
01086         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01087 #endif
01088 
01089         uint32_t reg_val;
01090         int i;
01091         int time;
01092         int start_jiffies;
01093 
01094         printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
01095                HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
01096         reg_val = dwc_otg_get_gnptxfsiz(otg_dev->core_if);
01097         start_jiffies = jiffies;
01098         for (i = 0; i < RW_REG_COUNT; i++) {
01099                 dwc_otg_set_gnptxfsiz(otg_dev->core_if, reg_val);
01100         }
01101         time = jiffies - start_jiffies;
01102         return sprintf(buf,
01103                        "Time to write GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
01104                        RW_REG_COUNT, time * MSEC_PER_JIFFIE, time);
01105 }
01106 
01107 DEVICE_ATTR(wr_reg_test, S_IRUGO | S_IWUSR, wr_reg_test_show, 0);
01108 
01109 #ifdef CONFIG_USB_DWC_OTG_LPM
01110 
01114 static ssize_t lpmresp_show(struct device *_dev,
01115                             struct device_attribute *attr, char *buf)
01116 {
01117 #ifdef LM_INTERFACE
01118         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01119         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01120 #elif defined(PCI_INTERFACE)
01121         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01122 #endif
01123 
01124         if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
01125                 return sprintf(buf, "** LPM is DISABLED **\n");
01126 
01127         if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
01128                 return sprintf(buf, "** Current mode is not device mode\n");
01129         }
01130         return sprintf(buf, "lpm_response = %d\n",
01131                        dwc_otg_get_lpmresponse(otg_dev->core_if));
01132 }
01133 
01137 static ssize_t lpmresp_store(struct device *_dev,
01138                              struct device_attribute *attr,
01139                              const char *buf, size_t count)
01140 {
01141 #ifdef LM_INTERFACE
01142         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01143         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01144 #elif defined(PCI_INTERFACE)
01145         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01146 #endif
01147 
01148         uint32_t val = simple_strtoul(buf, NULL, 16);
01149 
01150         if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) {
01151                 return 0;
01152         }
01153 
01154         if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
01155                 return 0;
01156         }
01157 
01158         dwc_otg_set_lpmresponse(otg_dev->core_if, val);
01159         return count;
01160 }
01161 
01162 DEVICE_ATTR(lpm_response, S_IRUGO | S_IWUSR, lpmresp_show, lpmresp_store);
01163 
01167 static ssize_t sleepstatus_show(struct device *_dev,
01168                                 struct device_attribute *attr, char *buf)
01169 {
01170 #ifdef LM_INTERFACE
01171         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01172         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01173 #elif defined(PCI_INTERFACE)
01174         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01175 #endif
01176 
01177         return sprintf(buf, "Sleep Status = %d\n",
01178                        dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if));
01179 }
01180 
01184 static ssize_t sleepstatus_store(struct device *_dev,
01185                                  struct device_attribute *attr,
01186                                  const char *buf, size_t count)
01187 {
01188 #ifdef LM_INTERFACE
01189         struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
01190         dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
01191 #elif defined(PCI_INTERFACE)
01192         dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
01193 #endif
01194 
01195         dwc_otg_core_if_t *core_if = otg_dev->core_if;
01196 
01197         if (dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if)) {
01198                 if (dwc_otg_is_host_mode(core_if)) {
01199 
01200                         DWC_PRINTF("Host initiated resume\n");
01201                         dwc_otg_set_prtresume(otg_dev->core_if, 1);
01202                 }
01203         }
01204 
01205         return count;
01206 }
01207 
01208 DEVICE_ATTR(sleep_status, S_IRUGO | S_IWUSR, sleepstatus_show,
01209             sleepstatus_store);
01210 
01211 #endif /* CONFIG_USB_DWC_OTG_LPM_ENABLE */
01212 
01218 void dwc_otg_attr_create(
01219 #ifdef LM_INTERFACE
01220                                 struct lm_device *dev
01221 #elif  defined(PCI_INTERFACE)
01222                                 struct pci_dev *dev
01223 #endif
01224     )
01225 {
01226         int error;
01227 
01228         error = device_create_file(&dev->dev, &dev_attr_regoffset);
01229         error = device_create_file(&dev->dev, &dev_attr_regvalue);
01230         error = device_create_file(&dev->dev, &dev_attr_mode);
01231         error = device_create_file(&dev->dev, &dev_attr_hnpcapable);
01232         error = device_create_file(&dev->dev, &dev_attr_srpcapable);
01233         error = device_create_file(&dev->dev, &dev_attr_hsic_connect);
01234         error = device_create_file(&dev->dev, &dev_attr_inv_sel_hsic);
01235         error = device_create_file(&dev->dev, &dev_attr_hnp);
01236         error = device_create_file(&dev->dev, &dev_attr_srp);
01237         error = device_create_file(&dev->dev, &dev_attr_buspower);
01238         error = device_create_file(&dev->dev, &dev_attr_bussuspend);
01239         error = device_create_file(&dev->dev, &dev_attr_mode_ch_tim_en);
01240         error = device_create_file(&dev->dev, &dev_attr_fr_interval);
01241         error = device_create_file(&dev->dev, &dev_attr_busconnected);
01242         error = device_create_file(&dev->dev, &dev_attr_gotgctl);
01243         error = device_create_file(&dev->dev, &dev_attr_gusbcfg);
01244         error = device_create_file(&dev->dev, &dev_attr_grxfsiz);
01245         error = device_create_file(&dev->dev, &dev_attr_gnptxfsiz);
01246         error = device_create_file(&dev->dev, &dev_attr_gpvndctl);
01247         error = device_create_file(&dev->dev, &dev_attr_ggpio);
01248         error = device_create_file(&dev->dev, &dev_attr_guid);
01249         error = device_create_file(&dev->dev, &dev_attr_gsnpsid);
01250         error = device_create_file(&dev->dev, &dev_attr_devspeed);
01251         error = device_create_file(&dev->dev, &dev_attr_enumspeed);
01252         error = device_create_file(&dev->dev, &dev_attr_hptxfsiz);
01253         error = device_create_file(&dev->dev, &dev_attr_hprt0);
01254         error = device_create_file(&dev->dev, &dev_attr_remote_wakeup);
01255         error = device_create_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
01256         error = device_create_file(&dev->dev, &dev_attr_disconnect_us);
01257         error = device_create_file(&dev->dev, &dev_attr_regdump);
01258         error = device_create_file(&dev->dev, &dev_attr_spramdump);
01259         error = device_create_file(&dev->dev, &dev_attr_hcddump);
01260         error = device_create_file(&dev->dev, &dev_attr_hcd_frrem);
01261         error = device_create_file(&dev->dev, &dev_attr_rd_reg_test);
01262         error = device_create_file(&dev->dev, &dev_attr_wr_reg_test);
01263 #ifdef CONFIG_USB_DWC_OTG_LPM
01264         error = device_create_file(&dev->dev, &dev_attr_lpm_response);
01265         error = device_create_file(&dev->dev, &dev_attr_sleep_status);
01266 #endif
01267 }
01268 
01272 void dwc_otg_attr_remove(
01273 #ifdef LM_INTERFACE
01274                                 struct lm_device *dev
01275 #elif  defined(PCI_INTERFACE)
01276                                 struct pci_dev *dev
01277 #endif
01278     )
01279 {
01280         device_remove_file(&dev->dev, &dev_attr_regoffset);
01281         device_remove_file(&dev->dev, &dev_attr_regvalue);
01282         device_remove_file(&dev->dev, &dev_attr_mode);
01283         device_remove_file(&dev->dev, &dev_attr_hnpcapable);
01284         device_remove_file(&dev->dev, &dev_attr_srpcapable);
01285         device_remove_file(&dev->dev, &dev_attr_hsic_connect);
01286         device_remove_file(&dev->dev, &dev_attr_inv_sel_hsic);
01287         device_remove_file(&dev->dev, &dev_attr_hnp);
01288         device_remove_file(&dev->dev, &dev_attr_srp);
01289         device_remove_file(&dev->dev, &dev_attr_buspower);
01290         device_remove_file(&dev->dev, &dev_attr_bussuspend);
01291         device_remove_file(&dev->dev, &dev_attr_mode_ch_tim_en);
01292         device_remove_file(&dev->dev, &dev_attr_fr_interval);
01293         device_remove_file(&dev->dev, &dev_attr_busconnected);
01294         device_remove_file(&dev->dev, &dev_attr_gotgctl);
01295         device_remove_file(&dev->dev, &dev_attr_gusbcfg);
01296         device_remove_file(&dev->dev, &dev_attr_grxfsiz);
01297         device_remove_file(&dev->dev, &dev_attr_gnptxfsiz);
01298         device_remove_file(&dev->dev, &dev_attr_gpvndctl);
01299         device_remove_file(&dev->dev, &dev_attr_ggpio);
01300         device_remove_file(&dev->dev, &dev_attr_guid);
01301         device_remove_file(&dev->dev, &dev_attr_gsnpsid);
01302         device_remove_file(&dev->dev, &dev_attr_devspeed);
01303         device_remove_file(&dev->dev, &dev_attr_enumspeed);
01304         device_remove_file(&dev->dev, &dev_attr_hptxfsiz);
01305         device_remove_file(&dev->dev, &dev_attr_hprt0);
01306         device_remove_file(&dev->dev, &dev_attr_remote_wakeup);
01307         device_remove_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
01308         device_remove_file(&dev->dev, &dev_attr_disconnect_us);
01309         device_remove_file(&dev->dev, &dev_attr_regdump);
01310         device_remove_file(&dev->dev, &dev_attr_spramdump);
01311         device_remove_file(&dev->dev, &dev_attr_hcddump);
01312         device_remove_file(&dev->dev, &dev_attr_hcd_frrem);
01313         device_remove_file(&dev->dev, &dev_attr_rd_reg_test);
01314         device_remove_file(&dev->dev, &dev_attr_wr_reg_test);
01315 #ifdef CONFIG_USB_DWC_OTG_LPM
01316         device_remove_file(&dev->dev, &dev_attr_lpm_response);
01317         device_remove_file(&dev->dev, &dev_attr_sleep_status);
01318 #endif
01319 }
Generated on Thu Oct 27 03:56:37 2011 for DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver by  doxygen 1.3.9.1