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dwc_otg_cfi.h

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00001 /* ==========================================================================
00002  * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
00003  * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
00004  * otherwise expressly agreed to in writing between Synopsys and you.
00005  *
00006  * The Software IS NOT an item of Licensed Software or Licensed Product under
00007  * any End User Software License Agreement or Agreement for Licensed Product
00008  * with Synopsys or any supplement thereto. You are permitted to use and
00009  * redistribute this Software in source and binary forms, with or without
00010  * modification, provided that redistributions of source code must retain this
00011  * notice. You may not view, use, disclose, copy or distribute this file or
00012  * any information contained herein except pursuant to this license grant from
00013  * Synopsys. If you do not agree with this notice, including the disclaimer
00014  * below, then you are not authorized to use the Software.
00015  *
00016  * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
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00019  * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
00020  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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00026  * DAMAGE.
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00028 
00029 #if !defined(__DWC_OTG_CFI_H__)
00030 #define __DWC_OTG_CFI_H__
00031 
00032 #include "dwc_otg_pcd.h"
00033 #include "dwc_cfi_common.h"
00034 
00044 struct dwc_otg_pcd;
00045 struct dwc_otg_pcd_ep;
00046 
00049 #define FT_ID_DMA_MODE                                  0x0001
00050 #define FT_ID_DMA_BUFFER_SETUP                  0x0002
00051 #define FT_ID_DMA_BUFF_ALIGN                    0x0003
00052 #define FT_ID_DMA_CONCAT_SETUP                  0x0004
00053 #define FT_ID_DMA_CIRCULAR                              0x0005
00054 #define FT_ID_THRESHOLD_SETUP                   0x0006
00055 #define FT_ID_DFIFO_DEPTH                               0x0007
00056 #define FT_ID_TX_FIFO_DEPTH                             0x0008
00057 #define FT_ID_RX_FIFO_DEPTH                             0x0009
00058 
00059 /**********************************************************/
00060 #define CFI_INFO_DEF
00061 
00062 #ifdef CFI_INFO_DEF
00063 #define CFI_INFO(fmt...)        DWC_PRINTF("CFI: " fmt);
00064 #else
00065 #define CFI_INFO(fmt...)
00066 #endif
00067 
00068 #define min(x,y) ({ \
00069         x < y ? x : y; })
00070 
00071 #define max(x,y) ({ \
00072         x > y ? x : y; })
00073 
00078 struct _ddma_sg_buffer_setup {
00079 #define BS_SG_VAL_DESC_LEN      6
00080         /* The OUT EP address */
00081         uint8_t bOutEndpointAddress;
00082         /* The IN EP address */
00083         uint8_t bInEndpointAddress;
00084         /* Number of bytes to put between transfer segments (must be DWORD boundaries) */
00085         uint8_t bOffset;
00086         /* The number of transfer segments (a DMA descriptors per each segment) */
00087         uint8_t bCount;
00088         /* Size (in byte) of each transfer segment */
00089         uint16_t wSize;
00090 } __attribute__ ((packed));
00091 typedef struct _ddma_sg_buffer_setup ddma_sg_buffer_setup_t;
00092 
00094 struct _ddma_concat_buffer_setup_hdr {
00095 #define BS_CONCAT_VAL_HDR_LEN   4
00096         /* The endpoint for which the buffer is to be set up */
00097         uint8_t bEndpointAddress;
00098         /* The count of descriptors to be used */
00099         uint8_t bDescCount;
00100         /* The total size of the transfer */
00101         uint16_t wSize;
00102 } __attribute__ ((packed));
00103 typedef struct _ddma_concat_buffer_setup_hdr ddma_concat_buffer_setup_hdr_t;
00104 
00106 struct _ddma_concat_buffer_setup {
00107         /* The SG header */
00108         ddma_concat_buffer_setup_hdr_t hdr;
00109 
00110         /* The XFER sizes pointer (allocated dynamically) */
00111         uint16_t *wTxBytes;
00112 } __attribute__ ((packed));
00113 typedef struct _ddma_concat_buffer_setup ddma_concat_buffer_setup_t;
00114 
00116 struct _ddma_align_buffer_setup {
00117 #define BS_ALIGN_VAL_HDR_LEN    2
00118         uint8_t bEndpointAddress;
00119         uint8_t bAlign;
00120 } __attribute__ ((packed));
00121 typedef struct _ddma_align_buffer_setup ddma_align_buffer_setup_t;
00122 
00124 struct _tx_fifo_size_setup {
00125         uint8_t bEndpointAddress;
00126         uint16_t wDepth;
00127 } __attribute__ ((packed));
00128 typedef struct _tx_fifo_size_setup tx_fifo_size_setup_t;
00129 
00131 struct _rx_fifo_size_setup {
00132         uint16_t wDepth;
00133 } __attribute__ ((packed));
00134 typedef struct _rx_fifo_size_setup rx_fifo_size_setup_t;
00135 
00141 struct cfi_usb_ctrlrequest {
00142         uint8_t bRequestType;
00143         uint8_t bRequest;
00144         uint16_t wValue;
00145         uint16_t wIndex;
00146         uint16_t wLength;
00147         uint8_t *data;
00148 } UPACKED;
00149 
00150 /*---------------------------------------------------------------------------*/
00151 
00157 struct cfi_ep {
00158         /* Entry for the list container */
00159         dwc_list_link_t lh;
00160         /* Pointer to the active PCD endpoint structure */
00161         struct dwc_otg_pcd_ep *ep;
00162         /* The last descriptor in the chain of DMA descriptors of the endpoint */
00163         struct dwc_otg_dma_desc *dma_desc_last;
00164         /* The SG feature value */
00165         ddma_sg_buffer_setup_t *bm_sg;
00166         /* The Circular feature value */
00167         ddma_sg_buffer_setup_t *bm_circ;
00168         /* The Concatenation feature value */
00169         ddma_concat_buffer_setup_t *bm_concat;
00170         /* The Alignment feature value */
00171         ddma_align_buffer_setup_t *bm_align;
00172         /* XFER length */
00173         uint32_t xfer_len;
00174         /*
00175          * Count of DMA descriptors currently used.
00176          * The total should not exceed the MAX_DMA_DESCS_PER_EP value
00177          * defined in the dwc_otg_cil.h
00178          */
00179         uint32_t desc_count;
00180 };
00181 typedef struct cfi_ep cfi_ep_t;
00182 
00183 typedef struct cfi_dma_buff {
00184 #define CFI_IN_BUF_LEN  1024
00185 #define CFI_OUT_BUF_LEN 1024
00186         dma_addr_t addr;
00187         uint8_t *buf;
00188 } cfi_dma_buff_t;
00189 
00190 struct cfiobject;
00191 
00200 typedef struct cfi_ops {
00201         int (*ep_enable) (struct cfiobject * cfi, struct dwc_otg_pcd * pcd,
00202                           struct dwc_otg_pcd_ep * ep);
00203         void *(*ep_alloc_buf) (struct cfiobject * cfi, struct dwc_otg_pcd * pcd,
00204                                struct dwc_otg_pcd_ep * ep, dma_addr_t * dma,
00205                                unsigned size, gfp_t flags);
00206         void (*release) (struct cfiobject * cfi);
00207         int (*ctrl_write_complete) (struct cfiobject * cfi,
00208                                     struct dwc_otg_pcd * pcd);
00209         void (*build_descriptors) (struct cfiobject * cfi,
00210                                    struct dwc_otg_pcd * pcd,
00211                                    struct dwc_otg_pcd_ep * ep,
00212                                    dwc_otg_pcd_request_t * req);
00213 } cfi_ops_t;
00214 
00215 struct cfiobject {
00216         cfi_ops_t ops;
00217         struct dwc_otg_pcd *pcd;
00218         struct usb_gadget *gadget;
00219 
00220         /* Buffers used to send/receive CFI-related request data */
00221         cfi_dma_buff_t buf_in;
00222         cfi_dma_buff_t buf_out;
00223 
00224         /* CFI specific Control request wrapper */
00225         struct cfi_usb_ctrlrequest ctrl_req;
00226 
00227         /* The list of active EP's in the PCD of type cfi_ep_t */
00228         dwc_list_link_t active_eps;
00229 
00230         /* This flag shall control the propagation of a specific request
00231          * to the gadget's processing routines.
00232          * 0 - no gadget handling
00233          * 1 - the gadget needs to know about this request (w/o completing a status
00234          * phase - just return a 0 to the _setup callback)
00235          */
00236         uint8_t need_gadget_att;
00237 
00238         /* Flag indicating whether the status IN phase needs to be
00239          * completed by the PCD
00240          */
00241         uint8_t need_status_in_complete;
00242 };
00243 typedef struct cfiobject cfiobject_t;
00244 
00245 #define DUMP_MSG
00246 
00247 #if defined(DUMP_MSG)
00248 static inline void dump_msg(const u8 * buf, unsigned int length)
00249 {
00250         unsigned int start, num, i;
00251         char line[52], *p;
00252 
00253         if (length >= 512)
00254                 return;
00255 
00256         start = 0;
00257         while (length > 0) {
00258                 num = min(length, 16u);
00259                 p = line;
00260                 for (i = 0; i < num; ++i) {
00261                         if (i == 8)
00262                                 *p++ = ' ';
00263                         DWC_SPRINTF(p, " %02x", buf[i]);
00264                         p += 3;
00265                 }
00266                 *p = 0;
00267                 DWC_DEBUG("%6x: %s\n", start, line);
00268                 buf += num;
00269                 start += num;
00270                 length -= num;
00271         }
00272 }
00273 #else
00274 static inline void dump_msg(const u8 * buf, unsigned int length)
00275 {
00276 }
00277 #endif
00278 
00282 static inline struct cfi_ep *get_cfi_ep_by_addr(struct cfiobject *cfi,
00283                                                 uint8_t addr)
00284 {
00285         struct cfi_ep *pcfiep;
00286         dwc_list_link_t *tmp;
00287 
00288         DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
00289                 pcfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
00290 
00291                 if (pcfiep->ep->desc->bEndpointAddress == addr) {
00292                         return pcfiep;
00293                 }
00294         }
00295 
00296         return NULL;
00297 }
00298 
00303 static inline struct cfi_ep *get_cfi_ep_by_pcd_ep(struct cfiobject *cfi,
00304                                                   struct dwc_otg_pcd_ep *ep)
00305 {
00306         struct cfi_ep *pcfiep = NULL;
00307         dwc_list_link_t *tmp;
00308 
00309         DWC_LIST_FOREACH(tmp, &cfi->active_eps) {
00310                 pcfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh);
00311                 if (pcfiep->ep == ep) {
00312                         return pcfiep;
00313                 }
00314         }
00315         return NULL;
00316 }
00317 
00318 int cfi_setup(struct dwc_otg_pcd *pcd, struct cfi_usb_ctrlrequest *ctrl);
00319 
00320 #endif /* (__DWC_OTG_CFI_H__) */

Generated on Thu Oct 27 03:56:37 2011 for DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver by  doxygen 1.3.9.1