dwc_otg_hcd.h File Reference

This file contains the structures, constants, and interfaces for the Host Contoller Driver (HCD). More...

#include "dwc_otg_os_dep.h"
#include "usb.h"
#include "dwc_otg_hcd_if.h"
#include "dwc_otg_core_if.h"
#include "dwc_list.h"
#include "dwc_otg_cil.h"

Go to the source code of this file.

Data Structures
struct	dwc_otg_hcd_pipe_info
struct	dwc_otg_hcd_iso_packet_desc
struct	dwc_otg_hcd_urb
struct	dwc_otg_qtd
	A Queue Transfer Descriptor (QTD) holds the state of a bulk, control, interrupt, or isochronous transfer. More...
struct	dwc_otg_qh
	A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint. More...
struct	dwc_otg_hcd
	This structure holds the state of the HCD, including the non-periodic and periodic schedules. More...
union	dwc_otg_hcd::dwc_otg_hcd_internal_flags
	Internal DWC HCD Flags. More...
Transaction Execution Functions
dwc_otg_transaction_type_e	dwc_otg_hcd_select_transactions (dwc_otg_hcd_t *hcd)
	This function selects transactions from the HCD transfer schedule and assigns them to available host channels.
void	dwc_otg_hcd_queue_transactions (dwc_otg_hcd_t *hcd, dwc_otg_transaction_type_e tr_type)
	This function processes the currently active host channels and queues transactions for these channels to the DWC_otg controller.
Interrupt Handler Functions
int32_t	dwc_otg_hcd_handle_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	This function handles interrupts for the HCD.
int32_t	dwc_otg_hcd_handle_sof_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	Handles the start-of-frame interrupt in host mode.
int32_t	dwc_otg_hcd_handle_rx_status_q_level_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	Handles the Rx Status Queue Level Interrupt, which indicates that there is at least one packet in the Rx FIFO.
int32_t	dwc_otg_hcd_handle_np_tx_fifo_empty_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	This interrupt occurs when the non-periodic Tx FIFO is half-empty.
int32_t	dwc_otg_hcd_handle_perio_tx_fifo_empty_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	This interrupt occurs when the periodic Tx FIFO is half-empty.
int32_t	dwc_otg_hcd_handle_incomplete_periodic_intr (dwc_otg_hcd_t *dwc_otg_hcd)
int32_t	dwc_otg_hcd_handle_port_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	There are multiple conditions that can cause a port interrupt.
int32_t	dwc_otg_hcd_handle_conn_id_status_change_intr (dwc_otg_hcd_t *dwc_otg_hcd)
int32_t	dwc_otg_hcd_handle_disconnect_intr (dwc_otg_hcd_t *dwc_otg_hcd)
int32_t	dwc_otg_hcd_handle_hc_intr (dwc_otg_hcd_t *dwc_otg_hcd)
	This interrupt indicates that one or more host channels has a pending interrupt.
int32_t	dwc_otg_hcd_handle_hc_n_intr (dwc_otg_hcd_t *dwc_otg_hcd, uint32_t num)
	Handles interrupt for a specific Host Channel.
int32_t	dwc_otg_hcd_handle_session_req_intr (dwc_otg_hcd_t *dwc_otg_hcd)
int32_t	dwc_otg_hcd_handle_wakeup_detected_intr (dwc_otg_hcd_t *dwc_otg_hcd)
Schedule Queue Functions
dwc_otg_qh_t *	dwc_otg_hcd_qh_create (dwc_otg_hcd_t *hcd, dwc_otg_hcd_urb_t *urb, int atomic_alloc)
	This function allocates and initializes a QH.
void	dwc_otg_hcd_qh_free (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	Free each QTD in the QH's QTD-list then free the QH.
int	dwc_otg_hcd_qh_add (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	This function adds a QH to either the non periodic or periodic schedule if it is not already in the schedule.
void	dwc_otg_hcd_qh_remove (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	Removes a QH from either the non-periodic or periodic schedule.
void	dwc_otg_hcd_qh_deactivate (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh, int sched_csplit)
	Deactivates a QH.
void	dwc_otg_hcd_qh_remove_and_free (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	Remove and free a QH.
dwc_otg_qh_t *	dwc_otg_hcd_qh_alloc (int atomic_alloc)
	Allocates memory for a QH structure.
dwc_otg_qtd_t *	dwc_otg_hcd_qtd_create (dwc_otg_hcd_urb_t *urb, int atomic_alloc)
	This function allocates and initializes a QTD.
void	dwc_otg_hcd_qtd_init (dwc_otg_qtd_t *qtd, dwc_otg_hcd_urb_t *urb)
	Initializes a QTD structure.
int	dwc_otg_hcd_qtd_add (dwc_otg_qtd_t *qtd, dwc_otg_hcd_t *dwc_otg_hcd, dwc_otg_qh_t **qh, int atomic_alloc)
	This function adds a QTD to the QTD-list of a QH.
dwc_otg_qtd_t *	dwc_otg_hcd_qtd_alloc (int atomic_alloc)
	Allocates memory for a QTD structure.
void	dwc_otg_hcd_qtd_free (dwc_otg_qtd_t *qtd)
	Frees the memory for a QTD structure.
void	dwc_otg_hcd_qtd_remove (dwc_otg_hcd_t *hcd, dwc_otg_qtd_t *qtd, dwc_otg_qh_t *qh)
	Removes a QTD from list.
void	dwc_otg_hcd_qtd_remove_and_free (dwc_otg_hcd_t *hcd, dwc_otg_qtd_t *qtd, dwc_otg_qh_t *qh)
	Remove and free a QTD Need to disable IRQ and hold hcd lock while calling this function out of interrupt servicing chain.
Descriptor DMA Supporting Functions
void	dwc_otg_hcd_start_xfer_ddma (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	For Control and Bulk endpoints initializes descriptor list and starts the transfer.
void	dwc_otg_hcd_complete_xfer_ddma (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_halt_status_e halt_status)
	This function is called from interrupt handlers.
int	dwc_otg_hcd_qh_init_ddma (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	Initializes a QH structure's Descriptor DMA related members.
void	dwc_otg_hcd_qh_free_ddma (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh)
	Frees descriptor list memory associated with the QH.
Internal Functions
dwc_otg_qh_t *	dwc_urb_to_qh (dwc_otg_hcd_urb_t *urb)
Defines
#define	DWC_OTG_HCD_STATUS_BUF_SIZE   64
#define	dwc_list_to_qh(_list_head_ptr_)   container_of(_list_head_ptr_, dwc_otg_qh_t, qh_list_entry)
	Gets the QH that contains the list_head.
#define	dwc_list_to_qtd(_list_head_ptr_)   container_of(_list_head_ptr_, dwc_otg_qtd_t, qtd_list_entry)
	Gets the QTD that contains the list_head.
#define	dwc_qh_is_non_per(_qh_ptr_)
	Check if QH is non-periodic.
#define	dwc_hb_mult(wMaxPacketSize)   (1 + (((wMaxPacketSize) >> 11) & 0x03))
	High bandwidth multiplier as encoded in highspeed endpoint descriptors.
#define	dwc_max_packet(wMaxPacketSize)   ((wMaxPacketSize) & 0x07ff)
	Packet size for any kind of endpoint descriptor.
#define	dwc_sample_frrem(_hcd, _qh, _letter)
Typedefs
typedef enum dwc_otg_control_phase	dwc_otg_control_phase_e
	Phases for control transfers.
typedef enum dwc_otg_transaction_type	dwc_otg_transaction_type_e
	Transaction types.
typedef dwc_otg_qtd	dwc_otg_qtd_t
	A Queue Transfer Descriptor (QTD) holds the state of a bulk, control, interrupt, or isochronous transfer.
typedef dwc_otg_qh	dwc_otg_qh_t
	A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint.
Enumerations
enum	dwc_otg_control_phase { DWC_OTG_CONTROL_SETUP, DWC_OTG_CONTROL_DATA, DWC_OTG_CONTROL_STATUS }
	Phases for control transfers.
enum	dwc_otg_transaction_type { DWC_OTG_TRANSACTION_NONE, DWC_OTG_TRANSACTION_PERIODIC, DWC_OTG_TRANSACTION_NON_PERIODIC, DWC_OTG_TRANSACTION_ALL }
	Transaction types.
Functions
uint8_t	dwc_otg_hcd_get_ep_num (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_get_pipe_type (struct dwc_otg_hcd_pipe_info *pipe)
uint16_t	dwc_otg_hcd_get_mps (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_get_dev_addr (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_is_pipe_isoc (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_is_pipe_int (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_is_pipe_bulk (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_is_pipe_control (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_is_pipe_in (struct dwc_otg_hcd_pipe_info *pipe)
uint8_t	dwc_otg_hcd_is_pipe_out (struct dwc_otg_hcd_pipe_info *pipe)
void	dwc_otg_hcd_fill_pipe (struct dwc_otg_hcd_pipe_info *pipe, uint8_t devaddr, uint8_t ep_num, uint8_t pipe_type, uint8_t pipe_dir, uint16_t mps)
	DWC_CIRCLEQ_HEAD (dwc_otg_qtd_list, dwc_otg_qtd)
	DWC_CIRCLEQ_HEAD (hc_list, dwc_hc)
int	dwc_frame_num_le (uint16_t frame1, uint16_t frame2)
	Returns true if _frame1 is less than or equal to _frame2.
int	dwc_frame_num_gt (uint16_t frame1, uint16_t frame2)
	Returns true if _frame1 is greater than _frame2.
uint16_t	dwc_frame_num_inc (uint16_t frame, uint16_t inc)
	Increments _frame by the amount specified by _inc.
uint16_t	dwc_full_frame_num (uint16_t frame)
uint16_t	dwc_micro_frame_num (uint16_t frame)
void	dwc_otg_hcd_save_data_toggle (dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd)

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Detailed Description

This file contains the structures, constants, and interfaces for the Host Contoller Driver (HCD).

The Host Controller Driver (HCD) is responsible for translating requests from the USB Driver into the appropriate actions on the DWC_otg controller. It isolates the USBD from the specifics of the controller by providing an API to the USBD.

Definition in file dwc_otg_hcd.h.

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Define Documentation

#define dwc_qh_is_non_per (  _qh_ptr_   )

Value: ((_qh_ptr_->ep_type == UE_BULK) || \ (_qh_ptr_->ep_type == UE_CONTROL)) Check if QH is non-periodic. Definition at line 711 of file dwc_otg_hcd.h.

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Typedef Documentation

typedef struct dwc_otg_qtd dwc_otg_qtd_t

A Queue Transfer Descriptor (QTD) holds the state of a bulk, control, interrupt, or isochronous transfer. A single QTD is created for each URB (of one of these types) submitted to the HCD. The transfer associated with a QTD may require one or multiple transactions. A QTD is linked to a Queue Head, which is entered in either the non-periodic or periodic schedule for execution. When a QTD is chosen for execution, some or all of its transactions may be executed. After execution, the state of the QTD is updated. The QTD may be retired if all its transactions are complete or if an error occurred. Otherwise, it remains in the schedule so more transactions can be executed later.

typedef struct dwc_otg_qh dwc_otg_qh_t

A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint. A QH structure may be entered in either the non-periodic or periodic schedule.

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Function Documentation

dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions (  dwc_otg_hcd_t *  hcd  )

This function selects transactions from the HCD transfer schedule and assigns them to available host channels. It is called from HCD interrupt handler functions. Parameters: hcd  The HCD state structure. Returns: The types of new transactions that were assigned to host channels. Definition at line 1168 of file dwc_otg_hcd.c.

void dwc_otg_hcd_queue_transactions (  dwc_otg_hcd_t *  hcd, dwc_otg_transaction_type_e  tr_type )

This function processes the currently active host channels and queues transactions for these channels to the DWC_otg controller. It is called from HCD interrupt handler functions. Parameters: hcd  The HCD state structure. tr_type  The type(s) of transactions to queue (non-periodic, periodic, or both). Definition at line 1540 of file dwc_otg_hcd.c.

int32_t dwc_otg_hcd_handle_intr (  dwc_otg_hcd_t *  dwc_otg_hcd  )

This function handles interrupts for the HCD. Todo: Implement i2cintr handler. Definition at line 43 of file dwc_otg_hcd_intr.c.

int32_t dwc_otg_hcd_handle_sof_intr (  dwc_otg_hcd_t *  hcd  )

Handles the start-of-frame interrupt in host mode. Non-periodic transactions may be queued to the DWC_otg controller for the current (micro)frame. Periodic transactions may be queued to the controller for the next (micro)frame. Definition at line 175 of file dwc_otg_hcd_intr.c.

int32_t dwc_otg_hcd_handle_rx_status_q_level_intr (  dwc_otg_hcd_t *  dwc_otg_hcd  )

Handles the Rx Status Queue Level Interrupt, which indicates that there is at least one packet in the Rx FIFO. The packets are moved from the FIFO to memory if the DWC_otg controller is operating in Slave mode. Definition at line 228 of file dwc_otg_hcd_intr.c.

int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr (  dwc_otg_hcd_t *  dwc_otg_hcd  )

This interrupt occurs when the non-periodic Tx FIFO is half-empty. More data packets may be written to the FIFO for OUT transfers. More requests may be written to the non-periodic request queue for IN transfers. This interrupt is enabled only in Slave mode. Definition at line 281 of file dwc_otg_hcd_intr.c.

int32_t dwc_otg_hcd_handle_perio_tx_fifo_empty_intr (  dwc_otg_hcd_t *  dwc_otg_hcd  )

This interrupt occurs when the periodic Tx FIFO is half-empty. More data packets may be written to the FIFO for OUT transfers. More requests may be written to the periodic request queue for IN transfers. This interrupt is enabled only in Slave mode. Definition at line 293 of file dwc_otg_hcd_intr.c.

int32_t dwc_otg_hcd_handle_port_intr (  dwc_otg_hcd_t *  dwc_otg_hcd  )

There are multiple conditions that can cause a port interrupt. This function determines which interrupt conditions have occurred and handles them appropriately. Todo: check if steps performed in 'else' block should be perfromed regardles adp Overcurrent Change Interrupt Definition at line 304 of file dwc_otg_hcd_intr.c.

int32_t dwc_otg_hcd_handle_hc_intr (  dwc_otg_hcd_t *  dwc_otg_hcd  )

This interrupt indicates that one or more host channels has a pending interrupt. There are multiple conditions that can cause each host channel interrupt. This function determines which conditions have occurred for each host channel interrupt and handles them appropriately. Definition at line 493 of file dwc_otg_hcd_intr.c.

dwc_otg_qh_t* dwc_otg_hcd_qh_create (  dwc_otg_hcd_t *  hcd, dwc_otg_hcd_urb_t *  urb, int  atomic_alloc )

This function allocates and initializes a QH. Parameters: hcd  The HCD state structure for the DWC OTG controller. urb  Holds the information about the device/endpoint that we need to initialize the QH. atomic_alloc  Flag to do atomic allocation if needed Returns: Returns pointer to the newly allocated QH, or NULL on error. Todo: add memflags argument Definition at line 290 of file dwc_otg_hcd_queue.c.

void dwc_otg_hcd_qh_free (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh )

Free each QTD in the QH's QTD-list then free the QH. QH should already be removed from a list. QTD list should already be empty if called from URB Dequeue. Parameters: hcd  HCD instance. qh  The QH to free. Definition at line 53 of file dwc_otg_hcd_queue.c.

int dwc_otg_hcd_qh_add (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh )

This function adds a QH to either the non periodic or periodic schedule if it is not already in the schedule. If the QH is already in the schedule, no action is taken. Returns: 0 if successful, negative error code otherwise. Definition at line 468 of file dwc_otg_hcd_queue.c.

void dwc_otg_hcd_qh_remove (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh )

Removes a QH from either the non-periodic or periodic schedule. Memory is not freed. Parameters: hcd  The HCD state structure. qh  QH to remove from schedule. Definition at line 519 of file dwc_otg_hcd_queue.c.

void dwc_otg_hcd_qh_deactivate (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh, int  sched_next_periodic_split )

Deactivates a QH. For non-periodic QHs, removes the QH from the active non-periodic schedule. The QH is added to the inactive non-periodic schedule if any QTDs are still attached to the QH. For periodic QHs, the QH is removed from the periodic queued schedule. If there are any QTDs still attached to the QH, the QH is added to either the periodic inactive schedule or the periodic ready schedule and its next scheduled frame is calculated. The QH is placed in the ready schedule if the scheduled frame has been reached already. Otherwise it's placed in the inactive schedule. If there are no QTDs attached to the QH, the QH is completely removed from the periodic schedule. Definition at line 558 of file dwc_otg_hcd_queue.c.

dwc_otg_qh_t* dwc_otg_hcd_qh_alloc (  int  atomic_alloc  )  [inline, static]

Allocates memory for a QH structure. Returns: Returns the memory allocate or NULL on error. Definition at line 622 of file dwc_otg_hcd.h.

dwc_otg_qtd_t* dwc_otg_hcd_qtd_create (  dwc_otg_hcd_urb_t *  urb, int  atomic_alloc )

This function allocates and initializes a QTD. Parameters: urb  The URB to create a QTD from. Each URB-QTD pair will end up pointing to each other so each pair should have a unique correlation. atomic_alloc  Flag to do atomic alloc if needed Returns: Returns pointer to the newly allocated QTD, or NULL on error. Definition at line 638 of file dwc_otg_hcd_queue.c.

void dwc_otg_hcd_qtd_init (  dwc_otg_qtd_t *  qtd, dwc_otg_hcd_urb_t *  urb )

Initializes a QTD structure. Parameters: qtd  The QTD to initialize. urb  The URB to use for initialization. Definition at line 656 of file dwc_otg_hcd_queue.c.

int dwc_otg_hcd_qtd_add (  dwc_otg_qtd_t *  qtd, dwc_otg_hcd_t *  hcd, dwc_otg_qh_t **  qh, int  atomic_alloc )

This function adds a QTD to the QTD-list of a QH. It will find the correct QH to place the QTD into. If it does not find a QH, then it will create a new QH. If the QH to which the QTD is added is not currently scheduled, it is placed into the proper schedule based on its EP type. Parameters: [in]  qtd  The QTD to add [in]  hcd  The DWC HCD structure [out]  qh  out parameter to return queue head atomic_alloc  Flag to do atomic alloc if needed Returns: 0 if successful, negative error code otherwise. Definition at line 694 of file dwc_otg_hcd_queue.c.

dwc_otg_qtd_t* dwc_otg_hcd_qtd_alloc (  int  atomic_alloc  )  [inline, static]

Allocates memory for a QTD structure. Returns: Returns the memory allocate or NULL on error. Definition at line 638 of file dwc_otg_hcd.h.

void dwc_otg_hcd_qtd_free (  dwc_otg_qtd_t *  qtd  )  [inline, static]

Frees the memory for a QTD structure. QTD should already be removed from list. Parameters: qtd  QTD to free. Definition at line 649 of file dwc_otg_hcd.h.

void dwc_otg_hcd_qtd_remove (  dwc_otg_hcd_t *  hcd, dwc_otg_qtd_t *  qtd, dwc_otg_qh_t *  qh )  [inline, static]

Removes a QTD from list. Parameters: hcd  HCD instance. qtd  QTD to remove from list. qh  QTD belongs to. Definition at line 659 of file dwc_otg_hcd.h.

void dwc_otg_hcd_start_xfer_ddma (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh )

For Control and Bulk endpoints initializes descriptor list and starts the transfer. For Interrupt and Isochronous endpoints initializes descriptor list then updates FrameList, marking appropriate entries as active. In case of Isochronous, the starting descriptor index is calculated based on the scheduled frame, but only on the first transfer descriptor within a session. Then starts the transfer via enabling the channel. For Isochronous endpoint the channel is not halted on XferComplete interrupt so remains assigned to the endpoint(QH) until session is done. Parameters: hcd  The HCD state structure for the DWC OTG controller. qh  The QH to init. Returns: 0 if successful, negative error code otherwise. Definition at line 702 of file dwc_otg_hcd_ddma.c.

void dwc_otg_hcd_complete_xfer_ddma (  dwc_otg_hcd_t *  hcd, dwc_hc_t *  hc, dwc_otg_hc_regs_t *  hc_regs, dwc_otg_halt_status_e  halt_status )

This function is called from interrupt handlers. Scans the descriptor list, updates URB's status and calls completion routine for the URB if it's done. Releases the channel to be used by other transfers. In case of Isochronous endpoint the channel is not halted until the end of the session, i.e. QTD list is empty. If periodic channel released the FrameList is updated accordingly. Calls transaction selection routines to activate pending transfers. Parameters: hcd  The HCD state structure for the DWC OTG controller. hc  Host channel, the transfer is completed on. hc_regs  Host channel registers. halt_status  Reason the channel is being halted, or just XferComplete for isochronous transfer Todo: Consider the case when period exceeds FrameList size. Frame Rollover interrupt should be used. Definition at line 1062 of file dwc_otg_hcd_ddma.c.

int dwc_otg_hcd_qh_init_ddma (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh )

Initializes a QH structure's Descriptor DMA related members. Allocates memory for descriptor list. On first periodic QH, allocates memory for FrameList and enables periodic scheduling. Parameters: hcd  The HCD state structure for the DWC OTG controller. qh  The QH to init. Returns: 0 if successful, negative error code otherwise. Definition at line 312 of file dwc_otg_hcd_ddma.c.

void dwc_otg_hcd_qh_free_ddma (  dwc_otg_hcd_t *  hcd, dwc_otg_qh_t *  qh )

Frees descriptor list memory associated with the QH. If QH is periodic and the last, frees FrameList memory and disables periodic scheduling. Parameters: hcd  The HCD state structure for the DWC OTG controller. qh  The QH to init. Definition at line 346 of file dwc_otg_hcd_ddma.c.

int dwc_frame_num_le (  uint16_t  frame1, uint16_t  frame2 )  [inline, static]

Returns true if _frame1 is less than or equal to _frame2. The comparison is done modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the frame number when the max frame number is reached. Definition at line 725 of file dwc_otg_hcd.h.

int dwc_frame_num_gt (  uint16_t  frame1, uint16_t  frame2 )  [inline, static]

Returns true if _frame1 is greater than _frame2. The comparison is done modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the frame number when the max frame number is reached. Definition at line 736 of file dwc_otg_hcd.h.

uint16_t dwc_frame_num_inc (  uint16_t  frame, uint16_t  inc )  [inline, static]

Increments _frame by the amount specified by _inc. The addition is done modulo DWC_HFNUM_MAX_FRNUM. Returns the incremented value. Definition at line 747 of file dwc_otg_hcd.h.

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