#include "dwc_otg_hcd.h"
#include "dwc_otg_regs.h"
Go to the source code of this file.
Functions | |
| int32_t | dwc_otg_hcd_handle_intr (dwc_otg_hcd_t *dwc_otg_hcd) |
| This function should be called on every hardware interrupt. | |
| int32_t | dwc_otg_hcd_handle_sof_intr (dwc_otg_hcd_t *hcd) |
| Handles the start-of-frame interrupt in host mode. | |
| int32_t | dwc_otg_hcd_handle_rx_status_q_level_intr (dwc_otg_hcd_t *dwc_otg_hcd) |
| Handles the Rx Status Queue Level Interrupt, which indicates that there is at least one packet in the Rx FIFO. | |
| int32_t | dwc_otg_hcd_handle_np_tx_fifo_empty_intr (dwc_otg_hcd_t *dwc_otg_hcd) |
| This interrupt occurs when the non-periodic Tx FIFO is half-empty. | |
| int32_t | dwc_otg_hcd_handle_perio_tx_fifo_empty_intr (dwc_otg_hcd_t *dwc_otg_hcd) |
| This interrupt occurs when the periodic Tx FIFO is half-empty. | |
| int32_t | dwc_otg_hcd_handle_port_intr (dwc_otg_hcd_t *dwc_otg_hcd) |
| There are multiple conditions that can cause a port interrupt. | |
| int32_t | dwc_otg_hcd_handle_hc_intr (dwc_otg_hcd_t *dwc_otg_hcd) |
| This interrupt indicates that one or more host channels has a pending interrupt. | |
| uint32_t | get_actual_xfer_length (dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status, int *short_read) |
| Gets the actual length of a transfer after the transfer halts. | |
| int | update_urb_state_xfer_comp (dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_hcd_urb_t *urb, dwc_otg_qtd_t *qtd) |
| Updates the state of the URB after a Transfer Complete interrupt on the host channel. | |
| void | dwc_otg_hcd_save_data_toggle (dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| dwc_otg_halt_status_e | update_isoc_urb_state (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status) |
| Updates the state of an Isochronous URB when the transfer is stopped for any reason. | |
| void | deactivate_qh (dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh, int free_qtd) |
| Frees the first QTD in the QH's list if free_qtd is 1. | |
| void | release_channel (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status) |
| Releases a host channel for use by other transfers. | |
| void | halt_channel (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status) |
| Halts a host channel. | |
| void | complete_non_periodic_xfer (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status) |
| Performs common cleanup for non-periodic transfers after a Transfer Complete interrupt. | |
| void | complete_periodic_xfer (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status) |
| Performs common cleanup for periodic transfers after a Transfer Complete interrupt. | |
| int32_t | handle_xfercomp_isoc_split_in (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| int32_t | handle_hc_xfercomp_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel Transfer Complete interrupt. | |
| int32_t | handle_hc_stall_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel STALL interrupt. | |
| void | update_urb_state_xfer_intr (dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_hcd_urb_t *urb, dwc_otg_qtd_t *qtd, dwc_otg_halt_status_e halt_status) |
| int32_t | handle_hc_nak_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel NAK interrupt. | |
| int32_t | handle_hc_ack_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel ACK interrupt. | |
| int32_t | handle_hc_nyet_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel NYET interrupt. | |
| int32_t | handle_hc_babble_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel babble interrupt. | |
| int32_t | handle_hc_ahberr_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel AHB error interrupt. | |
| int32_t | handle_hc_xacterr_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel transaction error interrupt. | |
| int32_t | handle_hc_frmovrun_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel frame overrun interrupt. | |
| int32_t | handle_hc_datatglerr_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel data toggle error interrupt. | |
| void | handle_hc_chhltd_intr_dma (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host Channel Halted interrupt in DMA mode. | |
| int32_t | handle_hc_chhltd_intr (dwc_otg_hcd_t *hcd, dwc_hc_t *hc, dwc_otg_hc_regs_t *hc_regs, dwc_otg_qtd_t *qtd) |
| Handles a host channel Channel Halted interrupt. | |
| int32_t | dwc_otg_hcd_handle_hc_n_intr (dwc_otg_hcd_t *dwc_otg_hcd, uint32_t num) |
| Handles interrupt for a specific Host Channel. | |
Definition in file dwc_otg_hcd_intr.c.
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This function should be called on every hardware interrupt.
Definition at line 43 of file dwc_otg_hcd_intr.c. |
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Handles the start-of-frame interrupt in host mode. Non-periodic transactions may be queued to the DWC_otg controller for the current (micro)frame. Periodic transactions may be queued to the controller for the next (micro)frame. Definition at line 175 of file dwc_otg_hcd_intr.c. |
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Handles the Rx Status Queue Level Interrupt, which indicates that there is at least one packet in the Rx FIFO. The packets are moved from the FIFO to memory if the DWC_otg controller is operating in Slave mode. Definition at line 228 of file dwc_otg_hcd_intr.c. |
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This interrupt occurs when the non-periodic Tx FIFO is half-empty. More data packets may be written to the FIFO for OUT transfers. More requests may be written to the non-periodic request queue for IN transfers. This interrupt is enabled only in Slave mode. Definition at line 281 of file dwc_otg_hcd_intr.c. |
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This interrupt occurs when the periodic Tx FIFO is half-empty. More data packets may be written to the FIFO for OUT transfers. More requests may be written to the periodic request queue for IN transfers. This interrupt is enabled only in Slave mode. Definition at line 293 of file dwc_otg_hcd_intr.c. |
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There are multiple conditions that can cause a port interrupt. This function determines which interrupt conditions have occurred and handles them appropriately.
Overcurrent Change Interrupt Definition at line 304 of file dwc_otg_hcd_intr.c. |
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This interrupt indicates that one or more host channels has a pending interrupt. There are multiple conditions that can cause each host channel interrupt. This function determines which conditions have occurred for each host channel interrupt and handles them appropriately. Definition at line 493 of file dwc_otg_hcd_intr.c. |
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Gets the actual length of a transfer after the transfer halts. _halt_status holds the reason for the halt. For IN transfers where halt_status is DWC_OTG_HC_XFER_COMPLETE, *short_read is set to 1 upon return if less than the requested number of bytes were transferred. Otherwise, *short_read is set to 0 upon return. short_read may also be NULL on entry, in which case it remains unchanged. Definition at line 523 of file dwc_otg_hcd_intr.c. |
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Updates the state of the URB after a Transfer Complete interrupt on the host channel. Updates the actual_length field of the URB based on the number of bytes transferred via the host channel. Sets the URB status if the data transfer is finished.
Definition at line 574 of file dwc_otg_hcd_intr.c. |
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Updates the state of an Isochronous URB when the transfer is stopped for any reason. The fields of the current entry in the frame descriptor array are set based on the transfer state and the input _halt_status. Completes the Isochronous URB if all the URB frames have been completed.
Definition at line 666 of file dwc_otg_hcd_intr.c. |
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Frees the first QTD in the QH's list if free_qtd is 1. For non-periodic QHs, removes the QH from the active non-periodic schedule. If any QTDs are still linked to the QH, the QH is added to the end of the inactive non-periodic schedule. For periodic QHs, removes the QH from the periodic schedule if no more QTDs are linked to the QH. Definition at line 746 of file dwc_otg_hcd_intr.c. |
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Releases a host channel for use by other transfers. Attempts to select and queue more transactions since at least one host channel is available.
Definition at line 782 of file dwc_otg_hcd_intr.c. |
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Halts a host channel. If the channel cannot be halted immediately because the request queue is full, this function ensures that the FIFO empty interrupt for the appropriate queue is enabled so that the halt request can be queued when there is space in the request queue. This function may also be called in DMA mode. In that case, the channel is simply released since the core always halts the channel automatically in DMA mode. Definition at line 880 of file dwc_otg_hcd_intr.c. |
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Performs common cleanup for non-periodic transfers after a Transfer Complete interrupt. This function should be called after any endpoint type specific handling is finished to release the host channel. Definition at line 932 of file dwc_otg_hcd_intr.c. |
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Performs common cleanup for periodic transfers after a Transfer Complete interrupt. This function should be called after any endpoint type specific handling is finished to release the host channel. Definition at line 984 of file dwc_otg_hcd_intr.c. |
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Handles a host channel Transfer Complete interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1048 of file dwc_otg_hcd_intr.c. |
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Handles a host channel STALL interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1182 of file dwc_otg_hcd_intr.c. |
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Handles a host channel NAK interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1269 of file dwc_otg_hcd_intr.c. |
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Handles a host channel ACK interrupt. This interrupt is enabled when performing the PING protocol in Slave mode, when errors occur during either Slave mode or DMA mode, and during Start Split transactions. Definition at line 1349 of file dwc_otg_hcd_intr.c. |
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Handles a host channel NYET interrupt. This interrupt should only occur on Bulk and Control OUT endpoints and for complete split transactions. If a NYET occurs at the same time as a Transfer Complete interrupt, it is handled in the xfercomp interrupt handler, not here. This handler may be called in either DMA mode or Slave mode.
Definition at line 1443 of file dwc_otg_hcd_intr.c. |
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Handles a host channel babble interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1522 of file dwc_otg_hcd_intr.c. |
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Handles a host channel AHB error interrupt. This handler is only called in DMA mode. Definition at line 1556 of file dwc_otg_hcd_intr.c. |
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Handles a host channel transaction error interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1656 of file dwc_otg_hcd_intr.c. |
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Handles a host channel frame overrun interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1719 of file dwc_otg_hcd_intr.c. |
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Handles a host channel data toggle error interrupt. This handler may be called in either DMA mode or Slave mode. Definition at line 1755 of file dwc_otg_hcd_intr.c. |
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Handles a host Channel Halted interrupt in DMA mode. This handler determines the reason the channel halted and proceeds accordingly.
Definition at line 1842 of file dwc_otg_hcd_intr.c. |
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Handles a host channel Channel Halted interrupt. In slave mode, this handler is called only when the driver specifically requests a halt. This occurs during handling other host channel interrupts (e.g. nak, xacterr, stall, nyet, etc.). In DMA mode, this is the interrupt that occurs when the core has finished processing a transfer on a channel. Other host channel interrupts (except ahberr) are disabled in DMA mode. Definition at line 1989 of file dwc_otg_hcd_intr.c. |
1.3.9.1