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00034 #ifndef __DWC_OTG_REGS_H__
00035 #define __DWC_OTG_REGS_H__
00036
00037 #include "dwc_otg_core_if.h"
00038
00066
00071 typedef struct dwc_otg_core_global_regs {
00073 volatile uint32_t gotgctl;
00075 volatile uint32_t gotgint;
00077 volatile uint32_t gahbcfg;
00078
00079 #define DWC_GLBINTRMASK 0x0001
00080 #define DWC_DMAENABLE 0x0020
00081 #define DWC_NPTXEMPTYLVL_EMPTY 0x0080
00082 #define DWC_NPTXEMPTYLVL_HALFEMPTY 0x0000
00083 #define DWC_PTXEMPTYLVL_EMPTY 0x0100
00084 #define DWC_PTXEMPTYLVL_HALFEMPTY 0x0000
00085
00087 volatile uint32_t gusbcfg;
00089 volatile uint32_t grstctl;
00091 volatile uint32_t gintsts;
00093 volatile uint32_t gintmsk;
00095 volatile uint32_t grxstsr;
00097 volatile uint32_t grxstsp;
00099 volatile uint32_t grxfsiz;
00101 volatile uint32_t gnptxfsiz;
00104 volatile uint32_t gnptxsts;
00106 volatile uint32_t gi2cctl;
00108 volatile uint32_t gpvndctl;
00110 volatile uint32_t ggpio;
00112 volatile uint32_t guid;
00114 volatile uint32_t gsnpsid;
00116 volatile uint32_t ghwcfg1;
00118 volatile uint32_t ghwcfg2;
00119 #define DWC_SLAVE_ONLY_ARCH 0
00120 #define DWC_EXT_DMA_ARCH 1
00121 #define DWC_INT_DMA_ARCH 2
00122
00123 #define DWC_MODE_HNP_SRP_CAPABLE 0
00124 #define DWC_MODE_SRP_ONLY_CAPABLE 1
00125 #define DWC_MODE_NO_HNP_SRP_CAPABLE 2
00126 #define DWC_MODE_SRP_CAPABLE_DEVICE 3
00127 #define DWC_MODE_NO_SRP_CAPABLE_DEVICE 4
00128 #define DWC_MODE_SRP_CAPABLE_HOST 5
00129 #define DWC_MODE_NO_SRP_CAPABLE_HOST 6
00130
00132 volatile uint32_t ghwcfg3;
00134 volatile uint32_t ghwcfg4;
00136 volatile uint32_t glpmcfg;
00138 volatile uint32_t gpwrdn;
00140 volatile uint32_t gdfifocfg;
00142 volatile uint32_t adpctl;
00144 volatile uint32_t reserved39[39];
00146 volatile uint32_t hptxfsiz;
00150 volatile uint32_t dtxfsiz[15];
00151 } dwc_otg_core_global_regs_t;
00152
00158 typedef union gotgctl_data {
00160 uint32_t d32;
00162 struct {
00163 unsigned sesreqscs:1;
00164 unsigned sesreq:1;
00165 unsigned vbvalidoven:1;
00166 unsigned vbvalidovval:1;
00167 unsigned avalidoven:1;
00168 unsigned avalidovval:1;
00169 unsigned bvalidoven:1;
00170 unsigned bvalidovval:1;
00171 unsigned hstnegscs:1;
00172 unsigned hnpreq:1;
00173 unsigned hstsethnpen:1;
00174 unsigned devhnpen:1;
00175 unsigned reserved12_15:4;
00176 unsigned conidsts:1;
00177 unsigned dbnctime:1;
00178 unsigned asesvld:1;
00179 unsigned bsesvld:1;
00180 unsigned otgver:1;
00181 unsigned reserved1:1;
00182 unsigned multvalidbc:5;
00183 unsigned chirpen:1;
00184 unsigned reserved28_31:4;
00185 } b;
00186 } gotgctl_data_t;
00187
00193 typedef union gotgint_data {
00195 uint32_t d32;
00197 struct {
00199 unsigned reserved0_1:2;
00200
00202 unsigned sesenddet:1;
00203
00204 unsigned reserved3_7:5;
00205
00207 unsigned sesreqsucstschng:1;
00209 unsigned hstnegsucstschng:1;
00210
00211 unsigned reserved10_16:7;
00212
00214 unsigned hstnegdet:1;
00216 unsigned adevtoutchng:1;
00218 unsigned debdone:1;
00220 unsigned mvic:1;
00221
00222 unsigned reserved31_21:11;
00223
00224 } b;
00225 } gotgint_data_t;
00226
00232 typedef union gahbcfg_data {
00234 uint32_t d32;
00236 struct {
00237 unsigned glblintrmsk:1;
00238 #define DWC_GAHBCFG_GLBINT_ENABLE 1
00239
00240 unsigned hburstlen:4;
00241 #define DWC_GAHBCFG_INT_DMA_BURST_SINGLE 0
00242 #define DWC_GAHBCFG_INT_DMA_BURST_INCR 1
00243 #define DWC_GAHBCFG_INT_DMA_BURST_INCR4 3
00244 #define DWC_GAHBCFG_INT_DMA_BURST_INCR8 5
00245 #define DWC_GAHBCFG_INT_DMA_BURST_INCR16 7
00246
00247 unsigned dmaenable:1;
00248 #define DWC_GAHBCFG_DMAENABLE 1
00249 unsigned reserved:1;
00250 unsigned nptxfemplvl_txfemplvl:1;
00251 unsigned ptxfemplvl:1;
00252 #define DWC_GAHBCFG_TXFEMPTYLVL_EMPTY 1
00253 #define DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
00254 unsigned reserved9_20:12;
00255 unsigned remmemsupp:1;
00256 unsigned notialldmawrit:1;
00257 unsigned ahbsingle:1;
00258 unsigned reserved24_31:8;
00259 } b;
00260 } gahbcfg_data_t;
00261
00267 typedef union gusbcfg_data {
00269 uint32_t d32;
00271 struct {
00272 unsigned toutcal:3;
00273 unsigned phyif:1;
00274 unsigned ulpi_utmi_sel:1;
00275 unsigned fsintf:1;
00276 unsigned physel:1;
00277 unsigned ddrsel:1;
00278 unsigned srpcap:1;
00279 unsigned hnpcap:1;
00280 unsigned usbtrdtim:4;
00281 unsigned reserved1:1;
00282 unsigned phylpwrclksel:1;
00283 unsigned otgutmifssel:1;
00284 unsigned ulpi_fsls:1;
00285 unsigned ulpi_auto_res:1;
00286 unsigned ulpi_clk_sus_m:1;
00287 unsigned ulpi_ext_vbus_drv:1;
00288 unsigned ulpi_int_vbus_indicator:1;
00289 unsigned term_sel_dl_pulse:1;
00290 unsigned indicator_complement:1;
00291 unsigned indicator_pass_through:1;
00292 unsigned ulpi_int_prot_dis:1;
00293 unsigned ic_usb_cap:1;
00294 unsigned ic_traffic_pull_remove:1;
00295 unsigned tx_end_delay:1;
00296 unsigned force_host_mode:1;
00297 unsigned force_dev_mode:1;
00298 unsigned reserved31:1;
00299 } b;
00300 } gusbcfg_data_t;
00301
00307 typedef union grstctl_data {
00309 uint32_t d32;
00311 struct {
00347 unsigned csftrst:1;
00354 unsigned hsftrst:1;
00363 unsigned hstfrm:1;
00367 unsigned intknqflsh:1;
00382 unsigned rxfflsh:1;
00397 unsigned txfflsh:1;
00398
00414 unsigned txfnum:5;
00416 unsigned reserved11_29:19;
00419 unsigned dmareq:1;
00422 unsigned ahbidle:1;
00423 } b;
00424 } grstctl_t;
00425
00431 typedef union gintmsk_data {
00433 uint32_t d32;
00435 struct {
00436 unsigned reserved0:1;
00437 unsigned modemismatch:1;
00438 unsigned otgintr:1;
00439 unsigned sofintr:1;
00440 unsigned rxstsqlvl:1;
00441 unsigned nptxfempty:1;
00442 unsigned ginnakeff:1;
00443 unsigned goutnakeff:1;
00444 unsigned ulpickint:1;
00445 unsigned i2cintr:1;
00446 unsigned erlysuspend:1;
00447 unsigned usbsuspend:1;
00448 unsigned usbreset:1;
00449 unsigned enumdone:1;
00450 unsigned isooutdrop:1;
00451 unsigned eopframe:1;
00452 unsigned restoredone:1;
00453 unsigned epmismatch:1;
00454 unsigned inepintr:1;
00455 unsigned outepintr:1;
00456 unsigned incomplisoin:1;
00457 unsigned incomplisoout:1;
00458 unsigned fetsusp:1;
00459 unsigned resetdet:1;
00460 unsigned portintr:1;
00461 unsigned hcintr:1;
00462 unsigned ptxfempty:1;
00463 unsigned lpmtranrcvd:1;
00464 unsigned conidstschng:1;
00465 unsigned disconnect:1;
00466 unsigned sessreqintr:1;
00467 unsigned wkupintr:1;
00468 } b;
00469 } gintmsk_data_t;
00475 typedef union gintsts_data {
00477 uint32_t d32;
00478 #define DWC_SOF_INTR_MASK 0x0008
00479
00480 struct {
00481 #define DWC_HOST_MODE 1
00482 unsigned curmode:1;
00483 unsigned modemismatch:1;
00484 unsigned otgintr:1;
00485 unsigned sofintr:1;
00486 unsigned rxstsqlvl:1;
00487 unsigned nptxfempty:1;
00488 unsigned ginnakeff:1;
00489 unsigned goutnakeff:1;
00490 unsigned ulpickint:1;
00491 unsigned i2cintr:1;
00492 unsigned erlysuspend:1;
00493 unsigned usbsuspend:1;
00494 unsigned usbreset:1;
00495 unsigned enumdone:1;
00496 unsigned isooutdrop:1;
00497 unsigned eopframe:1;
00498 unsigned restoredone:1;
00499 unsigned epmismatch:1;
00500 unsigned inepint:1;
00501 unsigned outepintr:1;
00502 unsigned incomplisoin:1;
00503 unsigned incomplisoout:1;
00504 unsigned fetsusp:1;
00505 unsigned resetdet:1;
00506 unsigned portintr:1;
00507 unsigned hcintr:1;
00508 unsigned ptxfempty:1;
00509 unsigned lpmtranrcvd:1;
00510 unsigned conidstschng:1;
00511 unsigned disconnect:1;
00512 unsigned sessreqintr:1;
00513 unsigned wkupintr:1;
00514 } b;
00515 } gintsts_data_t;
00516
00522 typedef union device_grxsts_data {
00524 uint32_t d32;
00526 struct {
00527 unsigned epnum:4;
00528 unsigned bcnt:11;
00529 unsigned dpid:2;
00530
00531 #define DWC_STS_DATA_UPDT 0x2 // OUT Data Packet
00532 #define DWC_STS_XFER_COMP 0x3 // OUT Data Transfer Complete
00533
00534 #define DWC_DSTS_GOUT_NAK 0x1 // Global OUT NAK
00535 #define DWC_DSTS_SETUP_COMP 0x4 // Setup Phase Complete
00536 #define DWC_DSTS_SETUP_UPDT 0x6 // SETUP Packet
00537 unsigned pktsts:4;
00538 unsigned fn:4;
00539 unsigned reserved25_31:7;
00540 } b;
00541 } device_grxsts_data_t;
00542
00548 typedef union host_grxsts_data {
00550 uint32_t d32;
00552 struct {
00553 unsigned chnum:4;
00554 unsigned bcnt:11;
00555 unsigned dpid:2;
00556
00557 unsigned pktsts:4;
00558 #define DWC_GRXSTS_PKTSTS_IN 0x2
00559 #define DWC_GRXSTS_PKTSTS_IN_XFER_COMP 0x3
00560 #define DWC_GRXSTS_PKTSTS_DATA_TOGGLE_ERR 0x5
00561 #define DWC_GRXSTS_PKTSTS_CH_HALTED 0x7
00562
00563 unsigned reserved21_31:11;
00564 } b;
00565 } host_grxsts_data_t;
00566
00572 typedef union fifosize_data {
00574 uint32_t d32;
00576 struct {
00577 unsigned startaddr:16;
00578 unsigned depth:16;
00579 } b;
00580 } fifosize_data_t;
00581
00588 typedef union gnptxsts_data {
00590 uint32_t d32;
00592 struct {
00593 unsigned nptxfspcavail:16;
00594 unsigned nptxqspcavail:8;
00605 unsigned nptxqtop_terminate:1;
00606 unsigned nptxqtop_token:2;
00607 unsigned nptxqtop_chnep:4;
00608 unsigned reserved:1;
00609 } b;
00610 } gnptxsts_data_t;
00611
00618 typedef union dtxfsts_data {
00620 uint32_t d32;
00622 struct {
00623 unsigned txfspcavail:16;
00624 unsigned reserved:16;
00625 } b;
00626 } dtxfsts_data_t;
00627
00633 typedef union gi2cctl_data {
00635 uint32_t d32;
00637 struct {
00638 unsigned rwdata:8;
00639 unsigned regaddr:8;
00640 unsigned addr:7;
00641 unsigned i2cen:1;
00642 unsigned ack:1;
00643 unsigned i2csuspctl:1;
00644 unsigned i2cdevaddr:2;
00645 unsigned i2cdatse0:1;
00646 unsigned reserved:1;
00647 unsigned rw:1;
00648 unsigned bsydne:1;
00649 } b;
00650 } gi2cctl_data_t;
00651
00657 typedef union gpvndctl_data {
00659 uint32_t d32;
00661 struct {
00662 unsigned regdata:8;
00663 unsigned vctrl:8;
00664 unsigned regaddr16_21:6;
00665 unsigned regwr:1;
00666 unsigned reserved23_24:2;
00667 unsigned newregreq:1;
00668 unsigned vstsbsy:1;
00669 unsigned vstsdone:1;
00670 unsigned reserved28_30:3;
00671 unsigned disulpidrvr:1;
00672 } b;
00673 } gpvndctl_data_t;
00674
00681 typedef union ggpio_data {
00683 uint32_t d32;
00685 struct {
00686 unsigned gpi:16;
00687 unsigned gpo:16;
00688 } b;
00689 } ggpio_data_t;
00690
00696 typedef union guid_data {
00698 uint32_t d32;
00700 struct {
00701 unsigned rwdata:32;
00702 } b;
00703 } guid_data_t;
00704
00710 typedef union gsnpsid_data {
00712 uint32_t d32;
00714 struct {
00715 unsigned rwdata:32;
00716 } b;
00717 } gsnpsid_data_t;
00718
00724 typedef union hwcfg1_data {
00726 uint32_t d32;
00728 struct {
00729 unsigned ep_dir0:2;
00730 unsigned ep_dir1:2;
00731 unsigned ep_dir2:2;
00732 unsigned ep_dir3:2;
00733 unsigned ep_dir4:2;
00734 unsigned ep_dir5:2;
00735 unsigned ep_dir6:2;
00736 unsigned ep_dir7:2;
00737 unsigned ep_dir8:2;
00738 unsigned ep_dir9:2;
00739 unsigned ep_dir10:2;
00740 unsigned ep_dir11:2;
00741 unsigned ep_dir12:2;
00742 unsigned ep_dir13:2;
00743 unsigned ep_dir14:2;
00744 unsigned ep_dir15:2;
00745 } b;
00746 } hwcfg1_data_t;
00747
00753 typedef union hwcfg2_data {
00755 uint32_t d32;
00757 struct {
00758
00759 unsigned op_mode:3;
00760 #define DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG 0
00761 #define DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG 1
00762 #define DWC_HWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE_OTG 2
00763 #define DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE 3
00764 #define DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE 4
00765 #define DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST 5
00766 #define DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST 6
00767
00768 unsigned architecture:2;
00769 unsigned point2point:1;
00770 unsigned hs_phy_type:2;
00771 #define DWC_HWCFG2_HS_PHY_TYPE_NOT_SUPPORTED 0
00772 #define DWC_HWCFG2_HS_PHY_TYPE_UTMI 1
00773 #define DWC_HWCFG2_HS_PHY_TYPE_ULPI 2
00774 #define DWC_HWCFG2_HS_PHY_TYPE_UTMI_ULPI 3
00775
00776 unsigned fs_phy_type:2;
00777 unsigned num_dev_ep:4;
00778 unsigned num_host_chan:4;
00779 unsigned perio_ep_supported:1;
00780 unsigned dynamic_fifo:1;
00781 unsigned multi_proc_int:1;
00782 unsigned reserved21:1;
00783 unsigned nonperio_tx_q_depth:2;
00784 unsigned host_perio_tx_q_depth:2;
00785 unsigned dev_token_q_depth:5;
00786 unsigned otg_enable_ic_usb:1;
00787 } b;
00788 } hwcfg2_data_t;
00789
00795 typedef union hwcfg3_data {
00797 uint32_t d32;
00799 struct {
00800
00801 unsigned xfer_size_cntr_width:4;
00802 unsigned packet_size_cntr_width:3;
00803 unsigned otg_func:1;
00804 unsigned i2c:1;
00805 unsigned vendor_ctrl_if:1;
00806 unsigned optional_features:1;
00807 unsigned synch_reset_type:1;
00808 unsigned adp_supp:1;
00809 unsigned otg_enable_hsic:1;
00810 unsigned bc_support:1;
00811 unsigned otg_lpm_en:1;
00812 unsigned dfifo_depth:16;
00813 } b;
00814 } hwcfg3_data_t;
00815
00821 typedef union hwcfg4_data {
00823 uint32_t d32;
00825 struct {
00826 unsigned num_dev_perio_in_ep:4;
00827 unsigned power_optimiz:1;
00828 unsigned min_ahb_freq:1;
00829 unsigned part_power_down:1;
00830 unsigned reserved:7;
00831 unsigned utmi_phy_data_width:2;
00832 unsigned num_dev_mode_ctrl_ep:4;
00833 unsigned iddig_filt_en:1;
00834 unsigned vbus_valid_filt_en:1;
00835 unsigned a_valid_filt_en:1;
00836 unsigned b_valid_filt_en:1;
00837 unsigned session_end_filt_en:1;
00838 unsigned ded_fifo_en:1;
00839 unsigned num_in_eps:4;
00840 unsigned desc_dma:1;
00841 unsigned desc_dma_dyn:1;
00842 } b;
00843 } hwcfg4_data_t;
00844
00850 typedef union glpmctl_data {
00852 uint32_t d32;
00854 struct {
00859 unsigned lpm_cap_en:1;
00864 unsigned appl_resp:1;
00873 unsigned hird:4;
00882 unsigned rem_wkup_en:1;
00887 unsigned en_utmi_sleep:1;
00890 unsigned hird_thres:5;
00901 unsigned lpm_resp:2;
00906 unsigned prt_sleep_sts:1;
00911 unsigned sleep_state_resumeok:1;
00917 unsigned lpm_chan_index:4;
00922 unsigned retry_count:3;
00928 unsigned send_lpm:1;
00933 unsigned retry_count_sts:3;
00934 unsigned reserved28_29:2;
00942 unsigned hsic_connect:1;
00946 unsigned inv_sel_hsic:1;
00947 } b;
00948 } glpmcfg_data_t;
00949
00955 typedef union adpctl_data {
00957 uint32_t d32;
00959 struct {
00968 unsigned prb_dschg:2;
00979 unsigned prb_delta:2;
00987 unsigned prb_per:2;
00997 unsigned rtim:11;
01002 unsigned enaprb:1;
01007 unsigned enasns:1;
01012 unsigned adpres:1;
01018 unsigned adpen:1;
01024 unsigned adp_prb_int:1;
01031 unsigned adp_sns_int:1;
01040 unsigned adp_tmout_int:1;
01045 unsigned adp_prb_int_msk:1;
01050 unsigned adp_sns_int_msk:1;
01055 unsigned adp_tmout_int_msk:1;
01062 unsigned ar:2;
01064 unsigned reserved29_31:3;
01065 } b;
01066 } adpctl_data_t;
01067
01069
01079 typedef struct dwc_otg_dev_global_regs {
01081 volatile uint32_t dcfg;
01083 volatile uint32_t dctl;
01085 volatile uint32_t dsts;
01087 uint32_t unused;
01090 volatile uint32_t diepmsk;
01093 volatile uint32_t doepmsk;
01095 volatile uint32_t daint;
01098 volatile uint32_t daintmsk;
01101 volatile uint32_t dtknqr1;
01104 volatile uint32_t dtknqr2;
01106 volatile uint32_t dvbusdis;
01108 volatile uint32_t dvbuspulse;
01112 volatile uint32_t dtknqr3_dthrctl;
01116 volatile uint32_t dtknqr4_fifoemptymsk;
01119 volatile uint32_t deachint;
01122 volatile uint32_t deachintmsk;
01125 volatile uint32_t diepeachintmsk[MAX_EPS_CHANNELS];
01128 volatile uint32_t doepeachintmsk[MAX_EPS_CHANNELS];
01129 } dwc_otg_device_global_regs_t;
01130
01137 typedef union dcfg_data {
01139 uint32_t d32;
01141 struct {
01143 unsigned devspd:2;
01145 unsigned nzstsouthshk:1;
01146 #define DWC_DCFG_SEND_STALL 1
01147
01148 unsigned ena32khzs:1;
01150 unsigned devaddr:7;
01152 unsigned perfrint:2;
01153 #define DWC_DCFG_FRAME_INTERVAL_80 0
01154 #define DWC_DCFG_FRAME_INTERVAL_85 1
01155 #define DWC_DCFG_FRAME_INTERVAL_90 2
01156 #define DWC_DCFG_FRAME_INTERVAL_95 3
01157
01159 unsigned endevoutnak:1;
01160
01161 unsigned reserved14_17:4;
01163 unsigned epmscnt:5;
01165 unsigned descdma:1;
01166 unsigned perschintvl:2;
01167 unsigned resvalid:6;
01168 } b;
01169 } dcfg_data_t;
01170
01176 typedef union dctl_data {
01178 uint32_t d32;
01180 struct {
01182 unsigned rmtwkupsig:1;
01184 unsigned sftdiscon:1;
01186 unsigned gnpinnaksts:1;
01188 unsigned goutnaksts:1;
01190 unsigned tstctl:3;
01192 unsigned sgnpinnak:1;
01194 unsigned cgnpinnak:1;
01196 unsigned sgoutnak:1;
01198 unsigned cgoutnak:1;
01200 unsigned pwronprgdone:1;
01202 unsigned reserved:1;
01204 unsigned gmc:2;
01206 unsigned ifrmnum:1;
01208 unsigned nakonbble:1;
01210 unsigned encontonbna:1;
01211
01212 unsigned reserved18_31:14;
01213 } b;
01214 } dctl_data_t;
01215
01221 typedef union dsts_data {
01223 uint32_t d32;
01225 struct {
01227 unsigned suspsts:1;
01229 unsigned enumspd:2;
01230 #define DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
01231 #define DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
01232 #define DWC_DSTS_ENUMSPD_LS_PHY_6MHZ 2
01233 #define DWC_DSTS_ENUMSPD_FS_PHY_48MHZ 3
01234
01235 unsigned errticerr:1;
01236 unsigned reserved4_7:4;
01238 unsigned soffn:14;
01239 unsigned reserved22_31:10;
01240 } b;
01241 } dsts_data_t;
01242
01250 typedef union diepint_data {
01252 uint32_t d32;
01254 struct {
01256 unsigned xfercompl:1;
01258 unsigned epdisabled:1;
01260 unsigned ahberr:1;
01262 unsigned timeout:1;
01264 unsigned intktxfemp:1;
01266 unsigned intknepmis:1;
01268 unsigned inepnakeff:1;
01270 unsigned emptyintr:1;
01271
01272 unsigned txfifoundrn:1;
01273
01275 unsigned bna:1;
01276
01277 unsigned reserved10_12:3;
01279 unsigned nak:1;
01280
01281 unsigned reserved14_31:18;
01282 } b;
01283 } diepint_data_t;
01284
01289 typedef union diepint_data diepmsk_data_t;
01290
01298 typedef union doepint_data {
01300 uint32_t d32;
01302 struct {
01304 unsigned xfercompl:1;
01306 unsigned epdisabled:1;
01308 unsigned ahberr:1;
01310 unsigned setup:1;
01312 unsigned outtknepdis:1;
01313
01314 unsigned stsphsercvd:1;
01316 unsigned back2backsetup:1;
01317
01318 unsigned reserved7:1;
01320 unsigned outpkterr:1;
01322 unsigned bna:1;
01323
01324 unsigned reserved10:1;
01326 unsigned pktdrpsts:1;
01328 unsigned babble:1;
01330 unsigned nak:1;
01332 unsigned nyet:1;
01333
01334 unsigned reserved15_31:17;
01335 } b;
01336 } doepint_data_t;
01337
01342 typedef union doepint_data doepmsk_data_t;
01343
01350 typedef union daint_data {
01352 uint32_t d32;
01354 struct {
01356 unsigned in:16;
01358 unsigned out:16;
01359 } ep;
01360 struct {
01362 unsigned inep0:1;
01363 unsigned inep1:1;
01364 unsigned inep2:1;
01365 unsigned inep3:1;
01366 unsigned inep4:1;
01367 unsigned inep5:1;
01368 unsigned inep6:1;
01369 unsigned inep7:1;
01370 unsigned inep8:1;
01371 unsigned inep9:1;
01372 unsigned inep10:1;
01373 unsigned inep11:1;
01374 unsigned inep12:1;
01375 unsigned inep13:1;
01376 unsigned inep14:1;
01377 unsigned inep15:1;
01379 unsigned outep0:1;
01380 unsigned outep1:1;
01381 unsigned outep2:1;
01382 unsigned outep3:1;
01383 unsigned outep4:1;
01384 unsigned outep5:1;
01385 unsigned outep6:1;
01386 unsigned outep7:1;
01387 unsigned outep8:1;
01388 unsigned outep9:1;
01389 unsigned outep10:1;
01390 unsigned outep11:1;
01391 unsigned outep12:1;
01392 unsigned outep13:1;
01393 unsigned outep14:1;
01394 unsigned outep15:1;
01395 } b;
01396 } daint_data_t;
01397
01404 typedef union dtknq1_data {
01406 uint32_t d32;
01408 struct {
01410 unsigned intknwptr:5;
01412 unsigned reserved05_06:2;
01414 unsigned wrap_bit:1;
01416 unsigned epnums0_5:24;
01417 } b;
01418 } dtknq1_data_t;
01419
01425 typedef union dthrctl_data {
01427 uint32_t d32;
01429 struct {
01431 unsigned non_iso_thr_en:1;
01433 unsigned iso_thr_en:1;
01435 unsigned tx_thr_len:9;
01437 unsigned ahb_thr_ratio:2;
01439 unsigned reserved13_15:3;
01441 unsigned rx_thr_en:1;
01443 unsigned rx_thr_len:9;
01444 unsigned reserved26:1;
01446 unsigned arbprken:1;
01448 unsigned reserved28_31:4;
01449 } b;
01450 } dthrctl_data_t;
01451
01462 typedef struct dwc_otg_dev_in_ep_regs {
01465 volatile uint32_t diepctl;
01467 uint32_t reserved04;
01470 volatile uint32_t diepint;
01472 uint32_t reserved0C;
01475 volatile uint32_t dieptsiz;
01478 volatile uint32_t diepdma;
01481 volatile uint32_t dtxfsts;
01484 volatile uint32_t diepdmab;
01485 } dwc_otg_dev_in_ep_regs_t;
01486
01497 typedef struct dwc_otg_dev_out_ep_regs {
01500 volatile uint32_t doepctl;
01502 uint32_t reserved04;
01505 volatile uint32_t doepint;
01507 uint32_t reserved0C;
01510 volatile uint32_t doeptsiz;
01513 volatile uint32_t doepdma;
01515 uint32_t unused;
01518 uint32_t doepdmab;
01519 } dwc_otg_dev_out_ep_regs_t;
01520
01526 typedef union depctl_data {
01528 uint32_t d32;
01530 struct {
01538 unsigned mps:11;
01539 #define DWC_DEP0CTL_MPS_64 0
01540 #define DWC_DEP0CTL_MPS_32 1
01541 #define DWC_DEP0CTL_MPS_16 2
01542 #define DWC_DEP0CTL_MPS_8 3
01543
01547 unsigned nextep:4;
01548
01550 unsigned usbactep:1;
01551
01566 unsigned dpid:1;
01567
01569 unsigned naksts:1;
01570
01576 unsigned eptype:2;
01577
01581 unsigned snp:1;
01582
01584 unsigned stall:1;
01585
01589 unsigned txfnum:4;
01590
01592 unsigned cnak:1;
01594 unsigned snak:1;
01603 unsigned setd0pid:1;
01611 unsigned setd1pid:1;
01612
01614 unsigned epdis:1;
01616 unsigned epena:1;
01617 } b;
01618 } depctl_data_t;
01619
01625 typedef union deptsiz_data {
01627 uint32_t d32;
01629 struct {
01631 unsigned xfersize:19;
01633 #define MAX_PKT_CNT 1023
01634
01635 unsigned pktcnt:10;
01637 unsigned mc:2;
01638 unsigned reserved:1;
01639 } b;
01640 } deptsiz_data_t;
01641
01647 typedef union deptsiz0_data {
01649 uint32_t d32;
01651 struct {
01653 unsigned xfersize:7;
01655 unsigned reserved7_18:12;
01657 unsigned pktcnt:2;
01659 unsigned reserved21_28:8;
01661 unsigned supcnt:2;
01662 unsigned reserved31;
01663 } b;
01664 } deptsiz0_data_t;
01665
01667
01668
01669
01672 #define BS_HOST_READY 0x0
01673 #define BS_DMA_BUSY 0x1
01674 #define BS_DMA_DONE 0x2
01675 #define BS_HOST_BUSY 0x3
01676
01679 #define RTS_SUCCESS 0x0
01680 #define RTS_BUFFLUSH 0x1
01681 #define RTS_RESERVED 0x2
01682 #define RTS_BUFERR 0x3
01683
01690 typedef union dev_dma_desc_sts {
01692 uint32_t d32;
01694 struct {
01696 unsigned bytes:16;
01698 unsigned nak:1;
01699 unsigned reserved17_22:6;
01701 unsigned mtrf:1;
01703 unsigned sr:1;
01705 unsigned ioc:1;
01707 unsigned sp:1;
01709 unsigned l:1;
01711 unsigned sts:2;
01713 unsigned bs:2;
01714 } b;
01715
01716
01718 struct {
01720 unsigned rxbytes:11;
01721
01722 unsigned reserved11:1;
01724 unsigned framenum:11;
01726 unsigned pid:2;
01728 unsigned ioc:1;
01730 unsigned sp:1;
01732 unsigned l:1;
01734 unsigned rxsts:2;
01736 unsigned bs:2;
01737 } b_iso_out;
01738
01740 struct {
01742 unsigned txbytes:12;
01744 unsigned framenum:11;
01746 unsigned pid:2;
01748 unsigned ioc:1;
01750 unsigned sp:1;
01752 unsigned l:1;
01754 unsigned txsts:2;
01756 unsigned bs:2;
01757 } b_iso_in;
01758
01759 } dev_dma_desc_sts_t;
01760
01767 typedef struct dwc_otg_dev_dma_desc {
01769 dev_dma_desc_sts_t status;
01771 uint32_t buf;
01772 } dwc_otg_dev_dma_desc_t;
01773
01779 typedef struct dwc_otg_dev_if {
01783 dwc_otg_device_global_regs_t *dev_global_regs;
01784 #define DWC_DEV_GLOBAL_REG_OFFSET 0x800
01785
01789 dwc_otg_dev_in_ep_regs_t *in_ep_regs[MAX_EPS_CHANNELS];
01790 #define DWC_DEV_IN_EP_REG_OFFSET 0x900
01791 #define DWC_EP_REG_OFFSET 0x20
01792
01794 dwc_otg_dev_out_ep_regs_t *out_ep_regs[MAX_EPS_CHANNELS];
01795 #define DWC_DEV_OUT_EP_REG_OFFSET 0xB00
01796
01797
01798 uint8_t speed;
01799 uint8_t num_in_eps;
01800 uint8_t num_out_eps;
01803 uint16_t perio_tx_fifo_size[MAX_PERIO_FIFOS];
01804
01806 uint16_t tx_fifo_size[MAX_TX_FIFOS];
01807
01809 uint16_t rx_thr_en;
01810 uint16_t iso_tx_thr_en;
01811 uint16_t non_iso_tx_thr_en;
01812
01813 uint16_t rx_thr_length;
01814 uint16_t tx_thr_length;
01815
01822 dwc_dma_t dma_setup_desc_addr[2];
01823 dwc_otg_dev_dma_desc_t *setup_desc_addr[2];
01824
01826 dwc_otg_dev_dma_desc_t *psetup;
01827
01829 uint32_t setup_desc_index;
01830
01832 dwc_dma_t dma_in_desc_addr;
01833 dwc_otg_dev_dma_desc_t *in_desc_addr;
01834
01836 dwc_dma_t dma_out_desc_addr;
01837 dwc_otg_dev_dma_desc_t *out_desc_addr;
01838
01840 uint32_t spd;
01842 void *isoc_ep;
01843
01844 } dwc_otg_dev_if_t;
01845
01847
01848
01854 typedef struct dwc_otg_host_global_regs {
01856 volatile uint32_t hcfg;
01858 volatile uint32_t hfir;
01860 volatile uint32_t hfnum;
01862 uint32_t reserved40C;
01864 volatile uint32_t hptxsts;
01866 volatile uint32_t haint;
01868 volatile uint32_t haintmsk;
01870 volatile uint32_t hflbaddr;
01871 } dwc_otg_host_global_regs_t;
01872
01878 typedef union hcfg_data {
01880 uint32_t d32;
01881
01883 struct {
01885 unsigned fslspclksel:2;
01886 #define DWC_HCFG_30_60_MHZ 0
01887 #define DWC_HCFG_48_MHZ 1
01888 #define DWC_HCFG_6_MHZ 2
01889
01891 unsigned fslssupp:1;
01892 unsigned reserved3_6:4;
01894 unsigned ena32khzs:1;
01896 unsigned resvalid:8;
01897 unsigned reserved16_22:7;
01899 unsigned descdma:1;
01901 unsigned frlisten:2;
01903 unsigned perschedena:1;
01904 unsigned reserved27_30:4;
01905 unsigned modechtimen:1;
01906 } b;
01907 } hcfg_data_t;
01908
01913 typedef union hfir_data {
01915 uint32_t d32;
01916
01918 struct {
01919 unsigned frint:16;
01920 unsigned hfirrldctrl:1;
01921 unsigned reserved:15;
01922 } b;
01923 } hfir_data_t;
01924
01929 typedef union hfnum_data {
01931 uint32_t d32;
01932
01934 struct {
01935 unsigned frnum:16;
01936 #define DWC_HFNUM_MAX_FRNUM 0x3FFF
01937 unsigned frrem:16;
01938 } b;
01939 } hfnum_data_t;
01940
01941 typedef union hptxsts_data {
01943 uint32_t d32;
01944
01946 struct {
01947 unsigned ptxfspcavail:16;
01948 unsigned ptxqspcavail:8;
01958 unsigned ptxqtop_terminate:1;
01959 unsigned ptxqtop_token:2;
01960 unsigned ptxqtop_chnum:4;
01961 unsigned ptxqtop_odd:1;
01962 } b;
01963 } hptxsts_data_t;
01964
01971 typedef union hprt0_data {
01973 uint32_t d32;
01975 struct {
01976 unsigned prtconnsts:1;
01977 unsigned prtconndet:1;
01978 unsigned prtena:1;
01979 unsigned prtenchng:1;
01980 unsigned prtovrcurract:1;
01981 unsigned prtovrcurrchng:1;
01982 unsigned prtres:1;
01983 unsigned prtsusp:1;
01984 unsigned prtrst:1;
01985 unsigned reserved9:1;
01986 unsigned prtlnsts:2;
01987 unsigned prtpwr:1;
01988 unsigned prttstctl:4;
01989 unsigned prtspd:2;
01990 #define DWC_HPRT0_PRTSPD_HIGH_SPEED 0
01991 #define DWC_HPRT0_PRTSPD_FULL_SPEED 1
01992 #define DWC_HPRT0_PRTSPD_LOW_SPEED 2
01993 unsigned reserved19_31:13;
01994 } b;
01995 } hprt0_data_t;
01996
02001 typedef union haint_data {
02003 uint32_t d32;
02005 struct {
02006 unsigned ch0:1;
02007 unsigned ch1:1;
02008 unsigned ch2:1;
02009 unsigned ch3:1;
02010 unsigned ch4:1;
02011 unsigned ch5:1;
02012 unsigned ch6:1;
02013 unsigned ch7:1;
02014 unsigned ch8:1;
02015 unsigned ch9:1;
02016 unsigned ch10:1;
02017 unsigned ch11:1;
02018 unsigned ch12:1;
02019 unsigned ch13:1;
02020 unsigned ch14:1;
02021 unsigned ch15:1;
02022 unsigned reserved:16;
02023 } b;
02024
02025 struct {
02026 unsigned chint:16;
02027 unsigned reserved:16;
02028 } b2;
02029 } haint_data_t;
02030
02035 typedef union haintmsk_data {
02037 uint32_t d32;
02039 struct {
02040 unsigned ch0:1;
02041 unsigned ch1:1;
02042 unsigned ch2:1;
02043 unsigned ch3:1;
02044 unsigned ch4:1;
02045 unsigned ch5:1;
02046 unsigned ch6:1;
02047 unsigned ch7:1;
02048 unsigned ch8:1;
02049 unsigned ch9:1;
02050 unsigned ch10:1;
02051 unsigned ch11:1;
02052 unsigned ch12:1;
02053 unsigned ch13:1;
02054 unsigned ch14:1;
02055 unsigned ch15:1;
02056 unsigned reserved:16;
02057 } b;
02058
02059 struct {
02060 unsigned chint:16;
02061 unsigned reserved:16;
02062 } b2;
02063 } haintmsk_data_t;
02064
02068 typedef struct dwc_otg_hc_regs {
02070 volatile uint32_t hcchar;
02072 volatile uint32_t hcsplt;
02074 volatile uint32_t hcint;
02076 volatile uint32_t hcintmsk;
02078 volatile uint32_t hctsiz;
02080 volatile uint32_t hcdma;
02081 volatile uint32_t reserved;
02083 volatile uint32_t hcdmab;
02084 } dwc_otg_hc_regs_t;
02085
02092 typedef union hcchar_data {
02094 uint32_t d32;
02095
02097 struct {
02099 unsigned mps:11;
02100
02102 unsigned epnum:4;
02103
02105 unsigned epdir:1;
02106
02107 unsigned reserved:1;
02108
02110 unsigned lspddev:1;
02111
02113 unsigned eptype:2;
02114
02116 unsigned multicnt:2;
02117
02119 unsigned devaddr:7;
02120
02125 unsigned oddfrm:1;
02126
02128 unsigned chdis:1;
02129
02131 unsigned chen:1;
02132 } b;
02133 } hcchar_data_t;
02134
02135 typedef union hcsplt_data {
02137 uint32_t d32;
02138
02140 struct {
02142 unsigned prtaddr:7;
02143
02145 unsigned hubaddr:7;
02146
02148 unsigned xactpos:2;
02149 #define DWC_HCSPLIT_XACTPOS_MID 0
02150 #define DWC_HCSPLIT_XACTPOS_END 1
02151 #define DWC_HCSPLIT_XACTPOS_BEGIN 2
02152 #define DWC_HCSPLIT_XACTPOS_ALL 3
02153
02155 unsigned compsplt:1;
02156
02158 unsigned reserved:14;
02159
02161 unsigned spltena:1;
02162 } b;
02163 } hcsplt_data_t;
02164
02169 typedef union hcint_data {
02171 uint32_t d32;
02173 struct {
02175 unsigned xfercomp:1;
02177 unsigned chhltd:1;
02179 unsigned ahberr:1;
02181 unsigned stall:1;
02183 unsigned nak:1;
02185 unsigned ack:1;
02187 unsigned nyet:1;
02189 unsigned xacterr:1;
02191 unsigned bblerr:1;
02193 unsigned frmovrun:1;
02195 unsigned datatglerr:1;
02197 unsigned bna:1;
02199 unsigned xcs_xact:1;
02201 unsigned frm_list_roll:1;
02203 unsigned reserved14_31:18;
02204 } b;
02205 } hcint_data_t;
02206
02213 typedef union hcintmsk_data {
02215 uint32_t d32;
02216
02218 struct {
02219 unsigned xfercompl:1;
02220 unsigned chhltd:1;
02221 unsigned ahberr:1;
02222 unsigned stall:1;
02223 unsigned nak:1;
02224 unsigned ack:1;
02225 unsigned nyet:1;
02226 unsigned xacterr:1;
02227 unsigned bblerr:1;
02228 unsigned frmovrun:1;
02229 unsigned datatglerr:1;
02230 unsigned bna:1;
02231 unsigned xcs_xact:1;
02232 unsigned frm_list_roll:1;
02233 unsigned reserved14_31:18;
02234 } b;
02235 } hcintmsk_data_t;
02236
02244 typedef union hctsiz_data {
02246 uint32_t d32;
02247
02249 struct {
02251 unsigned xfersize:19;
02252
02254 unsigned pktcnt:10;
02255
02263 unsigned pid:2;
02264 #define DWC_HCTSIZ_DATA0 0
02265 #define DWC_HCTSIZ_DATA1 2
02266 #define DWC_HCTSIZ_DATA2 1
02267 #define DWC_HCTSIZ_MDATA 3
02268 #define DWC_HCTSIZ_SETUP 3
02269
02271 unsigned dopng:1;
02272 } b;
02273
02275 struct {
02277 unsigned schinfo:8;
02278
02284 unsigned ntd:8;
02285
02287 unsigned reserved16_28:13;
02288
02296 unsigned pid:2;
02297
02299 unsigned dopng:1;
02300 } b_ddma;
02301 } hctsiz_data_t;
02302
02307 typedef union hcdma_data {
02309 uint32_t d32;
02311 struct {
02312 unsigned reserved0_2:3;
02314 unsigned ctd:8;
02316 unsigned dma_addr:21;
02317 } b;
02318 } hcdma_data_t;
02319
02325 typedef union host_dma_desc_sts {
02327 uint32_t d32;
02330
02331 struct {
02333 unsigned n_bytes:17;
02335 unsigned qtd_offset:6;
02340 unsigned a_qtd:1;
02345 unsigned sup:1;
02347 unsigned ioc:1;
02349 unsigned eol:1;
02350 unsigned reserved27:1;
02352 unsigned sts:2;
02353 #define DMA_DESC_STS_PKTERR 1
02354 unsigned reserved30:1;
02356 unsigned a:1;
02357 } b;
02358
02359 struct {
02361 unsigned n_bytes:12;
02362 unsigned reserved12_24:13;
02364 unsigned ioc:1;
02365 unsigned reserved26_27:2;
02367 unsigned sts:2;
02368 unsigned reserved30:1;
02370 unsigned a:1;
02371 } b_isoc;
02372 } host_dma_desc_sts_t;
02373
02374 #define MAX_DMA_DESC_SIZE 131071
02375 #define MAX_DMA_DESC_NUM_GENERIC 64
02376 #define MAX_DMA_DESC_NUM_HS_ISOC 256
02377 #define MAX_FRLIST_EN_NUM 64
02378
02384 typedef struct dwc_otg_host_dma_desc {
02386 host_dma_desc_sts_t status;
02388 uint32_t buf;
02389 } dwc_otg_host_dma_desc_t;
02390
02398 typedef struct dwc_otg_host_if {
02400 dwc_otg_host_global_regs_t *host_global_regs;
02401 #define DWC_OTG_HOST_GLOBAL_REG_OFFSET 0x400
02402
02404 volatile uint32_t *hprt0;
02405 #define DWC_OTG_HOST_PORT_REGS_OFFSET 0x440
02406
02408 dwc_otg_hc_regs_t *hc_regs[MAX_EPS_CHANNELS];
02409 #define DWC_OTG_HOST_CHAN_REGS_OFFSET 0x500
02410 #define DWC_OTG_CHAN_REGS_OFFSET 0x20
02411
02412
02414 uint8_t num_host_channels;
02416 uint8_t perio_eps_supported;
02418 uint16_t perio_tx_fifo_size;
02419
02420 } dwc_otg_host_if_t;
02421
02427 typedef union pcgcctl_data {
02429 uint32_t d32;
02430
02432 struct {
02434 unsigned stoppclk:1;
02436 unsigned gatehclk:1;
02438 unsigned pwrclmp:1;
02440 unsigned rstpdwnmodule:1;
02442 unsigned reserved:1;
02444 unsigned enbl_sleep_gating:1;
02446 unsigned phy_in_sleep:1;
02448 unsigned deep_sleep:1;
02449 unsigned resetaftsusp:1;
02450 unsigned restoremode:1;
02451 unsigned reserved10_12:3;
02452 unsigned ess_reg_restored:1;
02453 unsigned prt_clk_sel:2;
02454 unsigned port_power:1;
02455 unsigned max_xcvrselect:2;
02456 unsigned max_termsel:1;
02457 unsigned mac_dev_addr:7;
02458 unsigned p2hd_dev_enum_spd:2;
02459 unsigned p2hd_prt_spd:2;
02460 unsigned if_dev_mode:1;
02461 } b;
02462 } pcgcctl_data_t;
02463
02469 typedef union gdfifocfg_data {
02470
02471 uint32_t d32;
02473 struct {
02475 unsigned gdfifocfg:16;
02477 unsigned epinfobase:16;
02478 } b;
02479 } gdfifocfg_data_t;
02480
02486 typedef union gpwrdn_data {
02487
02488 uint32_t d32;
02489
02491 struct {
02493 unsigned pmuintsel:1;
02495 unsigned pmuactv:1;
02497 unsigned restore:1;
02499 unsigned pwrdnclmp:1;
02501 unsigned pwrdnrstn:1;
02503 unsigned pwrdnswtch:1;
02505 unsigned dis_vbus:1;
02507 unsigned lnstschng:1;
02509 unsigned lnstchng_msk:1;
02511 unsigned rst_det:1;
02513 unsigned rst_det_msk:1;
02515 unsigned disconn_det:1;
02517 unsigned disconn_det_msk:1;
02519 unsigned connect_det:1;
02521 unsigned connect_det_msk:1;
02523 unsigned srp_det:1;
02525 unsigned srp_det_msk:1;
02527 unsigned sts_chngint:1;
02529 unsigned sts_chngint_msk:1;
02531 unsigned linestate:2;
02533 unsigned idsts:1;
02535 unsigned bsessvld:1;
02537 unsigned adp_int:1;
02539 unsigned mult_val_id_bc:5;
02541 unsigned reserved29_31:3;
02542 } b;
02543 } gpwrdn_data_t;
02544
02545 #endif
