dwc_otg_dev_in_ep_regs Struct Reference

Device Logical IN Endpoint-Specific Registers. More...

#include <dwc_otg_regs.h>

Data Fields
volatile uint32_t	diepctl
	Device IN Endpoint Control Register.
uint32_t	reserved04
	Reserved.
volatile uint32_t	diepint
	Device IN Endpoint Interrupt Register.
uint32_t	reserved0C
	Reserved.
volatile uint32_t	dieptsiz
	Device IN Endpoint Transfer Size Register.
volatile uint32_t	diepdma
	Device IN Endpoint DMA Address Register.
volatile uint32_t	dtxfsts
	Device IN Endpoint Transmit FIFO Status Register.
volatile uint32_t	diepdmab
	Device IN Endpoint DMA Buffer Register.

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Detailed Description

Device Logical IN Endpoint-Specific Registers.

Offsets 900h-AFCh

There will be one set of endpoint registers per logical endpoint implemented.

These registers are visible only in Device mode and must not be accessed in Host mode, as the results are unknown.

Definition at line 1462 of file dwc_otg_regs.h.

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Field Documentation

volatile uint32_t dwc_otg_dev_in_ep_regs::diepctl

Device IN Endpoint Control Register. Offset:900h + (ep_num * 20h) + 00h Definition at line 1465 of file dwc_otg_regs.h.

uint32_t dwc_otg_dev_in_ep_regs::reserved04

Reserved. Offset:900h + (ep_num * 20h) + 04h Definition at line 1467 of file dwc_otg_regs.h.

volatile uint32_t dwc_otg_dev_in_ep_regs::diepint

Device IN Endpoint Interrupt Register. Offset:900h + (ep_num * 20h) + 08h Definition at line 1470 of file dwc_otg_regs.h.

uint32_t dwc_otg_dev_in_ep_regs::reserved0C

Reserved. Offset:900h + (ep_num * 20h) + 0Ch Definition at line 1472 of file dwc_otg_regs.h.

volatile uint32_t dwc_otg_dev_in_ep_regs::dieptsiz

Device IN Endpoint Transfer Size Register. Offset:900h + (ep_num * 20h) + 10h Definition at line 1475 of file dwc_otg_regs.h.

volatile uint32_t dwc_otg_dev_in_ep_regs::diepdma

Device IN Endpoint DMA Address Register. Offset:900h + (ep_num * 20h) + 14h Definition at line 1478 of file dwc_otg_regs.h.

volatile uint32_t dwc_otg_dev_in_ep_regs::dtxfsts

Device IN Endpoint Transmit FIFO Status Register. Offset:900h + (ep_num * 20h) + 18h Definition at line 1481 of file dwc_otg_regs.h.

volatile uint32_t dwc_otg_dev_in_ep_regs::diepdmab

Device IN Endpoint DMA Buffer Register. Offset:900h + (ep_num * 20h) + 1Ch Definition at line 1484 of file dwc_otg_regs.h.

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The documentation for this struct was generated from the following file:

• dwc_otg_regs.h

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