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dwc_otg_qh Struct Reference

A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint. More...

#include <dwc_otg_hcd.h>


Data Fields

uint8_t ep_type
 Endpoint type.
uint8_t ep_is_in
uint16_t maxp
 wMaxPacketSize Field of Endpoint Descriptor.
uint8_t dev_speed
 Device speed.
uint8_t data_toggle
 Determines the PID of the next data packet for non-control transfers.
uint8_t ping_state
 Ping state if 1.
dwc_otg_qtd_list qtd_list
 List of QTDs for this QH.
dwc_hcchannel
 Host channel currently processing transfers for this QH.
uint8_t do_split
 Full/low speed endpoint on high-speed hub requires split.
uint8_t * dw_align_buf
 Used instead of original buffer if it(physical address) is not dword-aligned.
dwc_dma_t dw_align_buf_dma
dwc_list_link_t qh_list_entry
 Entry for QH in either the periodic or non-periodic schedule.
Periodic schedule information
uint16_t usecs
 Bandwidth in microseconds per (micro)frame.
uint16_t interval
 Interval between transfers in (micro)frames.
uint16_t sched_frame
 (micro)frame to initialize a periodic transfer.
uint16_t start_split_frame
 (micro)frame at which last start split was initialized.
Descriptor DMA support
dwc_otg_host_dma_desc_tdesc_list
 Descriptor List.
dwc_dma_t desc_list_dma
 Descriptor List physical address.
uint32_t * n_bytes
 Xfer Bytes array.
uint16_t ntd
 Actual number of transfer descriptors in a list.
uint8_t td_first
 First activated isochronous transfer descriptor index.
uint8_t td_last
 Last activated isochronous transfer descriptor index.


Detailed Description

A Queue Head (QH) holds the static characteristics of an endpoint and maintains a list of transfers (QTDs) for that endpoint.

A QH structure may be entered in either the non-periodic or periodic schedule.

Definition at line 262 of file dwc_otg_hcd.h.


Field Documentation

uint8_t dwc_otg_qh::ep_type
 

Endpoint type.

One of the following values:

  • UE_CONTROL
  • UE_BULK
  • UE_INTERRUPT
  • UE_ISOCHRONOUS

Definition at line 271 of file dwc_otg_hcd.h.

uint8_t dwc_otg_qh::dev_speed
 

Device speed.

One of the following values:

  • DWC_OTG_EP_SPEED_LOW
  • DWC_OTG_EP_SPEED_FULL
  • DWC_OTG_EP_SPEED_HIGH

Definition at line 284 of file dwc_otg_hcd.h.

uint8_t dwc_otg_qh::data_toggle
 

Determines the PID of the next data packet for non-control transfers.

Ignored for control transfers.
One of the following values:

  • DWC_OTG_HC_PID_DATA0
  • DWC_OTG_HC_PID_DATA1

Definition at line 293 of file dwc_otg_hcd.h.

struct dwc_otg_qtd_list dwc_otg_qh::qtd_list
 

List of QTDs for this QH.

Definition at line 301 of file dwc_otg_hcd.h.

uint16_t dwc_otg_qh::sched_frame
 

(micro)frame to initialize a periodic transfer.

The transfer executes in the following (micro)frame.

Definition at line 322 of file dwc_otg_hcd.h.

uint8_t* dwc_otg_qh::dw_align_buf
 

Used instead of original buffer if it(physical address) is not dword-aligned.

Definition at line 333 of file dwc_otg_hcd.h.

uint32_t* dwc_otg_qh::n_bytes
 

Xfer Bytes array.

Each element corresponds to a descriptor and indicates original XferSize size value for the descriptor.

Definition at line 353 of file dwc_otg_hcd.h.


The documentation for this struct was generated from the following file:
Generated on Thu Oct 27 03:56:38 2011 for DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver by  doxygen 1.3.9.1