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host_dma_desc_sts Union Reference

This union represents the bit fields in the DMA Descriptor status quadlet for host mode. More...

#include <dwc_otg_regs.h>


Data Fields

uint32_t d32
 raw register data
struct {
   unsigned   n_bytes:17
 Number of bytes.
   unsigned   qtd_offset:6
 QTD offset to jump when Short Packet received - only for IN EPs.
   unsigned   a_qtd:1
 Set to request the core to jump to alternate QTD if Short Packet received - only for IN EPs.
   unsigned   sup:1
 Setup Packet bit.
   unsigned   ioc:1
 Interrupt On Complete.
   unsigned   eol:1
 End of List.
   unsigned   reserved27:1
   unsigned   sts:2
 Rx/Tx Status.
   unsigned   reserved30:1
   unsigned   a:1
 Active Bit.
b
 quadlet bits
struct {
   unsigned   n_bytes:12
 Number of bytes.
   unsigned   reserved12_24:13
   unsigned   ioc:1
 Interrupt On Complete.
   unsigned   reserved26_27:2
   unsigned   sts:2
 Rx/Tx Status.
   unsigned   reserved30:1
   unsigned   a:1
 Active Bit.
b_isoc


Detailed Description

This union represents the bit fields in the DMA Descriptor status quadlet for host mode.

Read the quadlet into the d32 member then set/clear the bits using the bit elements.

Definition at line 2325 of file dwc_otg_regs.h.


Field Documentation

unsigned host_dma_desc_sts::sup
 

Setup Packet bit.

When set indicates that buffer contains setup packet.

Definition at line 2345 of file dwc_otg_regs.h.


The documentation for this union was generated from the following file:
Generated on Thu Oct 27 03:56:38 2011 for DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver by  doxygen 1.3.9.1