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pcgcctl_data Union Reference

This union represents the bit fields in the Power and Clock Gating Control Register. More...

#include <dwc_otg_regs.h>


Data Fields

uint32_t d32
 raw register data
struct {
   unsigned   stoppclk:1
 Stop Pclk.
   unsigned   gatehclk:1
 Gate Hclk.
   unsigned   pwrclmp:1
 Power Clamp.
   unsigned   rstpdwnmodule:1
 Reset Power Down Modules.
   unsigned   reserved:1
 Reserved.
   unsigned   enbl_sleep_gating:1
 Enable Sleep Clock Gating (Enbl_L1Gating).
   unsigned   phy_in_sleep:1
 PHY In Sleep (PhySleep).
   unsigned   deep_sleep:1
 Deep Sleep.
   unsigned   resetaftsusp:1
   unsigned   restoremode:1
   unsigned   reserved10_12:3
   unsigned   ess_reg_restored:1
   unsigned   prt_clk_sel:2
   unsigned   port_power:1
   unsigned   max_xcvrselect:2
   unsigned   max_termsel:1
   unsigned   mac_dev_addr:7
   unsigned   p2hd_dev_enum_spd:2
   unsigned   p2hd_prt_spd:2
   unsigned   if_dev_mode:1
b
 register bits


Detailed Description

This union represents the bit fields in the Power and Clock Gating Control Register.

Read the register into the d32 member then set/clear the bits using the bit elements.

Definition at line 2427 of file dwc_otg_regs.h.


The documentation for this union was generated from the following file:
Generated on Thu Oct 27 03:56:38 2011 for DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver by  doxygen 1.3.9.1