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SanjayyyVssekar15
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dts: ti: mspm0: Enable input for all UART RX pins
Added input-enable property to all UART RX pinmux entries across the MSPM0L222x pinctrl file to ensure proper input functionality for UART reception on all supported RX pins. Without the input-enable property, UART reception does not function correctly when the SoC enters low-power mode. Adding this property ensures reliable UART operation in all power states. Signed-off-by: Sanjay Vallimanalan <[email protected]>
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dts/ti/mspm0/l/mspm0l222x-pinctrl.dtsi

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
5353

5454
/omit-if-no-ref/ uart0_rx_pa01: uart0_rx_pa01 {
5555
pinmux = <MSP_PINMUX(2, MSPM0_PIN_FUNCTION_2)>;
56+
input-enable;
5657
};
5758

5859
/omit-if-no-ref/ i2c0_scl_pa01: i2c0_scl_pa01 {
@@ -201,6 +202,7 @@
201202

202203
/omit-if-no-ref/ uart0_rx_pa31: uart0_rx_pa31 {
203204
pinmux = <MSP_PINMUX(6, MSPM0_PIN_FUNCTION_2)>;
205+
input-enable;
204206
};
205207

206208
/omit-if-no-ref/ i2c0_scl_pa31: i2c0_scl_pa31 {
@@ -365,6 +367,7 @@
365367

366368
/omit-if-no-ref/ uart1_rx_pa04: uart1_rx_pa04 {
367369
pinmux = <MSP_PINMUX(9, MSPM0_PIN_FUNCTION_10)>;
370+
input-enable;
368371
};
369372

370373
/omit-if-no-ref/ spi0_cs0_pa04: spi0_cs0_pa04 {
@@ -465,6 +468,7 @@
465468

466469
/omit-if-no-ref/ uart1_rx_pa06: uart1_rx_pa06 {
467470
pinmux = <MSP_PINMUX(11, MSPM0_PIN_FUNCTION_11)>;
471+
input-enable;
468472
};
469473

470474
/omit-if-no-ref/ analog_pb0: analog_pb0 {
@@ -509,6 +513,7 @@
509513

510514
/omit-if-no-ref/ uart0_rx_pb01: uart0_rx_pb01 {
511515
pinmux = <MSP_PINMUX(13, MSPM0_PIN_FUNCTION_2)>;
516+
input-enable;
512517
};
513518

514519
/omit-if-no-ref/ spi1_cs3_cd_poci3_pb01: spi1_cs3_cd_poci3_pb01 {
@@ -637,6 +642,7 @@
637642

638643
/omit-if-no-ref/ uart3_rx_pb03: uart3_rx_pb03 {
639644
pinmux = <MSP_PINMUX(16, MSPM0_PIN_FUNCTION_2)>;
645+
input-enable;
640646
};
641647

642648
/omit-if-no-ref/ uart2_rts_pb03: uart2_rts_pb03 {
@@ -661,6 +667,7 @@
661667

662668
/omit-if-no-ref/ uart2_rx_pb03: uart2_rx_pb03 {
663669
pinmux = <MSP_PINMUX(16, MSPM0_PIN_FUNCTION_8)>;
670+
input-enable;
664671
};
665672

666673
/omit-if-no-ref/ timg12_ccp1_pb03: timg12_ccp1_pb03 {
@@ -717,6 +724,7 @@
717724

718725
/omit-if-no-ref/ uart1_rx_pb05: uart1_rx_pb05 {
719726
pinmux = <MSP_PINMUX(18, MSPM0_PIN_FUNCTION_2)>;
727+
input-enable;
720728
};
721729

722730
/omit-if-no-ref/ uart3_rts_pb05: uart3_rts_pb05 {
@@ -797,6 +805,7 @@
797805

798806
/omit-if-no-ref/ uart1_rx_pa09: uart1_rx_pa09 {
799807
pinmux = <MSP_PINMUX(20, MSPM0_PIN_FUNCTION_2)>;
808+
input-enable;
800809
};
801810

802811
/omit-if-no-ref/ spi0_pico_pa09: spi0_pico_pa09 {
@@ -1001,6 +1010,7 @@
10011010

10021011
/omit-if-no-ref/ uart0_rx_pa11: uart0_rx_pa11 {
10031012
pinmux = <MSP_PINMUX(26, MSPM0_PIN_FUNCTION_2)>;
1013+
input-enable;
10041014
};
10051015

10061016
/omit-if-no-ref/ spi0_sclk_pa11: spi0_sclk_pa11 {
@@ -1089,6 +1099,7 @@
10891099

10901100
/omit-if-no-ref/ uart1_rx_pb07: uart1_rx_pb07 {
10911101
pinmux = <MSP_PINMUX(28, MSPM0_PIN_FUNCTION_2)>;
1102+
input-enable;
10921103
};
10931104

10941105
/omit-if-no-ref/ spi1_poci_pb07: spi1_poci_pb07 {
@@ -1253,6 +1264,7 @@
12531264

12541265
/omit-if-no-ref/ uart4_rx_pb11: uart4_rx_pb11 {
12551266
pinmux = <MSP_PINMUX(32, MSPM0_PIN_FUNCTION_6)>;
1267+
input-enable;
12561268
};
12571269

12581270
/omit-if-no-ref/ spi1_cs2_poci2_pb11: spi1_cs2_poci2_pb11 {
@@ -1301,6 +1313,7 @@
13011313

13021314
/omit-if-no-ref/ uart3_rx_pb13: uart3_rx_pb13 {
13031315
pinmux = <MSP_PINMUX(34, MSPM0_PIN_FUNCTION_2)>;
1316+
input-enable;
13041317
};
13051318

13061319
/omit-if-no-ref/ tima0_ccp3_pb13: tima0_ccp3_pb13 {
@@ -1397,6 +1410,7 @@
13971410

13981411
/omit-if-no-ref/ uart2_rx_pb16: uart2_rx_pb16 {
13991412
pinmux = <MSP_PINMUX(37, MSPM0_PIN_FUNCTION_2)>;
1413+
input-enable;
14001414
};
14011415

14021416
/omit-if-no-ref/ spi1_sclk_pb16: spi1_sclk_pb16 {
@@ -1485,6 +1499,7 @@
14851499

14861500
/omit-if-no-ref/ uart3_rx_pa13: uart3_rx_pa13 {
14871501
pinmux = <MSP_PINMUX(39, MSPM0_PIN_FUNCTION_4)>;
1502+
input-enable;
14881503
};
14891504

14901505
/omit-if-no-ref/ tima0_ccp3_cmpl_pa13: tima0_ccp3_cmpl_pa13 {
@@ -1557,6 +1572,7 @@
15571572

15581573
/omit-if-no-ref/ uart2_rx_pa14: uart2_rx_pa14 {
15591574
pinmux = <MSP_PINMUX(40, MSPM0_PIN_FUNCTION_10)>;
1575+
input-enable;
15601576
};
15611577

15621578
/omit-if-no-ref/ analog_pa15: analog_pa15 {
@@ -1681,6 +1697,7 @@
16811697

16821698
/omit-if-no-ref/ uart1_rx_pc01: uart1_rx_pc01 {
16831699
pinmux = <MSP_PINMUX(44, MSPM0_PIN_FUNCTION_2)>;
1700+
input-enable;
16841701
};
16851702

16861703
/omit-if-no-ref/ spi1_cs2_poci2_pc01: spi1_cs2_poci2_pc01 {
@@ -1861,6 +1878,7 @@
18611878

18621879
/omit-if-no-ref/ uart1_rx_pa18: uart1_rx_pa18 {
18631880
pinmux = <MSP_PINMUX(50, MSPM0_PIN_FUNCTION_2)>;
1881+
input-enable;
18641882
};
18651883

18661884
/omit-if-no-ref/ spi1_pico_pa18: spi1_pico_pa18 {
@@ -2005,6 +2023,7 @@
20052023

20062024
/omit-if-no-ref/ uart2_rx_pb18: uart2_rx_pb18 {
20072025
pinmux = <MSP_PINMUX(54, MSPM0_PIN_FUNCTION_2)>;
2026+
input-enable;
20082027
};
20092028

20102029
/omit-if-no-ref/ spi0_sclk_pb18: spi0_sclk_pb18 {
@@ -2029,6 +2048,7 @@
20292048

20302049
/omit-if-no-ref/ uart4_rx_pb18: uart4_rx_pb18 {
20312050
pinmux = <MSP_PINMUX(54, MSPM0_PIN_FUNCTION_8)>;
2051+
input-enable;
20322052
};
20332053

20342054
/omit-if-no-ref/ timg4_ccp1_pb18: timg4_ccp1_pb18 {
@@ -2137,6 +2157,7 @@
21372157

21382158
/omit-if-no-ref/ uart2_rx_pa22: uart2_rx_pa22 {
21392159
pinmux = <MSP_PINMUX(57, MSPM0_PIN_FUNCTION_2)>;
2160+
input-enable;
21402161
};
21412162

21422163
/omit-if-no-ref/ spi0_cs2_poci2_pa22: spi0_cs2_poci2_pa22 {
@@ -2205,6 +2226,7 @@
22052226

22062227
/omit-if-no-ref/ uart3_rx_pc07: uart3_rx_pc07 {
22072228
pinmux = <MSP_PINMUX(59, MSPM0_PIN_FUNCTION_2)>;
2229+
input-enable;
22082230
};
22092231

22102232
/omit-if-no-ref/ spi0_cs0_pc07: spi0_cs0_pc07 {
@@ -2345,6 +2367,7 @@
23452367

23462368
/omit-if-no-ref/ uart4_rx_pb22: uart4_rx_pb22 {
23472369
pinmux = <MSP_PINMUX(64, MSPM0_PIN_FUNCTION_2)>;
2370+
input-enable;
23482371
};
23492372

23502373
/omit-if-no-ref/ spi1_pico_pb22: spi1_pico_pb22 {
@@ -2361,6 +2384,7 @@
23612384

23622385
/omit-if-no-ref/ uart1_rx_pb22: uart1_rx_pb22 {
23632386
pinmux = <MSP_PINMUX(64, MSPM0_PIN_FUNCTION_6)>;
2387+
input-enable;
23642388
};
23652389

23662390
/omit-if-no-ref/ analog_pb23: analog_pb23 {
@@ -2477,6 +2501,7 @@
24772501

24782502
/omit-if-no-ref/ uart2_rx_pa24: uart2_rx_pa24 {
24792503
pinmux = <MSP_PINMUX(68, MSPM0_PIN_FUNCTION_2)>;
2504+
input-enable;
24802505
};
24812506

24822507
/omit-if-no-ref/ spi0_cs2_poci2_pa24: spi0_cs2_poci2_pa24 {
@@ -2521,6 +2546,7 @@
25212546

25222547
/omit-if-no-ref/ uart3_rx_pa25: uart3_rx_pa25 {
25232548
pinmux = <MSP_PINMUX(69, MSPM0_PIN_FUNCTION_2)>;
2549+
input-enable;
25242550
};
25252551

25262552
/omit-if-no-ref/ spi1_cs3_cd_poci3_pa25: spi1_cs3_cd_poci3_pa25 {
@@ -2693,6 +2719,7 @@
26932719

26942720
/omit-if-no-ref/ uart3_rx_pa26: uart3_rx_pa26 {
26952721
pinmux = <MSP_PINMUX(73, MSPM0_PIN_FUNCTION_9)>;
2722+
input-enable;
26962723
};
26972724

26982725
/omit-if-no-ref/ timg4_ccp1_pa26: timg4_ccp1_pa26 {
@@ -2709,6 +2736,7 @@
27092736

27102737
/omit-if-no-ref/ uart3_rx_pa27: uart3_rx_pa27 {
27112738
pinmux = <MSP_PINMUX(74, MSPM0_PIN_FUNCTION_2)>;
2739+
input-enable;
27122740
};
27132741

27142742
/omit-if-no-ref/ spi1_cs1_poci1_pa27: spi1_cs1_poci1_pa27 {

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