ARM Assembly (Part 13 – Instruction Pipeline)

ARM Assembly (Part 13 – Instruction Pipeline)

For a complete table of contents of all the lessons please click below as it will give you a brief of each lesson in addition to the topics it will cover. https://github.com/mytechnotalent/Reverse-Engineering-Tutorial

The processor works with three separate phases which are:

1)Fetch Phase – The control unit grabs the instruction from memory and loads it into the instruction register.

2)Decode Phase – The control unit configures all of the hardware within the processor to perform the instruction.

3)Execute Phase – The processor computes the result of the instruction or operation.

When the processor processes instruction 1 we refer to it as being in the fetch phase. When the processor processes instruction 2, instruction 1 goes into the decode phase and instruction 2 goes into the fetch phase. When the processor processes instruction 3, instruction 2 goes into the decode stage and instruction 1 goes into the execute stage.

No alt text provided for this image

Keep in mind, if a branch instruction occurs, the pipeline might be flushed and start over again with a fresh set of cycles.

Next week we will dive into ADD.

To view or add a comment, sign in

Explore topics