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8051 ARM Cortex-M0 ARM Cortex-M3

PSoC is a software configured, mixed-signal array with a built-in microcontroller core. There are four families of devices based on different microcontroller cores: PSoC 1 uses a CY8C2xxxx series with an M8C core, PSoC 3 uses a CY8C3xxxx series with an 8051 core, PSoC 4 uses a CY8C4xxxx series with an ARM Cortex-M0 core, and PSoC 5 uses a CY8C5xxxx series with an ARM Cortex-M3 core.

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0% found this document useful (0 votes)
73 views2 pages

8051 ARM Cortex-M0 ARM Cortex-M3

PSoC is a software configured, mixed-signal array with a built-in microcontroller core. There are four families of devices based on different microcontroller cores: PSoC 1 uses a CY8C2xxxx series with an M8C core, PSoC 3 uses a CY8C3xxxx series with an 8051 core, PSoC 4 uses a CY8C4xxxx series with an ARM Cortex-M0 core, and PSoC 5 uses a CY8C5xxxx series with an ARM Cortex-M3 core.

Uploaded by

Amy Oliver
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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PSoC is a software configured, mixed-signal array with a built-in microcontroller core.

There are four different families of devices, each based around a different microcontroller core:

PSoC 1 - CY8C2xxxx series - M8C core.


PSoC 3 - CY8C3xxxx series - 8051 core.
PSoC 4 - CY8C4xxxx series - ARM Cortex-M0 core. [4]
PSoC 5 - CY8C5xxxx series - ARM Cortex-M3 core.

Summary
PSoC 1

PSoC 3

PSoC 4

PSoC 5

8-bit M8C core


up to 24 MHz, 4 MIPS

8-bit 8051 core (single-cycle)


up to 67 MHz, 33 MIPS

32-bit ARM Cortex-M0


up to 48 MHz, ? MIPS

32-bit ARM Cortex-M3


up to 67 MHz, 84 MIPS

Flash: 4 KB to 32 KB
SRAM: 256 bytes to 2 KB

Flash: 8 KB to 64 KB
SRAM: 3 KB to 8 KB

Flash: 16 KB to 32 KB
SRAM: 4 KB

Flash: 32 KB to 256 KB
SRAM: 16 KB to 64 KB

IC, SPI, UART,


FS USB 2.0

IC, SPI, UART,


FS USB 2.0, LIN, IS, CAN

IC, SPI, UART


.

IC, SPI, UART,


FS USB 2.0, LIN, IS
1 Delta-Sigma ADC (8 to 20-bit)

1 Delta-Sigma ADC (6 to 14-bit)

1 Delta-Sigma ADC (8 to 20-bit)

131 ksps @ 8-bit;

192 ksps @ 12-bit;

192 ksps @12-bit;


1 SAR ADC (12-bit)
2 SAR ADCs (12-bit)
1 Msps @ 12-bit;

Up to two DACs (6 to 8-bit);

Up to four DACs (8-bit);

1 Msps @ 12-bit;
Up to two DACs (8-bit);

Voltage Precision 1.53%

Voltage Precision 0.1%

Up to four DACs (8-bit);


Voltage Precision 1.0%

Up to 64 I/O

Up to 72 I/O

Up to 36 I/O

Up to 72 I/O

Operation: 1.7 V to 5.25 V


Active: 2 mA,
Sleep: 3 A
Hibernate: ?

Operation: 0.5 V to 5.5 V


Active: 1.2 mA,
Sleep: 1 A,
Hibernate: 200 nA

Operation: 1.71 V to 5.5 V


Active: 1.6 mA,
Sleep: 1.3 A,
Hibernate: 150 nA

Operation: 2.7 V to 5.5 V


Active: 2 mA,
Sleep: 2 A,
Hibernate: 300 nA

On-chip JTAG, SWD, SWV,


Debug and Trace

On-chip JTAG, SWD, SWV,


Debug and Trace

PSoC 4 Featured Kits


CY8CKIT-042 Pioneer Kit

PSoC 5 Featured Kits


CY8CKIT-001 Development Kit
CY8CKIT-050 Development Kit

Requires ICE Cube and FlexPods


PSoC 1 Featured Kits
CY8CKIT-001 Development Kit

PSoC 3 Featured Kits


CY8CKIT-001 Development Kit
CY8CKIT-030 Development Kit

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