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Introduction To 8086 Microprocessor (Part 2) : Microprocessors and Microcomputer-Based System Design Mohamad Rafiquzzaman

The document describes the internal architecture of the 8086 microprocessor. It discusses that the 8086 has two main units: the Bus Interface Unit (BIU) and the Execution Unit (EU). The BIU handles fetching instructions from memory and transferring data/addresses on the buses. The EU decodes instructions and performs arithmetic/logical operations using its ALU. It also contains registers like AX, BX, CX, DX for data, as well as flags for status. The EU coordinates all other units.

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Mahmudul Hasan
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0% found this document useful (0 votes)
235 views

Introduction To 8086 Microprocessor (Part 2) : Microprocessors and Microcomputer-Based System Design Mohamad Rafiquzzaman

The document describes the internal architecture of the 8086 microprocessor. It discusses that the 8086 has two main units: the Bus Interface Unit (BIU) and the Execution Unit (EU). The BIU handles fetching instructions from memory and transferring data/addresses on the buses. The EU decodes instructions and performs arithmetic/logical operations using its ALU. It also contains registers like AX, BX, CX, DX for data, as well as flags for status. The EU coordinates all other units.

Uploaded by

Mahmudul Hasan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Introduction to 8086

Microprocessor (part 2)
Microprocessors and microcomputer-based system design
Mohamad Rafiquzzaman
>Chapter 3 section 3.1, 3.2, 3.3

Assembly language programming Ytha Yu


> Chapter 3 section 3.2

Nasif M.

1
8086 Internal Architecture

2
8086 Architecture Description
The 8086 has two units:

1) Bus Interface Unit (BIU)

2) Execution Unit (EU)

3
Function of BIU
• The BIU sends out addresses, fetches instruction from memory, reads
data from ports and memory, and writes data to ports and memory.

• The BIU handles all transfer of data and addresses on the buses for the
execution unit.

4
Function of Execution unit
• Execution unit is responsible for the coordination of all other units of
the processor.

• The execution unit instructs the BIU where to fetch instruction or data
from, then decoder in the EU translates instructions fetched from
memory into a series of actions which the EU carries out.

• ALU of execution unit performs various arithmetic and logical


operations over the data

5
Description of Execution Unit (EU) 1
• The EU has a 16-bit arithmetic logic unit which can add, subtract, AND, OR,
increment, decrement, complement, Binary numbers.

• The execution unit which includes the ALU, four 16-bit general purpose
register, a 16-bit flag register and a control unit.

• The EU contains eight 16-bit registers- AX, BX, CX, DX, SP, BP, SI and DI.

• The general purpose registers AX, BX, CX, DX can be further divided into
two 8-bit registers AH&AL, BH&BL, CH&CL and DH&DL and can be used to
store 8-bit or 16-bit data during program execution.

6
Description of Execution Unit (EU) 2
• A 16-bit flag register in the EU contains nine flags. Six of the nine
flags are used to indicate some condition produced by an instruction.

• The three remaining flags in the flag registers are used to control
certain operations of the processors.

7
Description of Bus Interface Unit (BIU) 1
• The BIU stores pre-fetched instruction byte in FIFO register called
queue from memory.

• Fetching the next instruction while executing the current instruction


is referred as the instruction pipeline.

• The BIU has a dedicated Adder. The main function of the adder is to
produce 20 bit physical address.

• The bus control logic of the BIU generates all bus control signals such
as read and writes for memory, I/O ports.
8
Description of Bus Interface Unit (BIU) 2
• Four segment registers in the BIU are used to hold the starting
addresses of four memory segments that the 8086 is working with at
particular time.

• The four segment registers are the Code segment (CS), Stack segment
(SS), Extra Segment (ES) and Data Segment (DS).

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