CE-207 Computer Organization and Architecture - Batch 2019 - 04-07-2020
CE-207 Computer Organization and Architecture - Batch 2019 - 04-07-2020
IMPORTANT INSTRUCTIONS:
• Attempt All Questions on MS-Word. Font theme and size must be Times New Roman and
12 points, respectively. Use line spacing 1.5. Convert file to PDF format before submitting.
• You may provide answers HANDWRITTEN. The scanned solution must be submitted in
PDF file format (Use any suitable Mobile Application for Scanning)
• For Diagrams, you can use paper and share a clear visible snapshot in the same Answer
Sheet.
• Arrange questions and their subsequent parts in sequence.
• Make sure that your answers are not plagiarized or copied from any other sources. In case
of plagiarism, ZERO marks will be awarded.
• Provide relevant, original, and conceptual answers, as this exam aims to test your ability to
examine, explain, modify or develop concepts discussed during the course.
• Recheck your answer before the submission on VLE to correct any content or language
related errors.
• You must upload your answers via the VLE platform ONLY.
You must follow general guideline for students before online examination and during
online examination which had already been shared by email and WhatsApp.
This paper has a total of _05__ pages including this title page
Q.1. (10)
Suppose you have downloaded the final examination paper from VLE, solved this paper using MS
word, saved it to your documents and then uploaded back it to VLE.
a. Can you explain which computer functions are involved and how they are working in this
scenario.
b. How can you relate different types of structure of computer with involved functions?
c. What type of computer memories are being accessed during the whole scenario?
Q.2. (10)
Consider X and Y as input values for this question. Where X is the First two digits of your Roll
Number and Y is the Last two digits of your Roll Number.
For Example:
i. If your Roll No is 012,
X=01, and its equivalent 8-bit binary value is 00000001
Y=12, and its equivalent 8-bit binary value is 00010010
a. If you are working in 8-bit binary system and come across to a situation in which you will
have to add two numbers (X, Y) of similar sign. What will happen and why? Explain your
answer with the help of an example by considering X and Y as input.
b. Assume two 8-bit binary no’s X and Y. Multiply them as Unsigned integers and as 2’s
complement integers by using Booth’s Algorithm. Compare and explain the results, also
show the results in decimal?
Q.3. (10)
Calculate the following Values K, V1, I1, V2, I2, V3 before Proceed.
K is your 3-Digit Roll No,
V1 is Sum of 1st and 3rd Digits of your Roll No,
I1 is sum of all digits of your Roll No,
V2 is Sum of 2nd and 3rd Digits of your Roll No.
I2 = I1+1
V3 = V2-1.
Consider a 16- bit hypothetical machine working on Hexadecimal Numbers, where 12-bit address
of Instruction format identifies a particular Memory address or I/O device. This hypothetical
machine has following set of Basic Instructions:
Assume that memory location K contains value of V1, Device I1 contains value of V2 and Device
I2 contains value of V3. Show the program execution for the following Program:
a. Load AC from Device I1
b. Add contents of Location K
c. Store AC to Location (K+3)
d. Subtract contents of device I2
e. Store AC to location (K-2)
Q.4. (10)
Consider the following program by Assuming A1 is your 3-digit Roll Number and A2 is Second
digit of your Roll No.
For Example, if your Roll No. is 193,
A1=193
A2=9
.data
prompt: .asciiz"\nRemainder is: "
.text
.globl main
main:
li $t0, A1
li $t1,A2
div $t0, $t1
mflo $t2
mfhi $t3
la $a0,prompt
li $v0,4
syscall
If you execute the above program, Answer the following questions with proper justification:
a. What will be store in $t2 and $t3
b. Is there any interrupt generated during the execution of above Program?
c. What would happen if you suddenly came a across with power failure during execution
of this Program?
Q.5. (10)
Keeping in view all seven dimensions of Instruction Set Architecture, Design the RISC/CISC
Desktop Architecture of a Processor having Three 8-bit General Purpose Registers working
with Byte Addressable Memory. The designed Architecture must meet the following
Requirements:
i. Class of Architecture should be selected in such a way that operands are either
registers or memory locations.
ii. It should be able to put the byte at the least-significant position in the double word.
iii. It should be able to calculate effective Memory Address by using any suitable Six
Addressing Modes.
iv. Type of Operands must be selected for Desktop Architecture.
v. It can Perform at least Two Basic Operations (without which architecture cannot work)
vi. It should follow an Encoding Scheme that combines the operation and the addressing
mode into the opcode.