09-Algorithms For Vlsi Design Automation
09-Algorithms For Vlsi Design Automation
com
R09
Code No: D109115704
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M.Tech I Semester Regular Examinations March 2010
ALGORITHMS FOR VLSI DESIGN AUTOMATION
(COMMON TO EMBEDDED SYSTEMS & VLSI DESIGN, VLSI & EMBEDDED
SYSTEMS, VLSI SYSTEM DESIGN / VLSI DESIGN /VLSI)
Time: 3hours Max.Marks:60
Answer any five questions
All questions carry equal marks
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3.a)
b)
L D
Give a Pseudo-code description of Tabu search and explain the same.
Give an example for a genetic algorithm and explain the same.
4.a)
b)
synthesis.
O R
Explain about Allocation, Assignment and Scheduling of Algorithms in high-level
5.
W
With an example explain how high level transformations can be carried out on Data Flow
U
Graphs. What are the advantages and limitations?
6.a)
b)
N T
Explain about various FPGA Technologies with necessary diagrams.
What are the various steps in the physical Design cycle of FPGA’s? Explain.
7.a)
8.
b)
J
How Multichip Modules are classified? Explain about MCM physical Design cycle.
How MCM portioning is carried out? Explain with the help of a system graph.
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