Mechatronics Interfacing Sensors-1
Mechatronics Interfacing Sensors-1
1. Introduction
2. Interfacing
3. Interfacing requirements
3.1 Buffers
3.2 Handshaking
3.3 Polling and Interrupts
3.4 Serial Interfacing
4. Peripheral Interface Adapters
5. Data Conversion Devices
6. Basic components used in ADCs and DACs
When a microprocessor is used to control some system it has to accept input
information, respond to it and produce output signals to implement the required control
action. Thus there can be inputs from sensors to feed data in and outputs to such
external devices as relays and motors. The term peripheral is used for a device, such as a
sensor, keyboard, actuator, etc., which is connected to a microprocessor. It is, however,
not normally possible to connect directly such peripheral devices to a microprocessor
bus system due to a lack of compatibility in signal forms and levels. Because of such
incompatibility, a circuit known as an interface is used between the peripheral items and
the microprocessor. Figure 13.1 illustrates the arrangement. The interface is where this
incompatibility is resolved.
The following are some of the actions that are often required of an
interface circuit.
A. Electrical buffering/isolation
This is needed when the peripheral operates at a different voltage or
current to that on the microprocessor bus system or there are different
ground references. The term buffer is used for a device that provides
isolation and current or voltage amplification. For example, if the output
of a microprocessor is connected to the base of a transistor, the base
current required to switch the transistor is greater than that supplied by the
microprocessor and so a buffer is used to step up the current. There also
has often to be isolation between the microprocessor and the higher power
system.
B. Timing control
Timing control is needed when the data transfer rates of the peripheral and
the microprocessor are different, e.g. when interfacing a microprocessor to a
slower peripheral. This can be achieved by using special lines between the
microprocessor and the peripheral to control the timing of data transfers.
Such lines are referred to as handshake lines and the process as
handshaking.
C. Code conversion
This is needed when the codes used by the peripherals differ from those
used by the microprocessor. For example, an LED display might require a
decoder to convert the BCD output from a microprocessor into the code
required to operate the seven display elements.
D. Changing the number of lines
Microprocessors operate on a fixed word length of 4 bits, 8 bits or 16 bits.
This determines the number of lines in the microprocessor data bus.
Peripheral equipment may have a different number of lines, perhaps
requiring a longer word than that of the microprocessor.
1. The CPU waits until the end of the instruction it is currently executing
before dealing with the interrupt.
2. All the CPU registers are pushed onto the stack and a bit set to stop further
interrupts occurring during this interruption. The stack is a special area of
memory in which program counter values can be stored when a subroutine is
to be executed. The program counter gives the address of the next program
instruction in a program and thus storing this value enables the program to
be resumed at the place where it broke off to execute the interrupt.
3. The CPU then determines the address of the interrupt service routine to be
executed. Some microprocessors have dedicated interrupt pins and the pin that is
chosen determines which address is to be used. Other microprocessors have only one
interrupt pin and the interrupting device must then supply data that tells the
microprocessor where the interrupt service routine is located. Some microprocessors
have both kinds of interrupt inputs. The starting address of an interrupt service
routine is called an interrupt vector. The block of memory assigned to store the vectors
is known as the vector table. Vector addresses are fixed by the chip manufacturer.
5. After completion of this routine, the CPU registers are returned from the stack and
the main program continues from the point it left off.
With the parallel transmission of data, one line is used for each bit; serial
systems, however, use a single line to transmit data in sequential bits. There
are two basic types of serial data transfer: asynchronous and synchronous.
With asynchronous transmission, the receiver and the transmitter each use
their own clock signals so it is not possible for a receiver to know when a
word starts or stops. Thus it is necessary for each transmitted data word to
carry its own start and stop bits so that it is possible for the receiver to tell
where one word stops and another starts (Figure 13.9). With such a mode
of transmission, the transmitter and receiver are typically remote. With
synchronous transmission, the transmitter and receiver have a common
clock signal and thus transmission and reception can be synchronised.
The microcontroller MC68HC11 has a serial communications interface
(SCI) which can be used for asynchronous transmission and thus can be
used to communicate with remote peripheral devices. The SCI uses port D
pin PD1 as a transmit line and port PD0 as a receive line. These lines can
be enabled or disabled by the SCI control register. The microcontroller also
has a serial peripheral interface (SPI) for synchronous transmission. This
can be used for local serial communication, local meaning essentially
inside the machine in which the chip is located.
Interfaces can be specifically designed for particular inputs/outputs;
however, programmable input/output interface devices are available which
permit various different input and output options to be selected by means of
software. Such devices are known as peripheral interface adapters (PIAs). A
commonly used PIA parallel interface is the Motorola MC 6821. It is part
of the MC6800 family and thus can be directly attached to Motorola
MC6800 and MC68HC11 buses. The device can be considered to be
essentially just two parallel input/output ports, with their control logic, to
link up with the host microprocessor.
Figure 13.10 shows the basic structure of the MC6821 PIA and the pin
connections.
https://www.youtube.com/watch?v=JUtzG-9RdFM
https://slideplayer.com/slide/4205670/
https://www.youtube.com/watch?v=dbotS09aorE
The PIA contains two 8-bit parallel data ports, termed A and B. Each port
has the following.
The first two bits control the way that CA1 or CB1 input control lines operate. Bit 0
determines whether the interrupt output is enabled. B0=0 disables the IRQA(B)
microprocessor interrupt, B0 = 1 enables the interrupt. CA1 and CB1 are not set by the
static level of the input but are edge triggered, i.e. set by a changing signal. Bit 1
determines whether bit 7 is set by a high-to-low transition (a trailing edge) or a low-to-
high transition (a leading edge). B1 = 0 sets a high-to-low transition, B1 = 1 sets a low-
to-high transition.
Bit 2
Bit 2 determines whether data direction registers or peripheral data registers are
addressed. With B2 set to 0, data direction registers are addressed, with B2 set to 1,
peripheral data registers are selected.
Bits 3, 4 and 5
These bits allow the PIA to perform a variety of functions. Bit 5 determines whether
control line 2 is an input or an output. If bit 5 is set to 0, control line 2 is an input, if set
to 1, it is an output. In input mode, both CA2 and CB2 operate in the same way. Bits 3
and 4 determine whether the interrupt output is active and which transitions set bit 6.
With B5 = 0, i.e. CA2(CB2) set as an input: B3 = 0 disables IRQA(B) microprocessor
interrupt by CA2(CB2); B3 = 1 enables IRQA(B) microprocessor interrupt by
CA2(CB2); B4 = 0 determines that the interrupt flag IRQA(B), bit B6, is set by a high-to-
low transition on CA2(CB2); B4 = 1 determines that it is set by a low-to-high transition.
B5 5 1 sets CA2(CB2) as an output. In output mode CA2 and CB2 behave differently.
For CA2: with B4 = 0 and B3 = 0, CA2 goes low on the first high-to-low ENABLE (E)
transition following a microprocessor read of peripheral data register A and is returned
high by the next CA1 transition; with B4 = 0 and B3 = 1, CA2 goes low on the first
high-to-low ENABLE transition following a microprocessor read of the peripheral data
register A and is returned to high by the next high-to-low ENABLE transition. For CB2:
with B4 = 0 and B3 = 0, CB2 goes low on the first low-to-high ENABLE transition
following a microprocessor write into peripheral data register B and is returned to high
by the next CB1 transition; with B4 = 0 and B3 = 1, CB2 goes low on the first low-to-
high ENABLE transition following a microprocessor write into peripheral data register
B and is returned high by the next low-to-high ENABLE transition. With B4 = 1 and B3
= 0, CA2(CB2) goes low as the microprocessor writes B3 = 0 into the control register.
With B4 = 0 and B3 = 1, CA2(CB2) goes high as the microprocessor writes B3 = 1 into
the control register.
Bit 6
Bit 7
Though the output obtained from comparators are in the form of 0s and
1s, but can’t be called as binary output. A sequence of 0s and 1s will be
converted into binary form by using a circuit called Encoder. A simple
encoder converts 2n input lines into ‘n’ output lines. These ‘n’ output
lines follow binary algebra.
6.3. Analog to Digital Converter (ADC)
As discussed in previous section ADCs are used to convert analog signals into
Digital Signals. There are various techniques of converting Analog Signals into
Digital signals which are enlisted as follows. However we will be discussing only
Direct Conversion ADC, detail study of other techniques is out of the scope of the
present course.
1. Direct Conversion ADC or Flash ADC
2. Successive Approximation ADC
3. A ramp-compare ADC
4. Wilkinson ADC
5. Integrating ADC
6. Delta-encoded ADC or counter-ramp
7. Pipeline ADC (also called subranging quantizer)
8. Sigma-delta ADC (also known as a delta-sigma ADC)
9. Time-interleaved ADC
Figure 9.2 shows the circuit of Direct conversion or Flash ADC. To convert a digital
signal of N-bits, Flash ADC requires 2N-1 comparators and 2N resistors. The circuit
provides the reference voltage to all the comparators. Each comparator gives an output
of 1 when its analog voltage is higher than reference voltage or otherwise the output is 0.
In the above circuit, reference voltages to comparators are provided by means of resistor
ladder logic.
The circuit described in figure 9.2 acts as 3 Bit ADC device. Let us assume this ADC
works between the range of 0-10 Volts. The circuit requires 7 comparators and 8 resisters.
Now the voltages across each resistor are divided in such a way that a ladder of 1 volt is
built with the help of 1K-Ohm resistances. Therefore the reference voltages across all the
comparators are 1-7 volts.
Flip-flop is a 1 bit memory cell which can be used for storing the digital data. To
increase the storage capacity in terms of number of bits, we have to use a group of
flip-flop. Such a group of flip-flop is known as a Register.
Figure 9.2 Circuit of Flash ADC
Now let us assume that an input voltage signal of 2.5 V is to be converted
into its related digital form. As 2.5V is greater than 1V and 2V, first two
comparators will give output as 1, 1. But 2.5V is less than 3,4,5,6,7 V
values therefore all other comparators will give 0s.
Thus we will have output from comparators as 0000011 (from top). This
will be fed to the encoder logic circuit. This circuit will first change the
output in single high line format and then converts it into 3 output lines
format by using binary algebra. Then this digital output from ADC may
be used for manipulation or actuation by the microcontrollers or
computers.
Flash ADC (Parallel ADC) and Half-Flash ADC Explained
https://www.youtube.com/watch?v=NASkjo7s8f4
https://www.youtube.com/watch?v=lhnKZDLtYvQ
https://www.youtube.com/watch?v=A9NinZYWyo8
As discussed in previous section DACs are used to convert digital signals
into Analog Signals. There are various techniques of converting Digital
Signals into Analog signals which are as follows however we will be
discussing only few important techniques in detail:
1. Pulse-width modulator
2. Oversampling DACs or interpolating DACs
3. The binary-weighted DAC
4. Switched resistor DAC
5. Switched current source DAC
6. Switched capacitor DAC
7. The R-2R ladder
8. The Successive-Approximation or Cyclic DAC,
9. The thermometer-coded DAC
Figure 9.3 Circuit of binary weighted DAC
As name indicates, in binary weighted
DAC, output voltage can be calculated by
expression which works on binary weights.
Its circuit can be realized in Figure 9.3.
From the figure it can be noted that most
significant bit of digital input is connected
to minimum resistance and vice versa.
Digital bits can be connected to resistance
through a switch which connects
resistance-end to the ground. The digital
input is zero when former bit is connected
to reference voltage and if it is 1. This can Figure 9.4 An op-amp used in DAC
be understood from Figure 9.4.
DAC output voltage can be calculated from property of operational amplifiers. If V1
be input voltage at MSB (most significant bit), V2 be input voltage at next bit and so on
then for four bit DAC we can write,
However, Binary weighted DAC doesn’t work for multiple or higher bit
systems as the value of resistance doubles in each case.
Thus simple and low bit digital signals from a transducer can be
converted into a related continuous value of voltages (analogue) by using
binary weighted DAC. These will further be used for manipulation or
actuation.
Binary Weighted Resistor DAC Explained
https://www.youtube.com/watch?v=PoOm_G4s1dE
https://www.youtube.com/watch?v=XSnjBCAWvxM
Figure 9.5 R-2R Ladder based DAC
In R-2R ladder logic, shortcoming of Binary Logic has been removed by
making the value of maximum resistance double however the rest of the
circuit remains same. Figure 9.5 shows the circuit of R-2R Ladder based
DAC. If we apply voltage division rule in above case, then we can calculate
that output voltage as,
In this way output voltage is obtained by converting the digital signals received from
microprocessor/ microcontroller. These voltages will further be used to actuate the
desired actuator viz. DC/AC motors.
R-2R Ladder DAC Explained (with Solved Example)
https://www.youtube.com/watch?v=Pc1aFloxSMw