The National Institute of Engineering, Mysore

Department of Electronics and Communication

Project Report
On

4-bit Brent Kung Adder

Submitted by:

Bhargava Dantapur - 4NI20EC018

Aman Gupta - 4NI21EC122
Atul Kumar Gupta - 4NI21EC024
Ankit Kumar - 4NI21EC015

III Semester, B.E., NIE, Mysuru

Under the Supervision of:

Mrs. Deepthi M S
Assistant Professor, Dept of ECE,
The National Institute of Engineering
(Autonomous Institute under VTU, Belagavi)
Mysuru – 570008

2022-2023
 The National Institute of Engineering, Mysore
Department of Electronics and Communication

CONTENT PAGE

SL.NO. CONTENTS CONTENTS PAGENO

1. Certificate 3

2 .Declaration 4

3. Acknowledgement 5

4. Abstract 6

5. Introduction 7-9

6. Code 10-11

7. Output waveform and Schematic 12-13

8. References 14
 The National Institute of Engineering, Mysore
Department of Electronics and Communication

CERTIFICATE

Certified that the project work entitled "4-bit BRENT KUNG

ADDER" carried out by Bhargava Dantapur, Aman Gupta, Atul
Kumar Gupta, and Ankit Kumar Singh, bonafide student at The
National Institute of Engineering, Mysuru in partial fulfillment for
the project of Bachelor’s in Engineering in Electronics and
Communication Engineering of The National Institute of
Engineering autonomous affiliated to Visveswaraya Technological
University, Belagavi during the year 2022- 2023. It is certified that
all corrections/suggestions indicated for Internal Assessment have
been incorporated in the report deposited in the departmental
library. The project report has been approved as it satisfies the
academic requirements in respect of the project work prescribed
for the said degree.

Signature of Guide Signature of Course Instructor

Mrs. Deepthi M S Dr. Shashidhara H R

Assistant Professor, Associate Professor,
Dept of ECE, NIE, Dept of ECE, NIE,
Mysuru Mysuru
 The National Institute of Engineering, Mysore
Department of Electronics and Communication

DECLARATION

We hereby declare that this project work entitled "4-bit Brent Kung
Adder" is for an original and bonafide work carried out by us at
NIE Mysuru, in partial fulfillment of B.E. in Electronics and
Communication Engineering. We also declare that, to the best of
our knowledge and belief, the work reported here in does not form
part of any thesis or dissertation of the basis of which a degree or
award was conferred on an earlier occasion by any student.

Bhargava Dantapur Aman Gupta Atul Kumar Gupta Ankit Kumar Singh
4NI20EC018 4NI21EC122 4NI21EC024 4NI21EC015
Dept. of ECE, NIE Dept. of ECE, NIE Dept. of ECE, NIE Dept. of ECE, NIE
Mysuru - 570008 Mysuru - 570008 Mysuru - 570008 Mysuru - 570008
 The National Institute of Engineering, Mysore
Department of Electronics and Communication

ACKNOWLEDGEMENT
We would like to express our sincere and heartfelt obligation
towards all person ages who have helped in this endeavor.
Without their active guidance, cooperation and
encouragement would not made headway in the project.

We are grateful to Mrs. Deepthi M S, Assistant Professor for

her support and encouragement in facilitating the progress of
this work.

We take this opportunity to express my gratefulness to Dr.

Shashidhara H R, Associate Professor, Department of
Electronics and Communication Engineering, for his
exceptional help, support, guidance, technical expertise,
encouragement, and timely help in making the project
successful.

We express our gratitude and respect to all the staff members

of the department who have helped us in completion of the
project.
 The National Institute of Engineering, Mysore
Department of Electronics and Communication

ABSTRACT

In the type of structure of any adder greatly affects the speed of

the circuit. The logarithm structure is considered to be one of the
fastest structures and the Brent Kung structure, use this
logarithmic concept. Brent Kung is a low power adder and it is
most effective technique which is used for implementing to
reduced low power and low delay. In this paper, for high
performance and low power 4-bits carry select adder is
implemented by using Brent Kung adder. Power and delay of all
these adder architectures are calculated at different input
voltages. Instead of using dual ripple carry adders, Brent Kung is
used to design carry select adder. The results analysis shows that
Modified 4-bits CSA is better than all the other adder
architectures. The designs have been implemented by using
Vivado software.

Key Words: Brent Kung adder, carry select adder, delay and
power.
 The National Institute of Engineering, Mysore
Department of Electronics and Communication

INTRODUCTION
The Brent-Kung adder is a type of parallel prefix adder, also known as a
carry-select adder. It was first introduced in 1982 by C.K. Koc and T.K.
Low, and is named after its inventors, Robert Brent, and Ted Kung.
The Brent-Kung adder is a fast and efficient way to perform binary addition
on large numbers and is commonly used in digital circuit design. It uses a
binary tree structure to perform the addition operation in a parallel manner,
which results in faster processing time compared to other adder designs.
The Brent-Kung adder is often used in high-performance computing
applications, such as in microprocessors and digital signal processing
systems.

The Brent-Kung adder is based on a divide-and-conquer approach, where

the addition of two n-bit numbers is divided into smaller sub-additions of k
bits each. These sub-additions are then performed in parallel using a
binary tree structure.
The binary tree structure used in the Brent-Kung adder is a combination
of two types of adders: the carry-select adder (CSA) and the carry-
lookahead adder (CLA). The CSA is used to compute the sum of the two
k-bit sub-blocks, while the CLA is used to compute the carry between the
two sub-blocks.
The binary tree structure used in the Brent-Kung adder has two stages. In
the first stage, the input bits are divided into two equal-sized sub-blocks,
and each sub-block is added using a CSA. In the second stage, the
outputs of the CSAs are connected to form a larger binary tree, where each
node performs a CLA operation on two adjacent sub-blocks.
The Brent-Kung adder has a time complexity of O(log2n), which is the
same as other parallel prefix adders. However, it has a lower area
complexity and lower power consumption compared to other types of
adders, making it a popular choice in high-performance computing and
digital signal processing applications.
Comparison of the Brent-Kung adder with other common types of
adders:

Ripple-carry adder (RCA): The RCA is the simplest type of adder, but it
has a time complexity of O(n) and requires a long propagation delay, which
limits its performance in high-speed applications. The Brent-Kung adder,
on the other hand, has a time complexity of O(log2n) and can perform
multiple additions in parallel, making it much faster than the RCA.
Carry-lookahead adder (CLA): The CLA reduces the propagation delay of
the RCA by using a lookahead technique to calculate the carry bits in
parallel. However, the CLA has a higher area complexity than the Brent-
Kung adder, which means it requires more circuitry and consumes more
power.
Carry-select adder (CSA): The CSA uses two ripple-carry adders and a
multiplexer to select the correct output. It has a lower time complexity than
the RCA and CLA, but it has a higher area complexity and requires more
power. The Brent-Kung adder combines both the CSA and CLA to provide
a more efficient and low-power solution.
Kogge-Stone adder (KSA): The KSA is a parallel prefix adder that uses a
tree structure similar to the Brent-Kung adder. However, the KSA has a
higher time complexity than the Brent-Kung adder and requires more area
and power.

Fig1:Diagram of an 8-bit Brent–Kung adder.

In summary, the Brent-Kung is a fast and efficient type of adder that has
advantages over the ripple-carry adder and the Kogge-Stone adder in
terms of time complexity, area complexity, and power consumption. It has
advantages over the carry-lookahead adder and the carry-select adder in
terms of area complexity and power consumption, while providing similar
or better performance in terms of time complexity. The choice of which
adder to use ultimately depends on the specific application and the trade-
offs between performance, area, and power consumption.

The Brent-Kung adder is a type of parallel prefix adder, which is a circuit

that can perform multiple addition operations in parallel. Here are some
advantages, disadvantages, and applications of the Brent-Kung adder:

Advantages:

Faster speed: The Brent-Kung adder is faster than many other types of
adders because it uses a parallel structure to perform additions.
Smaller area: The Brent-Kung adder has a smaller area than many other
types of adders, making it a good choice for designs where space is
limited.
Low power consumption: The Brent-Kung adder consumes less power
than many other types of adders, which makes it a good choice for designs
that need to conserve power.

Disadvantages:

Complexity: The Brent-Kung adder is more complex than some other types
of adders, which can make it more difficult to design and debug.
Limited scalability: The Brent-Kung adder is not as scalable as some other
types of adders, which means that it may not be suitable for designs that
require a large number of additions.

Applications:

Digital signal processing: The Brent-Kung adder is often used in digital

signal processing applications, where fast addition is important.
Cryptography: The Brent-Kung adder can be used in cryptographic
applications, where fast and secure addition is important.
High-performance computing: The Brent-Kung adder is used in high-
performance computing applications, such as supercomputers and data
centers, where fast addition is critical for processing large amounts of data.
Code:

----------------------------------------------------------------------------------------------------------
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 01.03.2023 12:32:42
// Design Name:
// Module Name: bk_4
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////

module bk_4(
input [3:0]A,
input [3:0]B,
output [3:0]S,
output cout
);

wire c1,c2,c3,c4;
wire [3:0]G;
wire [3:0]P;

assign G[0]=A[0]&B[0];
assign G[1]=A[1]&B[1];
assign G[2]=A[2]&B[2];
assign G[3]=A[3]&B[3];
 assign P[0]=A[0]^B[0];
assign P[1]=A[1]^B[1];
assign P[2]=A[2]^B[2];
assign P[3]=A[3]^B[3];

assign c1=G[0];
assign c2=G[1]|(P[1]&c1);
assign c3=G[2]|(P[2]&(G[1]|(P[1]&c1)));
assign c4=G[3]|(P[3]&(G[2]|(P[2]&(G[1]|(P[1]&c1)))));

assign S[0]=P[0]^G[0];
assign S[1]=P[1]^G[1];
assign S[2]=P[2]^G[2];
assign S[3]=P[3]^G[3];
assign cout=c4;

endmodule

----------------------------------------------------------------------------------------------------------
Synthesis Schematic:

Fig2.Synthesis Schematic diageram

RTL Schematic:

Fig3. RTL Schematic diageram

Output time waveforms:

Fig4.Output Waveform-I

Fig5: Output Waveform-II

 The National Institute of Engineering, Mysore
Department of Electronics and Communication

REFERENCES

[1] Pallavi Saxena in paper entitled “Design of Low Power and High Speed Carry
Select Adder Using Brent Kung Adder”. In 2015 International Conference on
VLSI Systems, Architecture, Technology and Applications (VLSI-SATA).

[2] B. Ramkumar, Harish M Kittur in paper entitled “Low power and Area efficient
carry select adder”. In 2012 IEEE Transactions on Very Large Scale Integration
(VLSI) Systems.

[3] wikipedia.org/wiki/Brent%E2%80%93Kung_adder