CSC-150

Busbar Protection IED

Manual
CSC-150 系列数字式母线保护装置
说明书
（英文）

编 制：
杨帆
校 核：
标准化审查： 杨栋伟
审 定： 刘晓丰

孙娴
版 本 号：V1.03
文件代号：
V1.03
出版日期：2019 年 11 月
0000211054

2019年11月
 Version：V1.03
Doc. Code：0000211054
Issued Date：2019.11
Copyright owner: Beijing Sifang Automation Co., Ltd

Note: the company keeps the right to perfect the instruction. If equipment
does not agree with the instruction at anywhere, please contact our
company in time. We will provide you with corresponding service.

®
is registered trademark of Beijing Sifang Automation Co., Ltd.

We reserve all rights to this document, even in the event that a patent is issued and a
different commercial proprietary right is registered. Improper use, in particular reproduction
and dissemination to third parties, is not permitted.

This document has been carefully checked. If the user nevertheless detects any errors, he
is asked to notify us as soon as possible.

The data contained in this manual is intended solely for the product description and is not
to be deemed to be a statement of guaranteed properties. In the interests of our customers,
we constantly seek to ensure that our products are developed to the latest technological
standards as a result; it is possible that there may be some differences between the
hardware/software product and this information product.

Manufacturer: Beijing Sifang Automation Co., Ltd.

Email: [email protected]
Website: http://www.sf-auto.com
Add: Number9, Shangdi 4th Street, Haidian District, Beijing, P.R.C.100085
Preface
Purpose of this manual
This manual describes the functions, operation, installation, and placing
into service of IED CSC-150. In particular, one will find:
 Information on how to configure the IED scope and a description of
the IED functions and setting options;
 Instructions for mounting and commissioning;
 Compilation of the technical specifications;
 A compilation of the most significant data for experienced users in
the Appendix.

Target audience
This manual mainly face to installation engineer, commissioning engineer
and operation engineer with perfessional electric and electrical
knowledge, rich experience in protection function, using protection IED,
test IED, responsible for the installation, commissioning, maintenance
and taking the protection IED in and out of normal service.

Applicability of this manual

This manual is valid for CSC-150 busbar protection IED.
Note: the password for this device is 8888.

Technical support
In case of further questions concerning the CSC family, please contact
SiFang company or your local SiFang representative.

Safety information

Strictly follow the company and international safety regulations.

Working in a high voltage environment requires serious approch
to aviod human injuries and damage to equipment

Do not touch any circuitry during operation. Potentially lethal

voltages and currents are present

I
 Avoid touching the circuitry when covers are removed. The IED
contains electirc circuits which can be damaged if exposed to
static electricity. Lethal high voltage circuits are also exposed
when covers are removed

Using the isolated test pins when measuring signals in open

circuitry. Potentially lethal voltages and currents are present

Never connect or disconnect wire and/or linker to or from IED

during normal operation. Dangerous voltages and currents are
present. Operation may be interrupted and IED and measuring
circuitry may be damaged

Always connect the IED to protective earth regardless of the

operating conditions. Operating the IED without proper earthing
may damage both IED and measuring circuitry and may cause
injuries in case of an accident

Do not disconnect the secondary connection of current

transformer without short-circuiting the transformer’s secondary
winding. Operating a current transformer with the secondary
winding open will cause a high voltage that may damage the
transformer and may cause injuries to humans

Do not remove the screw from a powered IED or from an IED

connected to power circuitry. Potentially lethal voltages and
currents are present

Using the certified conductive bags to transport PCBs (modules).

Handling modules with a conductive wrist strap connected to
protective earth and on an antistatic surface. Electrostatic
discharge may cause damage to the module due to electronic
circuits are sensitive to this phenomenon

Do not connect live wires to the IED, internal circuitry may be

damaged

II
When replacing modules using a conductive wrist strap
connected to protective earth. Electrostatic discharge may
damage the modules and IED circuitry

When installing and commissioning, take care to avoid electrical

shock if accessing wiring and connection IEDs

Changing the setting value group will inevitably change the IEDs
operation. Be careful and check regulations before making the
change

The hazardous wastes of lead and printed circuit are in the

device, when it is scrapped, please refer to The Law of The
Peoples’ Republic of China on Prevention and Control of
Environment Pollution by Solid Waste or the related laws and
regulations and the wastes should be processed by the qualified
cooperation

III
Contents
Chapter 1 Introduction ..........................................................................................1
1 IED overview ....................................................................................................2
2 IED characteristic .............................................................................................2
3 Basic function ...................................................................................................3
3.1 Protection function ............................................................................... 3
3.2 Monitoring function .............................................................................. 4
3.3 Communication mode .......................................................................... 4
Chapter 2 General functions ................................................................................ 5
1 Event record and analysis ................................................................................ 6
1.1 Overview ..............................................................................................6
1.2 Fault record .........................................................................................6
1.3 Wave form record ................................................................................ 6
1.4 Sequence of event (SOE) .................................................................... 6
1.5 Operation record ..................................................................................7
2 Diagnostic function ...........................................................................................7
2.1 Overview ..............................................................................................7
2.2 Diagnostic principle ............................................................................. 7
3 Time synchronization function .......................................................................... 7
3.1 Overview ..............................................................................................7
3.2 Synchronization principle ..................................................................... 8
3.3 IRIG-B code synchronization mode ..................................................... 8
3.4 PPS synchronization mode ................................................................. 9
3.5 SNTP time synchronization mode ....................................................... 9
3.6 Synchronization mode ......................................................................... 9
4 Authorization ....................................................................................................9
Chapter 3 Communication set between central unit and bay unit ...................... 11
1 Distributed busbar differential ......................................................................... 12
1.1 Physical connection between central unit and bay unit ..................... 12
1.2 Set of central unit and bay unit .......................................................... 13
1.3 Communication alarm ........................................................................ 14
1.4 Abnormal alarm of bay unit ................................................................ 14
1.5 Technical data ....................................................................................14
2 Centralized busbar differential ........................................................................ 15
2.1 Physical connection between central unit and slave unit................... 15
2.2 Set of central unit and bay unit .......................................................... 15
2.3 Communication alarm ........................................................................ 16
2.4 Abnormal alarm of bay unit ................................................................ 16
2.5 Technical data ....................................................................................16
Chapter 4 Busbar differential protection ............................................................. 17
1 Overview ........................................................................................................18
2 Function module description .......................................................................... 19
3 Detailed description ........................................................................................20
3.1 Protection principle ............................................................................ 20
3.1.1 Protection characteristic ............................................................. 20
3.1.2 Main wiring mode selection ........................................................ 21
3.1.3 CT connection instructions ......................................................... 24

V
 3.1.4 Automatic CT ratio adjustment ................................................... 26
3.1.5 Isolator position detection .......................................................... 26
3.1.6 Circuit breaker state ................................................................... 27
3.1.7 CT failure detection .................................................................... 27
3.1.8 Malfunction processing of bay unit (in distributed mode) ........... 27
3.1.9 Malfunction processing of bay unit (in centralized mode) .......... 27
3.1.10 Voltage blocking ......................................................................... 28
3.1.11 External binary input blocking differential................................... 28
3.1.12 Bus coupler dead zone protection ............................................. 28
3.1.13 Logic diagram ............................................................................ 30
3.2 Setting list ......................................................................................... 30
3.3 Report list .......................................................................................... 31
3.4 Technical data................................................................................... 32
Chapter 5 CBF protection .................................................................................. 33
1 Overview ........................................................................................................ 34
2 Function module description .......................................................................... 34
3 Detailed description ....................................................................................... 35
3.1 Protection principle ........................................................................... 35
3.1.1 Current check ............................................................................. 35
3.1.2 Voltage blocking ......................................................................... 36
3.1.3 CBF protection trip logic ............................................................. 37
3.1.4 External circuit breaker failure binary input trip busbar .............. 40
3.1.5 Other instructions ....................................................................... 40
3.2 Setting list ......................................................................................... 41
3.3 Report list .......................................................................................... 42
3.4 Technical data................................................................................... 43
Chapter 6 Bus coupler overcurrent protection ................................................... 45
1 Overview ........................................................................................................ 46
2 Function module description .......................................................................... 46
3 Detailed description ....................................................................................... 46
3.1 Protection principle ........................................................................... 47
3.1.1 Time characteristic ..................................................................... 47
3.1.2 Trip characteristic ....................................................................... 47
3.1.3 Logic diagram ............................................................................ 47
3.2 Setting list ......................................................................................... 48
3.3 Report list .......................................................................................... 49
3.4 Technical data................................................................................... 49
Chapter 7 Bus coupler failure protection ........................................................... 51
1 Overview ........................................................................................................ 52
2 Function module description .......................................................................... 52
3 Detailed description ....................................................................................... 52
3.1 Protection principle ........................................................................... 52
3.1.1 Current check ............................................................................. 53
3.1.2 CBF protection trip logic ............................................................. 53
3.1.3 External circuit breaker failure binary input trip busbar .............. 54
3.2 Setting list ......................................................................................... 54

VI
 3.3 Report list ..........................................................................................55
3.4 Technical data ...................................................................................56
Chapter 8 Bay overcurrent protection ................................................................ 57
1 Overview ........................................................................................................58
2 Function module description .......................................................................... 58
3 Detailed description ........................................................................................58
3.1 Protection principle ............................................................................ 58
3.1.1 Definite time characteristic .......................................................... 58
3.1.2 Trip characteristic........................................................................ 58
3.1.3 Logic diagram ............................................................................. 59
3.2 Setting list ..........................................................................................59
3.3 Report list ..........................................................................................59
3.4 Technical data ...................................................................................60
Chapter 9 Bay dead zone protection .................................................................. 61
1 Overview ........................................................................................................62
2 Function module description .......................................................................... 62
3 Detailed description ........................................................................................63
3.1 Protection principle ............................................................................ 63
3.1.1 Trip characteristic........................................................................ 63
3.1.2 Logic diagram ............................................................................. 64
3.2 Setting list ..........................................................................................65
3.3 Report list ..........................................................................................65
3.4 Technical data ...................................................................................66
Chapter 10 Secondary circuit monitoring ............................................................. 67
1 CT failure ........................................................................................................68
1.1 Overview ............................................................................................68
1.2 Function module description .............................................................. 68
1.3 Detailed description ........................................................................... 68
1.3.1 Protection principle ..................................................................... 68
1.3.2 Setting list ...................................................................................71
1.3.3 Report list....................................................................................73
2 VT failure ........................................................................................................73
2.1 Overview ............................................................................................73
2.2 Function module description .............................................................. 74
2.3 Detailed description ........................................................................... 74
2.3.1 Protection principle ..................................................................... 74
2.3.2 Setting list ...................................................................................75
2.3.3 Report list....................................................................................76
2.3.4 Technical data ............................................................................. 77
Chapter 11 User-defined function ........................................................................ 79
1 Overview ........................................................................................................80
2 User-defined configuration ............................................................................. 80
2.1 Open project ......................................................................................80
2.2 Binary input configuration .................................................................. 80
2.3 Binary output configuration ................................................................ 81
2.4 LED configuration .............................................................................. 83
2.5 IO Matrix configuration ...................................................................... 84

VII
 2.5.1 AC IO configuration .................................................................... 84
2.5.2 Digital IO configuration ............................................................... 84
2.6 Binary input switch setting group ...................................................... 85
2.6.1 Function description ................................................................... 85
2.6.2 Setting list .................................................................................. 86
2.7 Other configurations.......................................................................... 86
2.8 Defined logic ..................................................................................... 86
Chapter 12 Substation communication ................................................................ 87
1 Overview ........................................................................................................ 88
1.1 Communication protocol ................................................................... 88
1.1.1 IEC61850-8 communication protocol ......................................... 88
1.1.2 IEC60870-5-103 communication protocol .................................. 88
1.2 Communication port .......................................................................... 88
1.2.1 Front plate communication port ................................................. 88
1.2.2 RS485 communication port ........................................................ 88
1.2.3 Ethernet communication port ..................................................... 88
1.3 Technical data................................................................................... 89
1.4 Typical substation communication mode .......................................... 90
1.5 Typical clock synchronization mode ................................................. 90
Chapter 13 Distributed IED hardware .................................................................. 91
1 Main device hardware.................................................................................... 92
1.1 Overview ........................................................................................... 92
1.1.1 IED structure .............................................................................. 92
1.1.2 Module arrangement diagram .................................................... 92
1.2 Man-machine interface (MMI) and operation .................................... 93
1.2.1 Liquid crystal display (LCD) ....................................................... 93
1.2.2 Man-machine interface (MMI) .................................................... 93
1.2.3 Menu structure ........................................................................... 95
1.3 BI modules ........................................................................................ 99
1.3.1 Overview .................................................................................... 99
1.3.2 BI module description ................................................................ 99
1.3.3 Technical data .......................................................................... 100
1.4 BO modules .................................................................................... 100
1.4.1 Overview .................................................................................. 100
1.4.2 BO Module description ............................................................. 100
1.4.3 Technical data .......................................................................... 101
1.5 CPU module.................................................................................... 102
1.5.1 Overview .................................................................................. 102
1.5.2 CPU module terminal diagram ................................................. 102
1.5.3 Technical data .......................................................................... 104
1.6 Data management module.............................................................. 105
1.6.1 Overview .................................................................................. 105
1.6.2 Data management terminal diagram for module ...................... 105
1.6.3 Technical data .......................................................................... 106
1.7 Power supply module...................................................................... 106
1.7.1 Overview .................................................................................. 106

VIII
 1.7.2 Power module introduction ....................................................... 107
1.7.3 Technical data ........................................................................... 108
1.8 wiring terminal .................................................................................108
1.9 Test ..................................................................................................108
1.10 Structural design .............................................................................. 110
1.11 CE certification ................................................................................ 110
2 Bay unit hardware......................................................................................... 110
2.1 Overview .......................................................................................... 110
2.1.1 IED structure ............................................................................. 110
2.1.2 Module arrangement diagram ................................................... 111
2.2 Man-machine interface (MMI) and operation ................................... 112
2.2.1 Liquid crystal display (LCD) ...................................................... 112
2.2.2 Man-machine interface (MMI) ................................................... 112
2.2.3 Menu structure .......................................................................... 114
2.3 Analog input module ........................................................................ 116
2.3.1 Overview ................................................................................... 116
2.3.2 Analog input module introduction ............................................. 116
2.3.3 Technical data ........................................................................... 117
2.4 BIO module ...................................................................................... 118
2.4.1 Overview ................................................................................... 118
2.4.2 BIO module introduction ........................................................... 118
2.4.3 Technical data ........................................................................... 120
2.5 CPU module ....................................................................................120
2.5.1 Overview ...................................................................................120
2.5.2 CPU module introduction .......................................................... 121
2.6 Power supply module ...................................................................... 122
2.6.1 Overview ...................................................................................122
2.6.2 Power module introduction ....................................................... 122
2.6.3 Technical data ........................................................................... 123
2.7 Wiring terminal .................................................................................123
2.8 Test ..................................................................................................124
2.9 Structural design .............................................................................. 126
2.10 CE Certification ................................................................................ 126
Chapter 14 Centralized IED hardware ............................................................... 127
1 Main device hardware ..................................................................................128
1.1 Overview ..........................................................................................128
1.1.1 IED structure ............................................................................. 128
1.1.2 Module arrangement diagram ................................................... 128
1.2 Analog input module ........................................................................ 129
1.2.1 Overview ...................................................................................129
1.2.2 Analog input module introduction ............................................. 129
1.2.3 Technical parameter ................................................................. 130
1.3 Man-machine interface (MMI) and operation ................................... 130
1.3.1 Liquid crystal display (LCD) ...................................................... 130
1.3.2 Man-machine interface (MMI) ................................................... 130
1.3.3 Menu structure .......................................................................... 132
1.4 BI modules .......................................................................................137

IX
 1.4.1 Overview .................................................................................. 137
1.4.2 BI Module description .............................................................. 137
1.4.3 Technical parameter ................................................................. 138
1.5 BO modules .................................................................................... 138
1.5.1 Introduction .............................................................................. 138
1.5.2 BO module description ............................................................. 139
1.5.3 Technical parameter ................................................................. 140
1.6 Binary input and output module ...................................................... 141
1.7 CPU module.................................................................................... 141
1.7.1 Overview .................................................................................. 141
1.7.2 CPU moduleintroduction .......................................................... 141
1.7.3 Technical parameter ................................................................. 144
1.8 Power supply module...................................................................... 145
1.9 Wire connection terminal ................................................................ 145
1.10 Test ................................................................................................. 145
1.11 Structural design ............................................................................. 147
1.12 CE Certificate .................................................................................. 147
2 Slave unit hardware ..................................................................................... 148
2.1 Overview ......................................................................................... 148
2.1.1 IED structure ............................................................................ 148
2.1.2 Module arrangement diagram .................................................. 148
2.2 Analog input module ....................................................................... 148
2.2.1 Overview .................................................................................. 148
2.2.2 Analog input module introduction ............................................. 149
2.2.3 Technical parameter ................................................................. 149
2.3 Man-machine interface (MMI) and operation .................................. 150
2.4 BI modules ...................................................................................... 150
2.5 BO modules .................................................................................... 150
2.6 Binary input and output module ...................................................... 150
2.7 CPU module.................................................................................... 150
2.7.1 Overview .................................................................................. 150
2.7.2 CPU module terminal diagram ................................................. 150
2.8 Power supply module...................................................................... 152
2.9 Wire connection terminal ................................................................ 152
2.10 Test ................................................................................................. 152
2.11 Structural design ............................................................................. 154
2.12 CE Certificate .................................................................................. 154
Chapter 15 Appendix ......................................................................................... 155
1 Setting list .................................................................................................... 156
2 Report list..................................................................................................... 159
2.1 Alarm report .................................................................................... 159
2.2 Operation report .............................................................................. 161
2.3 Explanation of abbreviations ........................................................... 162
2.3.1 Explanation of setting abbreviations ........................................ 162
2.3.2 Explanation of logic switch abbreviations ................................ 165
2.3.3 Explanation of trip report and alarm report .............................. 166
2.3.4 Explanation of operation report abbreviations ......................... 169
2.3.5 Explanation of device menu abbreviations .............................. 170

X
 Chapter 1 Introduction

Chapter 1 Introduction

About this chapter

This chapter gives an introduction of SIFANG Busbar
Protection IED.

1
Chapter 1 Introduction

1 IED overview
The CSC-150 is a powerful busbar protection device with the
characteristics of selectivity, reliability and high speed. The device includes
central unit and bay unit.
Table 1 Type description

Type Description

CSC-150-EA-DM The central unit of distributed busbar protection

CSC-211-EB-DB The bay unit of distributed busbar protection

CSC-150-EBL The centralized busbar protection

The applications include the followings:

1) The IED is applicable to various busbar arrangements of different
voltage level, including single busbar, single busbar with section,
double-busbar, double-busbar with one section, double-busbar with
bypass and one-and-a-half breaker.
2) The IED is applicable to solidly earthed, low impedance earthed or
isolated power system.
3) The IED can be used in a wide range of voltage levels, up to 1000kV.
4) It is able to communicate with substation automatic system.
All the main protection and backup protection can be configured in one
device, including differential protection, circuit breaker failure protection,
dead zone protection and overcurrent protection.

2 IED characteristic
1) The IED has an extensive functional library of protection and
monitoring, user configuration possibility and expandable hardware
design can meet with users' special requirements;
2) With dual-CPU interlock function, so as to avoid protection malfunction
in case of material fault of in-built elements:
a) Busbar differential protection (87BB):
 Low impedance busbar differential protection
 Selective zone tripping
 Extreme stability against exteral fault, short CT saturation-free
time
 Split phase measurement
 Integrated check zone
b) A complete protection functions library which includes:
 Busbar differential protection (87BB)
 Breaker failure protection (50BF)
 Dead zone protection (50DZ)
 Overcurrent protection (50)

2
 Chapter 1 Introduction

 Voltage transformer secondary circuit supervision (97FF)

 Current transformer secondary circuit supervision
3) Self-checking to all modules in the IED;
4) The device can provide complete report records, including operation
report, alarm report and tripping report. Up to 2000 reports can be
stored, and the reports can be saved, even there is a power outage;
5) It at most provides three electric/optical ports, and communicates with
substation automation system by choosing protocol IEC 61850 or IEC
60870-5-103 (TCP103);
6) RS485 port are provided for communication with substation
automation system through IEC 60870-5-103 protocol;
7) It supports PRP protocol based on IEC 62439-3, the device can be set
to PRP mode, and the dual network ports adopt redundant mode to
send and receive information in parallel；
8) Simple network time protocol (SNTP), pulse, IRIG-B or 1588
synchronizing modes can be selected to synchronize time;
9) Configurable LEDs (Light Emitting Diodes) and output relays satisfied
users’ requirement;
10) Multi-purpose and multi-functional man-machine interface.

3 Basic function
3.1 Protection function
Table 2 Protection function list
IEC 61850
IEC 60617
Function description ANSI code Logic node
symbol
name
Differential protection

Busbar differential protection 87BB PDIF

Breaker protection and control function

CBF protection 50BF RBRF

Bus coupler overcurrent protection 50

Bus coupler failure protection

Bay overcurrent protection 50

Bay dead zone protection 50DZ

Secondary system check

CT failure check

VT failure check 97FF

3
Chapter 1 Introduction

3.2 Monitoring function

Table 3 Monitoring function list

Description

Position of circuit breaker, disconnector and other switching devices monitoring

Self-diagnosis function

Disturbance and fault record

3.3 Communication mode

Table 4 Communication mode list

Communication port on the front plate

RJ45 Ethernet communication port

Communication port on the rear plate

Isolated RS485 communication port

Ethernet electrical/optical communication ports

Time synchronization port

Communication protocol

IEC 61850 protocol (support Master above version 4.0)

IEC 60870-5-103 protocol (support Master above version 4.0)

4
 Chapter 2 General functions

Chapter 2 General functions

About this chapter

The chapter describes general IED functions

5
Chapter 2 General functions

1 Event record and analysis

1.1 Overview
To get fast, complete and reliable information about fault current, voltage,
binary signal and other disturbances in the power system is very important.
Through record function of fault data, operators can make better analysis
about the related primary and secondary devices during and after the fault.
Operational personnel can acquire valuable information to explain the
cause of the fault and modify the IED configuration in accordance with the
conclusion to improve IED reliability.
Disturbance data includes devices samples and calculated analogs, BI
and BO signals.

1.2 Fault record

IED can save the latest 2000 fault records (which will not loss during power
failures). The records can be viewed through operation interface of device,
communication port or debugging software. The types of reports recorded
in failure records include startup report, trip report, alarm report, operation
report and BI change position report.
Main information of fault records includes:
1) Fault time: date and time;
2) Time list: trip component and time;
3) Operation data: Current, voltage, frequency and phase.

1.3 Wave form record

Recording function is used to capture the sampling data, analog data and
state data of predefined length before and after an event (analog data is
only applicable for the intermediate node, mid file), and replay the
protected equipment running track before and after the event. Any logic
component and BIO of the device can be used to trigger recording
function.
Recording contains analog channel, digital channel (BI, BO and protection
component states) as well as time standard sequence information.
IED makes data record according to each cycle. Each record total length
can reach up to 20s, and the latest 16 protection trips and16 times startups,
32 records can be saved totally.
Waveform record file can be exported through the Ethernet debugging port
by using the debugging tool software (COMTRADE type), it can also be
uploaded to engineer station through the substation communication
network and used to analyze IED trip.

1.4 Sequence of event (SOE)

IED monitors and records a total of 2000 state change events of the
position change of binary input and output, state change of wave recording
and connector enable/disable tripping in real time; it also records event
time scale, reason and present state. These real-time data are transferred
to the station control center through communication port. The protection
SOE reports can be exported and viewed by debugging software.

6
 Chapter 2 General functions

1.5 Operation record

IED records the latest 2000 important modification of operating parameters
and the operation object, operation time, data modifications or operational
reasons will be recorded, which can provide bases for accident tracing.
Operation information is saved in operation record of the IED. User can
view these report information through MMI or debugging software.

2 Diagnostic function
2.1 Overview
The device realizes the hardware and software self-checking and
monitoring of the device by means of energizing self-diagnosis and
operation self-monitoring to ensure the high reliability of the operation of
the device. Self checking objects include key components of hardware
(such as analog sampling circuit, BIO output circuit, RAM and ROM) and
hardware accessories (such as backup battery, communication interface)
and important running parameters (such as settings, soft connectors), in
addition, the embedded two level software monitor can be used to monitor
the operation conditions of the software. When the device detects any
abnormal conditions, the device will record the abnormal events and drive
signal node and LED lights. For the key abnormal conditions, the device
will block the protection function and the important output circuit to prevent
the device from malfunctions.
The user can also check the important hardware circuit of the device
through the test command provided by the device, such as the AC circuit,
BI circuit and BO circuit, etc.
In order to cooperate with automation system engineering implementation,
the device provides remote point test function, so the local SCADA and
remote master database can be checked, so the complicated manual point
check operation between the SCADA operator and remote operator is
avoided. Mainly includes the telesignalisation point check, telemetry point
check.

2.2 Diagnostic principle

1) Measurement device power;
2) Check zero drift and zero drift out-of-limits;
3) Confirm alarm circuit;
4) Check setting and parameter.

3 Time synchronization function

3.1 Overview
The IED, as a part of the protection system, can be time synchronized by
time synchronization source. In the security automation intelligent system,
through the time synchronization, IED and other devices in the system
have the same clock source. When the system fault or abnormal, there is a
unified clock reference between the various devices.

7
Chapter 2 General functions

3.2 Synchronization principle

Definition of time

The error of a clock is the difference between the actual time and the
synchronized clock. The rate accuracy of a clock is normally called the
clock accuracy. When the clock deviation is too large, the clock will
re-synchronize to ensure clock accuracy is within the set range.

Synchronization principle

Generally speaking, synchronization can be seen as a hierarchical

structure. A module is synchronized from a higher level and provides
synchronization to lower levels.

Figure 1 Synchronization principle diagram

A module of the system is synchronized when it receives synchronization
signal from a higher level and this module is time synchronization module.
The less the clock synchronization level, the higher the final time
synchronization accuracy is. The same module may have several options
of time synchronization sources with different errors; this module can
choose the best time source and adjust the internal clock, according to the
time synchronization source. The maximum error of a clock can be defined
as:
1) The maximum error of the last synchronization information;
2) The calculated time from last time synchronization information;
3) The rate accuracy of the internal clock in the module.
Time synchronization system provides three synchronization methods:
IRIG-B code, IEEE1588 and net synchronization and second pulse
synchronization.

3.3 IRIG-B code synchronization mode

CPU module of the device supports RS485 level IRIG-B (DC) time
synchronization.

8
 Chapter 2 General functions

3.4 PPS synchronization mode

CPU module of the device supports RS485 level PPS signal. If the
substation time is not synchronized with the standard time, the present
time of the substation will be regarded as valid time and the IED time is
synchronized with it. After receiving the pulse signal, the CPU can
automatically adapt to the positive and negative pulses.

3.5 SNTP time synchronization mode

SNTP time synchronization adopts question and answer type. A time
synchronization message is sent from IED to SNTP-server, and SNTP
server deals with the transmission delay, and then send the time
information to the device. SNTP time synchronization mode is through
Ethernet. In order to ensure SNTP time synchronization is normal, one
SNTP server must be set, it is suggested that one server can be set at one
substation. SNTP time synchronization accuracy is 1ms for binary inputs.
The IED itself can be set as a SNTP time synchronization server.

3.6 Synchronization mode

It supports IEEE1588 high precision network synchronization.

4 Authorization
To safeguard the interests of customers, accesses to the IED and the
debugging software are restricted in terms of authorization. In practice,
attention should be paid to the following aspects in the use of the IED and
associated debugging software:
1) There are two types of access to the IED:
a) Local, through the local HMI
b) Remote, through the communication ports
2) Different users have different authority to access to or operate device
or debug the software.

9
Chapter 3 Communication set between central unit and
bay unit

Chapter 3 Communication set

between central unit and
bay unit

About this chapter

This chapter gives an overview about communication set
between central unit and bay unit.

11
Chapter 3 Communication set between central unit and
bay unit

1 Distributed busbar differential

1.1 Physical connection between central unit and
bay unit
Connect the central unit and bay unit by using multimode LC jumper. The
connection interface of bay unit is ETH1 of CPU module and the
connection interface of central unit is the optical port of management
module. X4-ETH1 is voltage bay unit (BU0) interface,X4-ETH2 is bus
coupler bay unit (BU1) interface, X4-ETH3 is bus coupler (bypass) bay unit
(BU2), the others are interfaces for bay unit and the numbers of bay unit
are in order.
The receiving port and sending port of central unit and bay unit should be
connect correctly, i.e. RX of central unit connects with TX of bay unit, TX of
central unit connects with RX of bay unit, otherwise, there is no
communication between central unit and bay unit.
If the communication is normal, the corresponding one of the 18 LEDs on
the rear data management plate will be flashing; if the connection is not
correct, the corresponding LED will be off. View from the rear plate, the
LED arrangement is shown as below:

LED1 LED4 LED7 LED11 LED14 LED17

LED2 LED5 LED8 LED12 LED15 /

LED3 LED6 / LED13 LED16 /

Figure 2 CSC-150-EA-D physical connection diagram of central and bay unit

LED1 corresponds to the EHT1 port of the board, the LED2 corresponds to
the EHT2 port of the board; the LED7 corresponds to the ETH7 port of the
board. LED 11 corresponds to the EHT 11 port of the board, in order, the
LED 17 corresponds to the ETH 17 port of the board.
LED 8 is the running light of CPU and is flashing when the CPU is running.
The specific connections are shown in figure.

CU CSC-150-EA-DM

BU0
BU1
BU2 P
O
CSC-211-EB-DB BU3
BU4 BI BO W
BU0 CPU E
BU5
BU6 R

P
O
CPU AC BIO W
E
R

Figure 3 CSC-150-EA-D Physical connection diagram of central and bay unit

12
Chapter 3 Communication set between central unit and
bay unit
1.2 Set of central unit and bay unit
The enabling and disabling of bay unit can be set in central unit, the path is:
SystemSet. When the central unit is set to make the corresponding bay
unit to exit, the communication between central unit and is interrupted by
optical fiber, then the host does not alarm the communication interruption
of sub machine which does not participate in the protection logic.
Main wiring type with bus coupler need enable bus coupler. If it disables
bay unit of bus coupler, it will not be considered in bay unit of bus coupler.
Main wiring type with bypssr bus need enable bay unit of bypass bus. If it
disables bay unit of bypass bus, it will not be considered in bay unit of
bypass bus.
If the bay unit connects with optical port of management module of central
unit, the optical port number of bay unit should be set, the path is:
SystemSet.
The specific connections are shown in table 1.
Table 5 Connected relation diagram between central and bay units of fourteen optical
ports on a single board

CSC-150-EA-DM CSC-150-EA-DM CSC-211-EB-DB

Port location on The name of the Setting value of "BUOpticalPortNo." in
the DM module corresponding bay unit the syatem setting
(or branch)
(order number of optical ports)
X4-ETH1 Bay unit 0(voltage bay unit ) 1
X4-ETH2 Bay unit 1 (branch 1) 2
X4-ETH3 Bay unit 2 (branch 2) 3
X4-ETH4 Bay unit 3 (branch 3) 4
X4-ETH5 Bay unit 4 (branch 4) 5
X4-ETH6 Bay unit 5 (branch 5) 6
X4-ETH7 Bay unit 6 (branch 6) 7
X4-ETH11 Bay unit 7 (branch 7) 8
X4-ETH12 Bay unit 8 (branch 8) 9
X4-ETH13 Bay unit 9 (branch 9) 10
X4-ETH14 Bay unit 10 (branch 10) 11
X4-ETH15 Bay unit 11 (branch 11) 12
X4-ETH16 Bay unit 12 (branch 12) 13
X4-ETH17 Bay unit 13 (branch 13) 14
X7-ETH1 Bay unit 14 (branch 14) 15
X7-ETH2 Bay unit 15 (branch 15) 16
X7-ETH3 Bay unit 16 (branch 16) 17
X7-ETH4 Bay unit 17 (branch 17) 18
X7-ETH5 Bay unit 18 (branch 18) 19
X7-ETH6 Bay unit 19 (branch 19) 20
X7-ETH7 Bay unit 20 (branch 20) 21
X7-ETH11 Bay unit 21 (branch 21) 22
X7-ETH12 Bay unit 22 (branch 22) 23
X7-ETH13 Bay unit 23 (branch 23) 24
X7-ETH14 Bay unit 24 (branch 24) 25
X7-ETH15 Bay unit 25 (branch 25) 26
X7-ETH16 Bay unit 26 (branch 26) 27
X7-ETH17 Bay unit 27 (branch 27) 28
X10-ETH1 Bay unit 28 (branch 28) 29
X10-ETH2 Bay unit 29 (branch 29) 30

13
Chapter 3 Communication set between central unit and
bay unit
CSC-150-EA-DM CSC-150-EA-DM CSC-211-EB-DB
Port location on The name of the Setting value of "BUOpticalPortNo." in
the DM module corresponding bay unit the syatem setting
(or branch)
(order number of optical ports)
X10-ETH3 Bay unit 30 (branch 30) 31
X10-ETH4 Bay unit 31 (branch 31) 32
X10-ETH5 Bay unit 32 (branch 32) 33
X10-ETH6 Bay unit 33 (branch 33) 34
X10-ETH7 Bay unit 34 (branch 34) 35
X10-ETH11 Bay unit 35 (branch 35) 36
X10-ETH12 Bay unit 36 (branch 36) 37
X10-ETH13 Bay unit 37 (branch 37) 38
X10-ETH14 Bay unit 38 (branch 38) 39
X10-ETH15 Bay unit 39 (branch 39) 40
X10-ETH16 Bay unit 40 (branch 40) 41
X10-ETH17 / /

1.3 Communication alarm

If the communication between the central unit and bay unit is interrupted
by optical fiber, the alarm reports will be shown on LED of central unit and
bay unit. Please check the connection and set.
Table 6 Alarm report of central unit

Number Report name Remark

Check if the optical fiber or module is
1 BUn NetACommInterrupt abnormal. The alarm restores automatically
when the optical fiber connects properly.
2 BUn NetBCommInterrupt Reserved
Check if the address of sub-device optical port
is consistent with that of the connected main
3 BUn NetAAddrErr
device. Press Reset to remove alarm, the
alarm will not restore automatically.
4 BUn NetBAddrErr Reserved

Table 7 Alarm report of bay unit

Number Report name Remark

Check if the optical fiber or module is
1 BUCommInterrupt abnormal. the alarm restores automatically
when the optical fiber connects properly.

1.4 Abnormal alarm of bay unit

If the bay unit itself is abnormal, the bay unit itself has a report.

1.5 Technical data

Technical parameters of optical fiber between central unit and bay unit:
1) Interface type: fiber optic Ethernet, bandwidth 10M/100M;
2) Fiber type: multimode fiber, recommended 62.5/125um;
3) Wavelength: 1310nm, transmission distance ≤2km;
4) Receiving sensitivity: -30dBm;

14
Chapter 3 Communication set between central unit and
bay unit
5) Fiber connector type: LC.

2 Centralized busbar differential

2.1 Physical connection between central unit and
slave unit
Connect the central unit and slave unit by using multimode LC jumper. The
X0 and X2 position jumpers are connected respectively.
The X0-ETH1 of slave unit 1 connects X0-EHT11 of central unit, the
X0-ETH1 of slave unit 2 connects the X0-EHT12 of central unit, the
X0-ETH1 of slave unit 3 connects the X0-EHT13 of central unit, and the
X0-ETH1 of slave unit 4 connects the X0-EHT14 of central unit.
The X2-ETH1 of slave unit 1 connects X2-EHT11 of central unit, the
X2-ETH1 of slave unit 2 connects the X2-EHT12 of central unit, the
X2-ETH1 of slave unit 3 connects the X2-EHT13 of central unit, and the
X2-ETH1 of slave unit 4 connects the X2-EHT14 of central unit
The receiving port and sending port of central unit and slave unit should be
connect correctly, i.e. RX of central unit connects with TX of slave unit, TX
of central unit connects with RX of slave unit, otherwise, there is no
communication between central unit and slave unit.
If the communication is normal, the corresponding one of the 4 LEDs on
the top of the CPU module of central unit will be flashing and the LED 1 of
CPU module of slave unit will be flashing; if the connection is not correct,
the corresponding LED will be off. The specific connections are shown in
the figure below.

CU CSC-150-EBL

P
O
BIO W
CPU E
R

BU1 BU2 BU3 BU4

P P P P
O O O O
BIO W BIO W BIO W BIO W
E E E E
CPU CPU CPU CPU
R R R R

Figure 4 CSC-150-EBL Physical connection diagram of central and bay unit

(take CPU1 as example, the CPU2 connection is same as CPU1)

2.2 Set of central unit and bay unit

The central unit needs to set the enabling and disabling of relevant bay,
the path is: SystemSet. When the relavant bay is disabled, if the bay of
bay unit is disconnnected from the optical fiber of central unit, the cenral
unit will not alarm that the communition of bay unit is disconnected, and
the bay unit do not participate the protection logic. When the relavant bay

15
Chapter 3 Communication set between central unit and
bay unit
is enabled, if the bay of bay unit is disconnnected from the optical fiber of
central unit, the cenral unit will alarm that the communition of bay uni is
disconnected.
The relevant setting of bay unit is set, and the path is: DebuggingMenu\
FactoryTest\SystemSet through AESP debugging tool. The description
is shown in the table below:
Table 8 Settng of system setting of bay unit
Optical port The first bay Description（relevant optical
Bay unit
number number port of central unit）
1 1 5 ETH11
2 2 11 ETH12
3 3 17 ETH13
4 4 23 ETH14

2.3 Communication alarm

If the communication between the central unit and bay unit is interrupted
by optical fiber, the alarm reports shows on LCD of central unit and there is
an contace output; the alarm reports does not show on LCD of bay unit,
but there is an contact output.. Please check the connection and set.
Please check the connection and set.

2.4 Abnormal alarm of bay unit

Because the bay unit has no faceplate, the bau unit failure and abnormal
operation alarm is prompted by the central unit. Specific alarm information
can be known through the AESP debugging tool to connect the debugging
network ports of bay unit.

2.5 Technical data

The same as the this chapter 1.3

16
 Chapter 4 Busbar differential protection

Chapter 4 Busbar differential

protection

About this chapter

This chapter describes busbar differential protection.

17
Chapter 4 Busbar differential protection

1 Overview
At present, the IED is applicable to single busbar, single busbar with
section, double-busbar, double-busbar with one section, double-busbar
with bypass and one-and-a-half breaker. Maximum distribution is 40 bays,
N as follows is 38; maximum centralized distribution is 28. N as follows is
26.
1) There are N lines in single busbar connection mode, and bus coupler
bay and by-pass bus bay should be vacant. Isolator position of busbar
2 and 3 of other bays are not connected. The default is at the position
of bus 1. If the bus 1 Isolator is not connected, the bay is not hung on
the bus bar;
2) There are 1 busbar and N lines in single busbar with section
connection mode, and by-pass bus bay should be vacant. Isolator
position of busbar 1, 2 and 3 of other bays are not connected. If the
by-pass XX in the device parameter is set at busbar 1; it is 1, it is at
busbar 1; if it is 0, and then it will be at busbar 2;
3) In double busbar mode, it includes 1 bus coupler, N lines, and by-pass
bus bay should be vacant. The bus coupler is fixed as bay 1 which
supports single CT or double CTs situations. According to the bus
coupler state, BAY1 IA1/BAY1 IB1/BAY1 IC1 will be calculated into
busbar 1 selective zone, according to the bus coupler state, BAY1
IA2/BAY1 IB2/BAY1 IC2 will be calculated into busbar 2 selective zone
For the other bays, the position of breaker will determine whether the
bay in involved in differential calculation, the position of isolator will
determine the selective zone I or II of the bay;
4) In double busbar with bypass mode, it includes 1 bus coupler, 1
bypass and N lines. The bus coupler is fixed as bay 1 which supports
single CT or double CTs situations. According to the bus coupler state,
BAY1 IA1/BAY1 IB1/BAY1 IC1 will be calculated into busbar 1
selective zone, according to the bus coupler state, BAY1 IA2/BAY1
IB2/BAY1 IC2 will be calculated into busbar 2 selective zone. Bypass
is fixed as bay 2 which supports single CT or double CTs situations.
According to the bypass breaker state, BAY2 IA1/BAY2 IB1/BAY2 IC1
will be calculated into busbar 1 and 2 selective zones, according to the
bypass breaker state, BAY1 IA2/BAY1 IB2/BAY1 IC2 will be calculated
into bypass selective zone. For the other bays, the position of breaker
will determine whether the bay in involved in differential calculation,
the position of isolator will determine the selective zone I, 2 or 3 of the
bay;
5) In double busbar with bypass mode, it includes 1 bypass and N lines,
and bus coupler bay should be vacant. The bypass is fixed as bay unit
2 which supports single CT or double CTs. According to the bypass
isolator state, BAY2 IA1/BAY2 IB1/BAY2 IC1 will be calculated into
busbar 1 selective zone, according to the bypass isolator state, BAY2
IA2/BAY2 IB2/BAY2 IC2 will be calculated into busbar 2 selective zone.
For the other bays, the position of breaker will determine whether the
bay in involved in differential calculation, the position of isolator will
determine the selective zone 1 or 2 of the bay;
6) There are N lines in single 3/2 connection mode, and bus coupler bay
and bypass bus bay should be vacant.

18
 Chapter 4 Busbar differential protection

2 Function module description

The I/O signals described herein only reflect the visible engineering part.
Busbar differential protection function input and output signal diagram is
shown as below:

BusBar 5ifferential
1 trotection 1
BIBLK87BB Bus1DiffAct
2 2
BIBLK1 Bus2DiffAct
3 3
BIBLK2 Bus3DiffAct
4 4
BIBLK3 BLK1
5
BLK2
6
BLK3
7
ISOFAIL
8
CBFAIL
9
BUSTIED

Figure 5 Input and output signal diagram of busbar differential protection function
The left is the input and the right is the output.
Table 9 Parameter description

Function Sign Description

Input

BIBLK87BB Blocking busbar differential binary input

BIBLK_IN BIBLK1 Blocking busbar 1 differential binary input

BIBLK2 Blocking busbar 2 differential binary input

BIBLK3 Blocking busbar 3 differential binary input

Output

Bus1DiffAct Busbar 1 differential trip

BusDiffAct
Bus2DiffAct Busbar 2 Phase C differential trip

Bus3DiffAct Busbar 3 differential trip

Output

BLK1 Binary input blocking busbar 1 differential

BIBLK_OUT
BLK2 Binary input blocking busbar 2 differential

BLK3 Binary input blocking busbar 3 differential

Output
Isolator position error/No isolator position
ISOFAIL
input
OUTPUT
Circuit breaker position discrepancy/No
CBFAIL
circuit breaker position input
BUSTIED Busbar interconnection

19
Chapter 4 Busbar differential protection

3 Detailed description
3.1 Protection principle
3.1.1 Protection characteristic

iDiff

1
K=
Trip zone

f_K
Dif
K=

Diff_Id

iRes

Figure 6 Characteristic of busbar differential protection

Where:

iDiff : Differential current threshold

iRe s : Restraint current

K: curve slope
Diff _ Id : "DiffCurrThreshold"
Diff _ K :"RestrCoef"
If a short circuit occurs on the busbars whereby the same phase relation
applies to all bays' currents, then the fault characteristic is 1 (angle is 45°).
Taking phase difference into account, the slope is "RestrCoef".

iDiff and iRe s are calculated in the IED according to following formula:

iDiff= n1i1sec + n2i2sec +  + nnin sec

iRe=
s n1i1sec + n2i2sec +  + nnin sec
Where:
n1, n2, nn: Ratio of CT ratio of each bay and reference CT ratio. Inner
setting of IED.
The IED evaluates the differential current and the restraint current at
consecutive sampling intervals. When the following equations have been
satisfied within the N sampling interval, the busbar protection will issue a
trip command signal.

20
 Chapter 4 Busbar differential protection

iDiff > Diff _ Id

iDiff > Diff _ K × iRe s

S1 S2 S1 S2 S3 S1 S2 S3 S1 S2 S3 S1 S2 S3

CBn
CB3 CB4
CB2
Bus coupler

S1 CB2

CB3 CB3
Selective
zone 1
CB4 CB4 Calculated
zone

CBn CBn

Line 3 Line 4 Line n

S2 CB2

CB3
Selective
zone 2
CB4

CBn

S3 CB3

Selective
CB4
zone 3

CBn

Figure 7 Calculated area of check zone and selective zone

3.1.2 Main wiring mode selection

Select the mode of the main wiring by setting "SLDMode" in
"TestMenuFactoryTestSystemSet".
Table 10 Main wiring mode selection
Setting
Wiring mode Remark
"SLDMode"
Bus coupler bypass busbar bay unit
0 Single busbar
dropout
1 Single busbar section Bypass busbar bay unit dropout
2 Double busbar Bypass busbar bay unit dropout
3 Double busbar with bypass busbar
4 Single busbar with bypass busbar Bus coupler bay unit dropout
Bus coupler bypass busbar bay unit
5 One and a half breaker connection
dropout

21
Chapter 4 Busbar differential protection

Busbar1

Figure 8 Connection diagram of single busbar

Busbar1 Busbar2

Figure 9 Connection diagram of single busbar section

Busbar1

Busbar2

Figure 10 Connection diagram of double busbar

22
 Chapter 4 Busbar differential protection

Busbar3

Busbar1

Busbar2

Figure 11 Connection diagram of double busbar with bypass busbar

Busbar3

Busbar1

Figure 12 Connection diagram of single busbar with bypass busbar

23
Chapter 4 Busbar differential protection

Busbar1

Figure 13 Diagram of one and a half breaker connection

3.1.3 CT connection instructions

3.1.3.1 Bus coupler CT failure
1) When CT primary connection is equipped with two CTs.

BZ1

BZ2

CSC-211-EB-DB

IA BAY1 IA1 BAY1 IA1’

B/C
IB BAY1 IB1 BAY1 IB1’
IC BAY1 IC1 BAY1 IC1’
IA
BAY1 IA2 BAY1 IA2’
IB
BAY1 IB2 BAY1 IB2’
Feeder n
IC
BAY1 IC2 BAY1 IC2’

IN

Figure 14 Two CTs connection method

2) When CT primary connection is equipped with one CT.
If the CT polarities of bus coupler and feeders on busbar 1 are inconsistent,
the CT connection diagram is shown as below:

24
 Chapter 4 Busbar differential protection

BZ1

BZ2

CSC-211-EB-DB
IA BAY1 IA1 BAY1 IA1’
B/C
IB BAY1 IB1 BAY1 IB1’
IC BAY1 IC1 BAY1 IC1’

BAY1 IA2 BAY1 IA2’

IN BAY1 IB2 BAY1 IB2’
Feeder n
BAY1 IC2 BAY1 IC2’

Figure 15 One CT connection diagram (polarity is consistent with busbar 1)

If the CT polarities of bus coupler and feeders on busbar 2 are inconsistent,
the CT connection diagram is shown as below:
BZ1

BZ2

CSC-211-EB-DB

BAY1 IA1 BAY1 IA1’

B/C
BAY1 IB1 BAY1 IB1’

BAY1 IC1 BAY1 IC1’

IN
IA BAY1 IA2 BAY1 IA2’
IB BAY1 IB2 BAY1 IB2’
Feeder n
IC BAY1 IC2 BAY1 IC2’

Figure 16 One CT connection diagram(polarity is consistent with busbar 2)

3.1.3.2 Bypass busbar CT connection
1) When CT primary connection is equipped with two CTs.

25
Chapter 4 Busbar differential protection

BUS1
CSC-211-EB-DB

BUS2 BAY1 IA1 BAY1 IA1’

IA

BUST BAY1 IB1 BAY1 IB1’

IB
CT1
IC BAY1 IC1 BAY1 IC1’

CT2 CT1
IN

BAY1 IA2 BAY1 IA2’

BAY1 IA

IB BAY1 IB2 BAY1 IB2’

CT2
IC BAY1 IC2 BAY1 IC2’

BAY2 IN
BAY3

Figure 17 Two CTs connection method

2) When CT primary connection is equipped with one CT.
BUS1
CSC-211-EB-DB
BUS2
BAY1 IA1 BAY1 IA1’
IA
BUST
BAY1 IB1 BAY1 IB1’
CT IB
BAY1 IC1 BAY1 IC1’
IC
BAY1 IA2 BAY1 IA2’
BAY1
CT
BAY1 IB2 BAY1 IB2’

BAY1 IC2 BAY1 IC2’

IN

BAY2
BAY3

Figure 18 Single CTs connection method

3.1.4 Automatic CT ratio adjustment

As the different loads for all bays connected to a busbar, the current
transformer ratios are different. The IED adjusts primary and secondary
values of all feeders automatically to make the secondary currents meeting
Krichhoff's current law (KCL). In order to ensure the correctness, the
branch CT primary value cannot exceed 2 times of the reference CT
primary value, otherwise the alarm will be issued and it is suggested to
modify the CT primary and secondary value.
3.1.5 Isolator position detection
The IED confirms the disconnector status by monitoring the disconnector
auxiliary contacts. For each disconnector, both the normally open state
contact (NO) and normally close status contact (NC) are required. Based
on the status of these two contacts, the IED can discriminate error of the
contacts and then alarm or/and block the relevant bus zone of differential
protection depending on the setting. In common setting, if the "Isol Fail

26
 Chapter 4 Busbar differential protection

Alarm Only" is set as 0, the alarm will be issued and the corresponding
busbar differential will be blocked. If the "Isol Fail Alarm Only" is set as 1,
the alarm will be issued and the trip command will be executed according
to the previous healthy state of the breaker before the contacts error.
The used bay disconnector BI should access to the IED one by one and
ensure the disconnection switch states are opposite in one bay, otherwise,
disconnector position alarm will be issued.
3.1.6 Circuit breaker state
Both normally open status contact and normally close status contact of
circuit breakers of all bays access to the IED. If the state is abnormal,
alarm will be issued and the trip command will be executed according to
the previous healthy state of the breaker before the contacts error.
The used bay breaker BI should access to the IED one bay one and
ensure the breaker states are opposite in one bay, otherwise, breaker
position alarm will occur.
3.1.7 CT failure detection
CT disconnection increases differential current. The device will detect CT
failure, then give an alarm, or block differential protection.
3.1.8 Malfunction processing of bay unit (in distributed
mode)
3.1.8.1 Malfunction processing of bus coupler bay unit
In common setting, when "BC BUFaultBlkDiff"=1, and "BU1On"=1, and the
maintenance between central unit and bay unit is inconsistent as well as
the communication interruption occurs to the bay unit terminal of bus
coupler and class 1 alarm is issued by bay unit of bus coupler, the
differential protection is blocked.
In common setting, when "BC BUFaultBlkDiff"=0, and "BU1On"=1,
"IsoErrAlarmOnly"=1, and the maintenance between central unit and bay
unit is inconsistent as well as the communication interruption occurs to the
bay unit terminal of bus coupler and class 1 alarm is issued by bay unit of
bus coupler, the differential protection is blocked.
3.1.8.2 Malfunction processing of bay unit of bay
When some bay unit is enabled, the maintenance between central unit and
bay unit is inconsistent as well as the communication interruption occurs to
the bay unit terminal and class 1 alarm of the bay unit is issued, the
differential protection is blocked.
3.1.8.3 Malfunction processing of voltage bay unit
"BU0On"=1, the maintenance between central unit and bay unit is
inconsistent as well as the communication interruption occurs to the
voltage bay unit terminal and class 1 alarm of the voltage bay unit is issued,
the default voltage is open.
3.1.9 Malfunction processing of bay unit (in centralized
mode)
When the bay is enabled, and communication of bay unit of the bay is
disconnected or class 1 alarm is issued, the backup protection at the

27
Chapter 4 Busbar differential protection

branch is blocked and the differential protction is also blocked.

3.1.10 Voltage blocking
When "VoltBlkDiffLS" =1 and "DiffLS"=1, and "BU0On" =1(centralized
default enabling), the differential protection of the following busbar
blocking is satisfied. The voltage blocking is detected in accordance with
different busbar sections.
Taking busbar 1 voltage blocking as an example in the following logic
diagram, the logic diagrams of busbar 2 and 3 voltage blocking are the
same as that of busbar 1.
Umin>“UVBlkSet”

3U2<“U2BlkSet”
&

3U0<“3U0BlkSet”

No VT failure of busbar

Busbar 1 voltageblocking
“VoltBlkLS”=1 & differential is met

“DiffLS”=1

Umin：The minimum value of busbar 1 three-phase phase

voltage

3U2：Busbar 1 negative sequence voltage

3U0：Busbar 1 zero sequence voltage

Figure 19 Logic diagram of voltage blocking differential

3.1.11 External binary input blocking differential

When "BIBlkBus1Diff" (corresponding to the "BIBLK1" in digital IO
configuration) and "BIBlkBus2Diff" (corresponding to the "BIBLK2" in
digital IO configuration) as well as "BIBlkBus3Diff" (corresponding to the
"BIBLK3" in digital IO configuration) and "BIBlkDiff" (corresponding to the
"BIBLK87BB" in digital IO configuration) are valid, the differential
protection of related busbar sections is blocked.
>=1
BIBlkDiff=1 BI blocking bus 1 differential
is satisfied.
BIBlkBus1DiffOutput=1

>=1
BI blocking bus 2 differential
BIBlkBus2DiffOutput=1 is satisfied.

>=1
BI blocking bus 3 differential
BIBlkBus3DiffOutput=1 is satisfied.

Figure 20 Diagram of binary input blocking busbar differential

3.1.12 Bus coupler dead zone protection

Dead zone faults refer to faults occur between the CT and circuit breakers
of bus coupler. Taking the double busbars bus coupler wiring for example,
the following analyzes the trip of differential protection in the case of dead
zone faults. If "BC DZ LS"=0, the following
1) Dead zone fault during parallel operation of busbars
Schematic diagram of dead zone fault during parallel operation of busbars

28
 Chapter 4 Busbar differential protection

is shown as the following figure. The differential protection of busbar 1 trips

all bay circuit breakers connected to the busbar 1, including the bus
coupler circuit breaker. If bus coupler trip exists after busbar 1 differential
triping, the bus coupler is detected in valid state by time delay “BC DZ
CTDisconnTime”. If it is valid, the CT current of bus coupler withdraws from
the differential calculation. After the current of bus coupler CT is cut off, the
differential current of busbar 2 is unbalanced, resulting in tripping of all bay
circuit breakers connected to the busbar 2, thus the dead zone fault is
isolated.

Busbar 1

Busbar 2

Figure 21 Diagram of dead zone fault during parallel operation of double-busbar

2) Dead zone fault during split operation of busbars
Schematic diagram of dead zone fault during split operation of busbars is
shown as the following figure. When the busbars run in split running mode,
the BCTripPosit is determined to be valid and the current of bus coupler
CT is not included into the current of the bus selective zone of busbars 1
and 2. If dean zone faults occur, the balanced differential current of busbar
1 and unbalanced differential current of busbar 2 make the differential
protection of busbar 2 act and trip all bay circuit breakers connected to the
busbar 2. The detections for the operation of busbar1 and busbar 2 are:
both busbar 1 and busbar 2 are in operation state, bus coupler trip position
is valid, and there is no current of bus coupler CT.

Busbar 1

Busbar 2

Figure 22 Diagram of dead zone fault during split operation of double-busbar

29
Chapter 4 Busbar differential protection

3.1.13 Logic diagram

“DiffLS”=1

PhADiffCurr>“DiffCurrThreshold” &
ConditionOf PhADiffCurrMet

PhADiffCurr/PhARestrCurr>“RestrCoef”

&
Bus1PhADiffCurr >“DiffCurrThreshold
ConditionOf Bus1PhADiffCurrMet

Bus1PhADiffCurr/Bus1PhARestrCurr>“RestrCoef”

&
Bus2PhADiffCurr>“DiffCurrThreshold”
ConditionOfBus2PhADiffCurrMet

Bus2PhADiffCurr/Bus2PhARestrCurr>“RestrCoef”

&
Bus3PhADiffCurr>“DiffCurrThreshold”
ConditionOf Bus3PhADiffCurrMet

Bus3PhADiffCurr/Bus3PhARestrCurr>“RestrCoef”

Condition of
PhADiffCurMet
&
ConditionofBus1PhA
“Bus1DiffTrip-PhA”
DiffCurrMet

Condition of Bus1VotBlkDiffMet
&
ConditionOfBus2PhADiffCurrMet Bus2DiffTrip-PhA

Bus2VoltBlkDiffConditionsMet
&
ConditionOfBus3PhADiffCurrMet “Bus3DiffTrip-PhA”

Bus3VoltBlkDiffConditionsMet

Figure 23 Logic diagram of differential protection

3.2 Setting list

Table 11 Busbar differential protection setting
Default
Number Setting name Range Step Unit Remark
value
1. DiffCurrThreshold 0.20In~20.00In 1.0 0.01 A Note 1:
2. RestrCoef 0.3~0.99 0.6 0.01
3. UVBlkDiffSet 0~100.0 40.0 0.01 V
4. 3U0BlkDIiffSet 0~100.0 6.0 0.01 V
5. U2BlkDiffSet 0~100.0 4.0 0.01 V
Note 1: In in the setting is "CTReferenceSecVal" in the equipment
parameter.
Table 12 Logic switch of differential protection
Set Default
Number Logic switch name Remark
mode value
1-busbar differential on; 0-busbar
1. DiffLS 1/0 0
differential off
1-voltage block on; 0-voltage
2. VoltBlkDiffLS 1/0 0
block off

30
 Chapter 4 Busbar differential protection

Table 13 Bus coupler dead zone protection setting

Default
Number Setting name Range Step Unit Remark
value
1. BC DZ CTDisconnTime 0.00~0.02 0.15 0.01 s

Table 14 Logic switch of bus coupler dead zone protection

Set Default
Number Logic switch name Remark
mode value
1-bus coupler dead zone
1. BC DZ LS 1/0 0 protection on; 0-bus coupler
dead zone protection off
Table 15 Logic switch of common settings
Set Default
Number Logic switch name Remark
mode value
1-Isol Fail alarm only; 0- Isol ail
1. IsoErrAlarmOnly 1/0 0
blocking differential protection
1-Busbar bay unit failure blocking
differential; 0-Busbar bay unit failure
2. BC BUFaultBlkDiff 1/0 0
unblocking differential; only
distributed has this setting.

3.3 Report list

Table 16 Report list

Number Report name Remark

Trip report:
1. DiffStartup /
2. Bus1DiffTrip-PhA /
3. Bus1DiffTrip-PhB /
4. Bus1DiffTrip-PhC /
5. Bus2DiffTrip-PhA /
6. Bus2DiffTrip-PhB /
7. Bus2DiffTrip-PhC /
8. Bus3DiffTrip-PhA /
9. Bus3DiffTrip-PhB /
10. Bus3DiffTrip-PhC /
Alarm report:
1. BlkBus1 /
2. BlkBus2 /
3. BlkBus3 /
4. VoltUnblkBus1Diff /
5. VoltUnblkBus2Diff /
6. VoltUnblkBus3Diff /
7. NoIsoPosnInput /
8. Bus1-2Tied /
9. Bus2-3Tied /

31
Chapter 4 Busbar differential protection

Number Report name Remark

10. Bus1-3Tied /
11. Bus1-2-3Tied /
12. Bus1IsoPosnErr /
13. Bus2IsoPosnErr /
14. Bus3IsoPosnErr /
15. CB PD /
16. NoCBPosnInput /
1.The primary value of bay CT is greater than 2 times
17. CTRatioOverLmt of reference CT
2. Reference CT primaryvalue is 0

3.4 Technical data

Table 17 Technical data for busbar differential protection
Content Range and value Error
Differential current pick up value 0.2In to 20.00In ≤ ±2.5% setting or ±0.02In
Percentage restraint factor value 0.3~0.99
Trip time < 20ms 200% setting
Reset time < 50ms
Undervoltage blocking setting 0~100V
Zero sequence voltage blocking
0~100V
setting
Blocking setting of negative
0~100V
sequence voltage

32
 Chapter 5 CBF protection

Chapter 5 CBF protection

About this chapter

This chapter describes the protection function of CBF

33
Chapter 5 CBF protection

1 Overview
CBF protection can detect whether CBF is operating or not during the fault
clearance. This protection can clear the fault by tripping the breaker of
corresponding busbars as fast backup protection. Once there is a breaker
failure on feeder or transformer, the connected busbar can be
disconnected from the power grid by CBF protection. If there is a fault on
busbar and breaker is failed, then IED sends the trip command to the
opposite of the feeder.
The CBF protection is configured respectively in each bay. CBF protection
trips the breaker according to "BaynCBFRetripTime" and trips all breaker
of busbar in accordance with "BaynCBFTripBusTime".
CBF protection monitors CBF initiating BI of each bay. The monitoring time
can be set in each bay. If one CBF initiating BI is abnormal and the lasting
time is longer than "BaynCBF BIMonitorTime" the IED will block the
initiating CBF protection function of this bay.
CBF protection has the characteristics as below:
1) 2 trip stages (local breaker retrip and trip the busbar);
2) Transfer trip command to the remote line end in second stage;
3) External initiation;
4) Differential startup;
5) 3/1 phase CBF initiation;
6) Current criteria checking (including phase current, zero and negative
sequence currents);
7) Selectable voltage blocking function.

2 Function module description

The I/O signals described herein only reflect the visible engineering part.
CBF protection function input and output signal diagram is shown as
below:

Circuit breaker failure protection

1
CBFRetrip

2
CBFTripBus1

3
CBFTripBus2

4
CBFBIALM
5
ExtCBFBITripBus1

6
ExtCBFBITripBus2

Figure 24 Diagram of input and output signals of CBF protection function

The left is the input and the right is the output.

34
 Chapter 5 CBF protection

Table 18 Parameter description

Function Sign Description

Output

CBFRetrip Failure retrip

OUTPUT CBFTripBus1 Circuit breaker failure trip of busbar 1

CBFTripBus2 Circuit breaker failure trip of busbar 2

CBFBIALM failure binary input alarm

Output

External circuit breaker failure binary input

ExtCBF_OUT ExtCBFBITripBus1
trip busbar 1
External circuit breaker failure binary input
ExtCBFBITripBus2
trip busbar 2

3 Detailed description
Expect bay 1 and 2, the other bays are equipped with circuit breaker failure
protection, please see the setting list.
For the selection of current input in bay 2 (bay 2); when the
"CT2MainCTOfBypassBus" is set as 1, and then CBF protection current is
acquired from CT2; when the "CT2MainCTOfBypassBus" is set as 0, and
then CBF protection current is acquired from CT1.

3.1 Protection principle

CBF protection can be enabled or disabled by setting the logic switch
When the function "BaynCBF LS" is enabled, the counter starts time
counting to the time delay of "BaynCBFRetripTime", and the circuit is still
close, and CBF proteciton issues trip command to trip breaker (through the
seondary trip coil). If the breaker has no response, when the other time
delay "BaynCBFTripBusTime" is over, then IED will send trip command to
trip the corresponding breakers and isolate the fault (the other breakers on
the same busbar of the failed breaker).
If the bay is not on the busbar or with voltage blocking, then the failure
logic will be blocked. The voltage blocking can be enabled or disable by
logic switch "VoltBlkCBF LS". Please refer to the voltage blocking logic of
differential protection for the CBF voltage blocking logic.
The external binary input and differential trip initiate CBF protection.
When the trip command is issued, CBF logic detects the current rather
than the auxiliary contact of the breaker.
3.1.1 Current check
When the current is disappeared, the breaker is considered to be on the
open position. So the current criterion is the most effective way to detect
the position of breaker. The current check, therefore, is used to detect the
breaker position in CBF protection. At this time, the current measurement
of each phase compares with the setting of 'CBFCurrentValue'. Besides,
• • • •
the zero sequence ( 3 I = I + I + I ) or negative sequence current
0 a b c

35
Chapter 5 CBF protection

• • • •
(3I = I a + a 2 I b + a I c ) can also be used as current criteria by setting the
2
logic switch. If the IED is set to detect zero and negative sequence
currents, then enable the "BaynCBF3I0/I2DetectLS", and zero/negative
sequence currents are compared with the corresponding settings.
Breaker current detection logic diagram is shown as below:

Ia >“BaynCBF OCSet”
&

3I0 > “BaynCBF3I0Set” Failure current as current

≥1
≥1 & & criteria of Phase A
3I2 > “BaynCBF3I2Set”

Ib >“BaynCBF OCSet”

Ic >“BaynCBF OCSet”

“BaynCBF3I0/I2DetectLS”=1

&
Ib > “BaynCBF OCSet”

≥1
3I0 > “BaynCBF3I0Set” & Failure current as current
≥1 & criteria of Phase B
3I2 > “BaynCBF3I2Set”

Ic >“BaynCBF OCSet”

Ia > “BaynCBF OCSet”

“BaynCBF3I0/I2DetectLS”=1

&
Ic >“BaynCBF OCSet”

≥1
3I0 > “BaynCBF3I0Set” & Failure current as current
≥1 & criteria of Phase C
3I2 > “BaynCBF3I2Set”

Ib >“BaynCBF OCSet”
≥1
Failure current as current
Ia >“BaynCBF OCSet” criteria of Phase 3

“BaynCBF3I0/I2DetectLS”=1

Figure 25 Logic diagram of breaker current detection

3.1.2 Voltage blocking

When "VoltBlkCBF LS" =1 and "BaynCBF LS"=1, and "BU0On"
=1(centralized default enabling), the CBF protection of the following
busbar blocking is satisfied. The voltage blocking is detected in
accordance with different busbar sections.
Taking busbar 1 voltage blocking as an example in the following logic
diagram, the logic diagram of busbar 2 is the same as that of busbar 1.

36
 Chapter 5 CBF protection

Umin>“UVBlkCBFSet”

3U2<“3U2BlkCBFSet” &

3U0<“3U0BlkCBFSet”

No VTFail on the Busbar

VoltBlkCondition
“VoltBlkCBF LS”=1 & Of busbarMet

“BaynCBF LS”=1

Umin: Three-phase phase voltage minimum value of busbar 1

3U2: Negative sequence voltage of busbar 1

3U0: Zero sequence voltage of busbar 1

Figure 26 Logic diagram of voltage blocking CBF

3.1.3 CBF protection trip logic

Internal startup failure is three-phase initiating circuit breaker failure
without internal single-phase initiating circuit breaker failure.
Logic of external binary input and internal startup failure is shown as
below.

&
“BaynCBF LS”=1 T_alarm Circuit breaker failure
binary input is abnormal

“Bayn_PhAInitCBF BI”

“Bayn_PhBInitCBF BI” ≥1

“Bayn_PhCInitCBF BI”

“Bayn_Ph3InitCBF BI”
&
Phase A initiating circuit
breaker failure
“Bayn_PhAInitCBF BI”

&
Phase B initiating circuit
breaker failure
“Bayn_PhBInitCBF BI”

&
Phase C initiating circuit
breaker failure
“Bayn_PhCInitCBF BI”

&

&

& ≥1
Phase 3 initiating circuit
breaker failure
&

“Bayn_Ph3InitCBF BI”

&

Internal 3-phase initiating

failure signal

T_alarm：“BaynCBF BIMonitorTime”

Figure 27 Logic diagram of external binary input and internal startup failure

37
Chapter 5 CBF protection

Logic diagram of initiating CBF is shown as below:

Bay n on busbar 1 or 2
&
“BUnOn”=1

“BaynCBF LS”=1

&
Bay n on busbar 1 CBF unblocking
&

Voltage blocking condition

of busbar 1 is met

Bay n on busbar 2
& ≥1

Voltage blocking condition

of busbar 2 is met

Bay n on busbar 3
&

Voltage blocking condition

of busbar 3 is met

CBF unblocking

CBFCurrCriteriaAPhLiveCurr
&
Phase A CBF startup
Phase A CBF

CBFCurrCriteriaBPhLiveCurr
&
Phase B CBF startup
Phase B CBF

CBFCurrCriteriaCPhLiveCurr
&
Phase C CBF startup
Phase C CBF

CBFCurrCriteria3PhLiveCurr
&
Phase 3 CBF startup
Phase 3 CBF

Figure 28 Logic diagram of initiating CBF

38
 Chapter 5 CBF protection

Logic diagram of CBF stage 1 trip is shown as below:

PhA CBFStartup
T1 ≥1
CBFStage1TripPhA

T1 ≥1
PhB CBFStartup
CBFStage1TripPhB

T1 ≥1
PhC CBFStartup
CBFStage1TripPhC

&

&

≥1
&
CBFStage1TripPh3

T1
3PhCBFStartup

T1：“BaynCBFRetripTime”

CBFStage1TripPhA

CBFStage1TripPhB ≥1
“BaynCBFRetrip”

CBFStage1TripPhC

CBFStage1TripPh3

Figure 29 Logic diagram of CBF stage 1 trip

Logic diagram of CBF stage 2 trips is shown as below:

39
Chapter 5 CBF protection

T2
PhA CBFStartup

T2
PhB CBFStartup

≥1
T2
PhC CBFStartup CBF Stage2Trip

T2
3PhCBFStartup

≥1

&

CBFail input

T2：“BaynCBFRetripTime”

&
CBFStage2Trip
Bus1 CBFTrip

Bay n on busbar 1

&
Bus2 CBFTrip
Bay n on busbar 2

Figure 30 Logic diagram of CBF stage 2 trip

3.1.4 External circuit breaker failure binary input trip busbar

When "ExtrCBF BITripBus" (corresponds with "External_CBF" of digital IO
configuration) is valid, then the circuit breaker of corresponding bay of
busbar will be tripped. n=2~N (Distributed N is 40, centralized N is 28) in
the logic diagram. The description for n=1 is in the part 3.1.3 of chapter 7.
&
“BaynCBF LS”=1

“BaynCBFTripExtrBIOn”=1

External circuit breaker failure

binary input 1 trip busbar=1 &

External circuit breaker failure

&
binary input 2 trip busbar=1 40ms
“ExtrCBFTripBus1”
Bay n on busbar 1

&
40ms
“ExtrCBFTripBus2”
Bay n on busbar 1

Figure 31 Logic diagram of external circuit breaker failure binary input trip busbar

3.1.5 Other instructions

Only the bay 2 (bypass bay) has external initiating CBF and internal
Busbar 2I differential initiating CBF. When differential initiates bypass CBF,
the bypass current value should be greater than the fixed value 0.1In (In is
"CTReferenceSecVal" in device parameter), the fixed time delay is 150ms.
CBF trips busbar 1 or busbar 2, according to the isolation position of
bypass. There is no T1 retrip for bypass CBF.

40
 Chapter 5 CBF protection

Note: The following logic diagram only apply to busbar with bypass
connection mode. If centralized, "BU2On" is replaced by " Bay2On ".

“Bay2CBF LS”=1 &

&
150ms
“BU2On”=1

Three-phase differential current maximum

value>
“DiffCurrThreshold”

Bay 2 breaker closing

&

Bus3DiffTrip

Three-phase current maximum

value of bay 2>0.1In

&
“Bus1CBFTrip”
Bay 2 on busbar 1

&
“Bus2CBFTrip”
Bay 2 on busbar 2

Figure 32 Logic diagram of bypass differential startup bypass failure

3.2 Setting list

Only take one bay CBF protection setting as an example, the other bays
have the same settings.
Table 19 CBF protection voltage blocking setting (for each bay)

Number Setting name Range Default value Step Unit Remark

1. UVBlkCBFSet 0~100 40.0 0.01 V
2. 3U0BlkCBFSet 0~100 6.0 0.01 V
3. U2BlkCBFSet 0~100 4.0 0.01 V

Table 20 CBF protection voltage blocking logic switch (for each bay)
Default
Number Logic switch name Set mode Remark
value
Voltage blocking CBF
1. VoltBlkCBF LS 1/0 1
enable/disable
Table 21 CBF protection setting (each bay is independent,n=2~40)
Default
Number Setting name Range Step Unit Remark
value
1. BaynCBF OCSet 0.1In~20In 1.0 0.01 A

2. BaynCBF3I0Set 0.1In~20In 1.0 0.01 A Note 1

3. BaynCBFI2Set 0.1In~20In 1.0 0.01 A

4. BaynCBFRetripTime 0.00~10.00 0.15 0.01 s

5. BaynCBFTripBusTime 0.00~10.00 0.25 0.01 s

BaynCBF
6. 0.00~15.00 10.0 0.01 s
BIMonitorTime

41
Chapter 5 CBF protection

Note 1: In in the setting is "BaynCTSecVal" in the equipment parameter. If

"CT2MainCTOfBypassBus" is set as 0, In is "Bay2_CT1SecVal" in the
equipment parameter, otherwise, In is "Bay2_CT2SecVal" in the
equipment parameter.
Table 22 CBF protection logic switch (each bay is independent, n=2~N, distributed N =
40, centralized N=28)
Set Default
Number Logic switch name Remark
mode value
1-Enable CBF
1. BaynCBF LS 1/0 0 0-Disable CBF
1-Enable CBF detecting
zero and negative
sequence current
2. BaynCBF3I0/I2DetectLS 1/0 0 0-Disable CBF detecting
zero and negative
sequence current
1-Enable external binary
input circuit breaker
failure trip bus
3. BaynCBFTripExtrBIOn 1/0 0
0-Disable external binary
input circuit breaker
failure trip bus
Table 23 Logic switch of common settings
Set Default
Number Logic switch name Remark
mode value
1-CT2 is main CT of
1. CT2MainCTOfBypassBus 1/0 0 bypass bus; 0-CT1 is
main CT of bypass bus;

3.3 Report list

Table 24 Report list (n=2~N, distributed N = 40, centralized N=28)

Number Report name Remark

Trip report:
1. CBFProtStartup /
2. BaynCBFRetrip /

3. Bus1CBFTrip /
4. Bus2CBFTrip /
5. ExtrFBITripBus1 /
6. ExtrFBITripBus2 /
Alarm report:
1. BaynCBF BIAlarm /

2. VoltUnblkBus1CBF /
3. VoltUnblkBus2CBF /

42
 Chapter 5 CBF protection

3.4 Technical data

Table 25 CBF protection technical data
Items Setting range Trip Value Error

Current setting
Negative sequence current ≤ ±2.5% times of setting or
0.1 In to 20.00 In
setting ±0.02In
Zero sequence current setting
Time 1 of circuit breaker failure 0.00s~10.00 s, step 0.01s ≤ ± 1% times of setting or
+40ms, when trip current is
Time 2 of circuit breaker failure 0.00s~10.00 s, step 0.01s set as 200% setting
DropoffCoef About 0.95
Time 1 reset time < 20ms
Time 2 reset time < 20ms
Undervoltage blocking setting 0~100.0V
Zero sequence voltage blocking
0~100.0V
setting
Blocking setting of negative
0~100.0V
sequence voltage

43
 Chapter 6 Bus coupler overcurrent protection

Chapter 6 Bus coupler overcurrent

protection

About this chapter

This chapter describes bus coupler overcurrent protection
function.

45
Chapter 6 Bus coupler overcurrent protection

1 Overview
The bus coupler overcurrent protection has two stages of overucrrent and
zero sequence current respectively, the current and time in each stage can
be set independently. Whether the bus coupler overcurrent protection
initiates bus coupler CBF is set by logic switch of bus coupler CBF
protection. Each stage of overcurrent protection has the same logic
criterion, and each stage can be enabled or disabled independently.
Main characteristics of overcurrent protection:
1) Phase current stage 2 current protection, each stage adopts definite
time;
2) Zero sequence stage 2 current protections, and each stage adopts
definite time.

2 Function module description

The I/O signals described herein only reflect the visible engineering part.
The input and output signals of overcurrent protection function diagram are
shown as below:
Directional / Non-directional Overcurrent
Protection 1
BC_OC1
2
BC_OC2
3
BC_OCI01
4
BC_OCI02

Figure 33 Diagram of input and output signals of overcurrent protection function

The left side is the input and the right is the output, parameter description
is shown in the following table.
Table 26 Parameter description

Function Sign Description

Output

BC_OC1 Bus coupler overcurrent stage 1 trip

OUTPUT BC_OC2 Bus coupler overcurrent stage 2 trip

BC_OCI01 Bus coupler zero sequence current stage 1 trip

BC_OCI02 Bus coupler zero sequence current stage 2 trip

3 Detailed description
When the "CT2MainCTOfBC" is set as 1 in common setting and then CBF
protection current is acquired from CT2; when the "CT2MainCTOfBC" is
set as 0, and then CBF protection current is acquired from CT1.
IED is equipped 2 stages of phase overcurrent and 2 stages of earth fault
protection; please refer to the setting list for details.

46
 Chapter 6 Bus coupler overcurrent protection

3.1 Protection principle

3.1.1 Time characteristic
1) Overcurrent trip characteristic is definite time.
I∅ > “BCOCStage1CurrSet”, (∅ = 𝑎𝑎, 𝑏𝑏, 𝑐𝑐)
If phase-to-earth current is greater than "BCOCStage1CurrSet", the timer
starts until "BC OCSatge1Time", then overcurrent trips.
When the phase currentI∅ < Dropout × “BCOCStage1CurrSet”, Dropout is
dropoff coefficient, timing component and overcurrent protection reset.
2) Zero sequence current trip characteristic is definite time.
3I0 > “BC3I0Stage1CurrSet”
If zero sequence current is greater than "BC3I0Stage1CurrSet", the timer
starts until "BC3I0Satge1Time", then zero sequence current trips.
When the current 3I0 < Dropout × “BC3I0Stage1CurrSet”, Dropout is
dropoff coefficient, timing component and earth fault protection resets.
3.1.2 Trip characteristic
1) Bus coupler overcurrent stage 1 is taken as an example.
If "BC OC LS" is 1 and "BCOCStage1LS" is 1, then the overcurrent of
corresponding stage trips.
If the trip conditions are met, time component starts, when time is up, then
output "OCStage1PhATrip" or "OCStage1PhBTrip" or "OCStage1PhCTrip".
When IED trips, each state of phase trip will be displayed.
When the phase current component trips, the trip phase current value will
also be shown at the same time.
2) Bus coupler zero sequence current stage 1 is taken as an example.
If "BC OC LS" is 1 and "BC3I0Stage1CurrSet" is 1, and then the zero
sequence current of corresponding stage trips.
If the trip conditions are met, time component starts, when time is up, and
then output "BC3I0Stage1Trip". When the zero sequence current
component trips, zero sequence current value will also be shown at the
same time.
3.1.3 Logic diagram
1) Phase A current of bus coupler overcurrent stage 1 is taken as an
example.

Ia>“BCOCStage1CurrSet” &
T1 BC OC
“BCOCStage1LS”=1 Phase A trip 1

“BC OC LS”=1

“BU1On”=1

T1：“BC OCStage1Time”

Figure 34 Logic diagram of bus coupler overcurrent

47
Chapter 6 Bus coupler overcurrent protection

2) Bus coupler zero sequence current stage 1 is taken as an example.

&
I0>“BC3I0Stage1CurrSet” T1
BC zero current stage 1 trip
“BC3I0Stage2LS”=1

“BC OC LS”=1

“BU1On”=1

T1：“BC3I0Satge1Time”

Figure 35 Logic diagram of bus coupler zero sequence current

3.2 Setting list

Table 27 OC setting
Default
Number Setting name Range Step Unit Remark
value
1. BCOCStage1CurrSet 0.1In~20In 5.0 0.01 A Note 1:
2. BC OCSatge1Time 0.00~10.00 0.5 0.01 s
3. BCOCStage2CurrSet 0.1In~20In 4.0 0.01 A Note 1:
4. BC OCSatge2Time 0.00~10.00 1.0 0.01 s
5. BC3I0Stage1CurrSet 0.1In~20In 5.0 0.01 A Note 1:
6. BC3I0Satge1Time 0.00~10.00 0.5 0.01 s
7. BC3I0Stage2CurrSet 0.1In~20In 5.0 0.01 A Note 1:
8. BC3I0Satge2Time 0.00~10.00 0.5 0.01 s

Note 1: If "CT2MainCTOfBC" is 0, and then In is "Bay1_CT1SecVal" in the

equipment parameter, otherwise, In is "Bay1_CT2SecVal".
Table 28 Overcurrent protection logic switch
Set Default
Number Logic switch name Remark
mode value
1- bus coupler current and
earth fault protection on;
1. BC OC LS 1/0 0
0-bus coupler current and
earth fault protection off
1-overcurrent stage 1 on,
2. BCOCStage1LS 1/0 0
0-current stage 1 off
1-current stage 2 on,
3. BC OC2LS 1/0 0
0-current stage 2 off
1-Zero sequence current
4. BC3I0Stage1LS 1/0 0 stage 1 on, 0-Zero sequence
current stage 1 off
1-Zero sequence current
5. BC3I0Stage2LS 1/0 0 stage 2 on, 0-Zero sequence
current stage 2 off

48
 Chapter 6 Bus coupler overcurrent protection

Table 29 Logic switch of common setting

Set Default
Number Logic switch name Remark
mode value
1-CT2 is the main
CT of bus coupler;
1. CT2MainCTOfBC 1/0 0
is the main CT of
bus coupler;

3.3 Report list

Table 30 Report list

Number Report name Remark

Trip report:
1. BC OCTripOn /
2. OCStage1PhATrip /
3. OCStage1PhBTrip /
4. OCStage1PhCTrip /
5. OCStage2PhATrip /
6. OCStage2PhBTrip /
7. OCStage2PhCTrip /
8. BC3I0Stage1Trip /
9. BC3I0Stage2Trip /

3.4 Technical data

Table 31 Overcurrent protection technical data
Content Range and value Error
Definite time characteristic
Current 0.1In to 20.00In ≤ ±2.5% setting or ±0.02In
≤ ±1% setting or +40ms,
Time delay 0.00 to 10.00s, step 0.01s
At 2 times of operating current

49
 Chapter 7 Bus coupler failure protection

Chapter 7 Bus coupler failure

protection

About this chapter

This chapter describes the bus coupler CBF protection
function.

51
Chapter 7 Bus coupler failure protection

1 Overview
Bus coupler CBF can detect whether the breaker trips during the fault
isolation process.

2 Function module description

The I/O signals described herein only reflect the visible engineering part.
Bus coupler CBF protection function input and output signal diagram is
shown as below:

Circuit-breaker failure protection

1
BC_CBF1
2
BC_CBF2
3
ExtCBFBITripBus1
4
ExtCBFBITripBus2
5
CBFBIALM

Figure 36 Diagram of input and output signals of bus coupler CBF protection function
The left is the input and the right is the output.
Table 32 Parameter description

Function Sign Description

Output

BC_CBF1 Bus coupler circuit breaker failure retrip

OUTPUT
BC_CBF2 Bus coupler circuit breaker failure trip

CBFBIALM failure binary input alarm

Output
External circuit breaker failure binary input trip
ExtCBF_OUT ExtCBFBITripBus1
busbar 1
External circuit breaker failure binary input trip
ExtCBFBITripBus2
busbar 2

3 Detailed description
When the "CT2MainCTOfBC" is set as 1 in common setting and then bus
coupler failure protection current is acquired from CT2; when the
"CT2MainCTOfBC" is set as 0, and then bus coupler failure protection
current is acquired from CT1.

3.1 Protection principle

Bus coupler CBF protection can be enabled or disabled by setting the logic
switch. Bus coupler CBF protection includes differential initiating bus
coupler CBF, bus coupler overcurrent initiating bus coupler CBF and
external BI initiating bus coupler CBF. Differential initiates bus coupler CBF,
bus coupler overcurrent initiates bus coupler CBF and external BI initiate
bus coupler CBF functions can be enabled or disabled by setting logic
switch. The BI initiating bus coupler CBF cannot be used for 1-phase BI

52
 Chapter 7 Bus coupler failure protection

initiating bus coupler CBF, but only can be used for three-phase BI
initiating bus coupler CBF.
Bus coupler CBF trips the bus coupler breaker in time stage 1 and trips the
two connected busbars in time stage 2.
3.1.1 Current check
Ia >“BCFailCurrSet”
≥1
Ib >“BCFailCurrSet” CBF current criteria phase 3

Ic >“BCFailCurrSet”

Figure 37 Logic diagram of breaker current detection

3.1.2 CBF protection trip logic

1) The internal and external initiating logic is shown as below:
“BCFailLS”=1

Three-phase differential current maximum value

>“DiffCurrThreshold”

Basbur 1 differential trip

&
≥1

Basbur 2 differential trip

“DiffInitBCFailLS”=1

≥1
Internal initiating
BC OC stage 1 protection trip
failure of phase 3

BC OC stage 2 protection trip

≥1
BC Zero sequence current
stage 1 protection Trip

BC Zero sequence current

stage 2 protection Trip
&

“OCInitBCFailLS”=1

“ExtrInitBCFailLS”=1 &
External initiating
Three-phase initiating failure of phase 3
failure binary input of bay 1

T_alarm
“BCInitCBFErr”

&
&

“BCFailLS”=1
≥1
Three-phase startup failure
Internal initiating
failure of phase 3

T_alarm：“BCFailMonitorTime”

Figure 38 Logic diagram of internal and external initiating CBF

53
Chapter 7 Bus coupler failure protection

2) Logic diagram of initiating CBF is shown as below:

CBFCurrCriteria3PhLiveCurr
&
3PhInitCBF
3PhInitCBF

Figure 39 Logic diagram of initiating CBF

3) Logic diagram of CBF stage 1 trip is shown as below:

T1
3PhInitCBF “BCFailRetrip”

T1：“BCFailRetripTime”

Figure 40 Logic diagram of CBF state 1 trip

4) Logic diagram of CBF stage 2 trip is shown as below:

T2 ≥1
3PhInitCBF
CBFStage2Trip

&

CBFailInput

T2：“BCFailTripBusTime”

&
CBFStage2Trip
“BCFailTrip”
>=1
Bay 2 on busbar 1

Bay n on busbar 2

Figure 41 Logic diagram CBF of stage 2 trip

3.1.3 External circuit breaker failure binary input trip busbar

When "ExtrCBF BITripBus" (corresponds with "External_CBF" of digital IO
configuration) is valid, then the circuit breaker of corresponding bay of
busbar will be tripped. The logic diagram is the same as Figure 31, where
n=1.

3.2 Setting list

Table 33 Bus coupler CBF protection setting
Default
Number Setting name Range Step Unit Remark
value
1. BCFailCurrSet 0.1In~20In 1.0 0.01 A Note 1
2. BCFailRetripTime 0.00~10.00 0.15 0.01 s
3. BCFailTripBusTime 0.00~10.00 0.25 0.01 s
4. BCFailMonitorTime 0.00~15.00 10.0 0.01 s
5. BCDZCTDisconnTime 0.0~0.2 0.15 0.01 s Note 2

54
 Chapter 7 Bus coupler failure protection

Note 1: If "CT2MainCTOfBC" is 0, and then In is "Bay1_CT1SecVal" in the

equipment parameter, otherwise, In is "Bay1_CT2SecVal".
Note 2: when "BC DZ LS" is enabled, after the trip of busbar 1, the bus
coupler current will not be calculated in to the other busbar differential after
the time "BC DZ CTDisconnTime" and makes the other busbar differential
trip.
Table 34 Logic switch of bus coupler circuit breaker failure
Set Default
Number Logic switch name Remark
mode value
1-bus coupler CBF protection on;
1. BCFailLS 1/0 0
0-Bus coupler CBF protection off
1-differential initiating bus coupler
2. DiffInitBCFailLS 1/0 0 CBF on, 0-differential initiating bus
coupler CBF off
1-overcurrent initiating bus coupler
3. OCInitBCFailLS 1/0 0 CBF on, 0-overcurrent initiating bus
coupler CBF off
1-overcurrent initiating bus coupler
4. ExtrInitBCFailLS 1/0 0 CBF on, 0-overcurrent initiating bus
coupler CBF off
1-bus coupler dead zone protection
5. BC DZ LS 1/0 0 on; 0-bus coupler dead zone
protection off
1-Enable external binary input
circuit breaker failure trip bus
6. Bay1CBFTripExtrBIOn 1/0 0 0-Disable external binary input
circuit breaker failure trip bus

Table 35 Logic switch of common settings

Set Default
Number Logic switch name Remark
mode value
1-CT2 is the main CT of bus
1. CT2MainCTOfBC 1/0 0 coupler; 0- CT1 is the main CT of
bus coupler;

3.3 Report list

Table 36 Report list

Number Report name Remark

Trip report:
1. BCFailStartup /
2. BCFailRetrip /
3. BCFailTrip /
4. ExtrFBITripBus1
5. ExtrFBITripBus2
Alarm report:
1. BCInitCBFErr /

55
Chapter 7 Bus coupler failure protection

3.4 Technical data

Table 37 Overcurrent protection technical data
Content Range and value Error
Definite time characteristic
Current 0.1In to 20.00In ≤ ±2.5% setting or ±0.02In
≤ ±1% setting or +40ms,
Time delay 0.00 to 10.00s, step 0.01s
At 2 times of operating current

56
 Chapter 8 Bay overcurrent protection

Chapter 8 Bay overcurrent

protection

About this chapter

This chapter describes bay overcurrent protection function.

57
Chapter 8 Bay overcurrent protection

1 Overview
Bay current and time can be set independently in bay overcurrent
protection, altogether 38 bays.
Each bay has 1 stage of definite time overcurrent.

2 Function module description

The I/O signals described herein only reflect the visible engineering part.
The input and output signals of overcurrent protection function diagram are
shown as below:
Directional / Non-directional Zero Overcurrent Protection
1
OCACT

Figure 42 Diagram of input and output signals of overcurrent protection function

The left is the input and the right is the output.
Table 38 Parameter description

Function Input Description

Output
OUTPUT
OCACT Overcurrent protection trips

3 Detailed description
Expect bay unit 1 and 2, the other bay units are equipped with bay
overcurrent protection, please see the setting list.
For the selection of current input in bay unit 2 (bay 2); when the
"CT2MainCTOfBC" is set as 1, then overcurrent protection current is
acquired from CT2; when the "CT2MainCTOfBC" is set as 0,and then
overcurrent protection current is acquired from CT1.

3.1 Protection principle

3.1.1 Definite time characteristic
Overcurrent trip characteristic is definite time.
I∅ > “BaynOCCurrSet”, (∅ = 𝑎𝑎, 𝑏𝑏, 𝑐𝑐)
If phase-to-earth current is greater than "BaynOCCurrSet", the timer starts
until "BaynOCTime", then overcurrent trips.
When the phase-to-earth currentI∅ < Dropout × “BaynOCCurrSet”, Dropout
is dropoff coefficient, timing component and overcurrent protection reset.
3.1.2 Trip characteristic
If "BaynOC LS" is 1, then overcurrent protection is enabled.
If the trip conditions are met, time component starts; when time is up, and
then output "BaynOCTrip-PhA" or "BaynOCTrip-PhB" or

58
 Chapter 8 Bay overcurrent protection

"BaynOCTrip-PhC". Trip state of each phase will be shown when IED trips.
When the phase current component trips, the trip phase current value will
also be shown.
3.1.3 Logic diagram
Phase A current is taken as an example.

&
Ia>“BaynOCCurrSet” T1
BaynOCTrip-PhA
“BaynOC LS”=1

“BUnOn”=1

T1：“BaynOCTime”

Figure 43 Logic diagram of bus coupler overcurrent

3.2 Setting list

Only take one bay overcurrent protection setting as an example, the other
bays have the same settings.
Table 39 Overcurrent protection setting (n=2~40)
Default Step
Number Setting name Range Unit Remark
value
1. BaynOCCurrSet 0.1In~20In 1.0 0.01 A
2. BaynOCTime 0.02~10.00 2.0 0.01 s

Note 1: In in the setting is "BaynCTSecVal" in the equipment parameter. If

"CT2MainCTOfBypassBus" is set as 0, In is "Bay2_CT1SecVal" in the
equipment parameter, otherwise, In is "Bay2_CT2SecVal" in the
equipment parameter.
Table 40 Overcurrent protection logic switch (n=2~40)

Number Logic switch name Set mode Default value Remark

1-overcurrent
protection on;
1. BaynOC LS 1/0 0
0-overcurrent
protection off
Table 41 Logic switch of common settings

Number Logic switch name Set mode Default value Remark

1-CT2 is main
CT of bypass
1. CT2MainCTOfBypassBus 1/0 0 bus; 0-CT1 is
main CT of
bypass bus;

3.3 Report list

Only take single bay overcurrent protection reports as an example, the
other bay have the same reports.

59
Chapter 8 Bay overcurrent protection

Table 42 Report list (n=2~N, distributed N = 40, centralized N=28))

Number Report name Remark

Trip report:
1. BaynOCStartup /
2. BaynOCTrip-PhA /
3. BaynOCTrip-PhB /
4. BaynOCTrip-PhC /
Alarm report:
The overcurrent and dead zone protections
1. OCOrDZSetErr cannot be enabled at the same time; otherwise,
alarm will be issued.

3.4 Technical data

Table 43 Overcurrent protection technical data
Content Range and value Error
Definite time characteristic
Current 0.1In ~ 20.00In ≤ ±2.5% times of setting or ±0.02In
≤ ±1% setting or +40ms,
Time delay 0.02~ 10.00s, step 0.01s
At 2 times of operating current

60
 Chapter 9 Bay dead zone protection

Chapter 9 Bay dead zone protection

About this chapter

The chapter describes dead zone protection function.

61
Chapter 9 Bay dead zone protection

1 Overview
IED provides dead zone protection to detect dead zone fault, i.e. when
breaker is in open position, a fault occurs between CT and breaker. So,
when breaker auxiliary contact shows that the breaker is in open position,
IED can detect fault current of dead zone.
For busbar side CT, when dead zone fault occurs, IED trips all breakers.
For CT at line side, when dead zone fault occurs, IED sends remote trip
command to the IED on the opposite side to isolate fault. Trip logic is
shown as below:

Internal
trip Busbar

IFAULT

Line 1 Line 2 Line N

Trip
Device

Legend:

CBOpenPosn

CBClosePosn

Figure 44 Logic diagram of line side trip

2 Function module description

The I/O signals described herein only reflect the visible engineering part.
The input and output signals of dead zone protection function diagram are
shown as below:
DeadZone Protection
1
DZACT
2
DZBIALM

Figure 45 Diagram of input and output signals of dead zone protection function
The left is the input and the right is the output.
Table 44 Parameter description

Function Input Description

Output

OUTPUT DZACT Dead zone protection trip

DZBIALM Binary input alarm of dead zone

62
 Chapter 9 Bay dead zone protection

3 Detailed description
Expect bay unit 1 and 2, the other bay units are equipped with bay dead
zone protection, please see the setting list.
For the selection of current input in bay unit 2 (bay 2) , when the "
CT2MainCTOfBC" is set as 1, and then dead zone protection current is
acquired from CT2; when the " CT2MainCTOfBC" is set as 0, and then
dead zone protection current is acquired from CT1.

3.1 Protection principle

3.1.1 Trip characteristic
If "BaynDZProtLS"=1, and then dead zone protection is enabled.
The trip conditions are shown as below:
1) Differential protection trip initiates dead zone protection, or external BI
("Bay3 3PhInitCBF BI") initiates dead zone protection and no error
alarm of external BI;
2) The circuit breaker in in open position;
3) Fundamental wave currentI∅ > “BaynDZCurrSet”, (∅ = 𝑎𝑎, 𝑏𝑏, 𝑐𝑐);
4) The logic switch "BaynDZ3I0/I2DetectLS" is 1, zero sequence current
or negative sequence current should be greater than corresponding
settings.
If the trip conditions are met, time component starts; when time is over,
"BaynDZTrip" is issued. At the same time, the three-phase fundamental
current Ia, Ib, Ic, zero and negative sequence current of trip time are output.
When the condition is not satisfied, timing component resets, dead zone
protection resets.
If external initiates dead zone binary input is greater than "BaynDZ
BIMonitorTime", and then "BaynDZ BIAlarm" will be issued.

63
Chapter 9 Bay dead zone protection

3.1.2 Logic diagram

“BaynDZ3I0/I2DetectLS”=0
&

Ia>“BaynDZCurrSet”

Ib>“BaynDZCurrSet”

& ≥1
Ic>“BaynDZCurrSet” ≥1 &

3I0>“BaynDZ3I0Set”

3I2>“BaynDZI2Set”

“BaynDZ3I0/I2DetectLS”=1

“BaynDZ3I0/I2DetectLS”=0
&
Ib>“BaynDZCurrSet”

Ic>“BaynDZCurrSet”

& & ≥1 ≥1
Ia>“BaynDZCurrSet” Current condition of
≥1
dead zone is met

3I0>“BaynDZ3I0Set”

3I2>“BaynDZI2Set”

“BaynDZ3I0/I2DetectLS”=1

“BaynDZ3I0/I2DetectLS”=0
&

Ic>“BaynDZCurrSet”

Ib>“BaynDZCurrSet”

& ≥1
Ia>“BaynDZCurrSet” ≥1 &

3I0>“BaynDZ3I0Set”

3I2>“BaynDZI2Set”

“BaynDZ3I0/I2DetectLS”=1

&
Bay on busbar 1

DiffProtTrip of buabar1 ≥1
TripInitDZ
&
Bay on busbar 2

DiffProtTrip of buabar2

“BUnOn”=1

Current condition of
dead zone is met
&
&
“BaynCBOpenPosn” T
“BaynDZTrip”

TripInitDZ
≥1

&
T_BIErr
“Bayn_3PhCInitCBF BI”

“BaynDZ BIAlarm”

“BaynDZProtLS”=1

T：“BaynDZTripTime”
T_BIErr：“BaynDZ BIMonitorTime”

Figure 46 Logic diagram of dead zone

64
 Chapter 9 Bay dead zone protection

3.2 Setting list

Only take one bay dead protection setting as an example, the other bays
have the same settings.
Table 45 Dead zone protection setting (n=2~40)
Default
Number Setting name Range Step Unit Remark
value
1. BaynDZCurrSet 0.1In~20In 1.0 0.01 A
2. BaynDZTripTime 0.02~10 2.0 0.01 s
3. BaynDZ3I0Set 0.1In~20In 1.0 0.01 A
4. BaynDZI2Set 0.1In~20In 1.0 0.01 A
5. BaynDZ BIMonitorTime 0.00~15 10 0.01 s

Note 1: In in the setting is "BaynCTSecVal" in the equipment parameter. If

"CT2MainCTOfBypassBus" is set as 0, In is "Bay2_CT1SecVal" in the
equipment parameter, otherwise, In is "Bay2_CT2SecVal" in the
equipment parameter.
Table 46 Dead zone logic switch (n=2~40)
Default
Number Logic switch name Set mode Remark
value
1-dead zone protection on;
1. BaynDZProtLS 1/0 0
0-dead zone protection off
1- dead zone checking zero
sequence or negative sequence
2. BaynDZ3I0/I2DetectLS 1/0 0 currents on; 0-dead zone
checking zero sequence or
negative sequence currents off;
Table 47 Logic switch of common setting
Set Default
Number Logic switch name Remark
mode value
1-CT2 is main CT of
1. CT2MainCTOfBypassBus 1/0 0 bypass bus; 0-CT1 is
main CT of bypass bus;

3.3 Report list

Only take single bay dead zone protection reports as an example, the
other bay have the same reports

65
Chapter 9 Bay dead zone protection

Table 48 Report list (n=2~N, distributed N = 40, centralized N=28)

Number Report name Remark

Trip report:
1. BaynDZProtStartup /
2. BaynDZTrip /
Alarm report:
1. BaynDZ BIAlarm
The overcurrent and dead zone protections
2. OCOrDZSetErr cannot be enabled at the same time, otherwise,
alarm will be issued.

3.4 Technical data

Table 49 Dead zone protection technical data
Items Setting range Trip Value Error
Current setting 0.1In to 20.00In ≤ ±2.5% times of setting or 0.02In
≤ ± 1% times of setting or +40ms,
Time setting 0.02s to 10.00s, step 0.01s when trip current is set as 200%
setting
DropoffCoef About 0.95

66
 Chapter 10 Secondary circuit monitoring

Chapter 10 Secondary circuit

monitoring

About this chapter

This chapter describes CT failure and VT failure secondary
circuit monitoring function.

67
Chapter 10 Secondary circuit monitoring

1 CT failure
1.1 Overview
CT failure can cause misoperation of differential protection. The
characteristics of CT failure are shown as below:
1) One stage for alarm only;
2) One stage for blocking only;
3) Each stage has independent logic switch.

1.2 Function module description

The I/O signals described herein only reflect the visible engineering part.
CT failure check function input and output signal diagram is shown as
below:
CT-Secondary Current Supervision
1
CTFail
2
LongCurr

Figure 47 Diagram of input and output signals of CT failure check function

The right side is output.
Table 50 Parameter description

Function Input Description

Output

OUTPUT CTFAIL CT failure

LongCurr Long-term differential current

1.3 Detailed description

1.3.1 Protection principle
1.3.1.1 Line CT failure
Line CT failure logic is shown as Figure 48. In is the second value of CT
failure bay, it is set in refference parameter. The IED takes use of this
feature to detect CT circuit. Line CT failure has two stages, alarm stage
and blocking stage.
Failures from Bay 3 (bay 3 is included) are considered as line CT failure,
block split phase blocking when line CT failure occurs.
1.3.1.2 Bus coupler CT failure
Bus coupler CT failure logic is shown as Figure 49. In is the second value
of bus coupler CT1 or bus coupler CT2, it is set in reference parameter.
The IED takes use of this feature to detect CT circuit. Bus coupler CT
failure detection has two stages, alarm stage and blocking stage.
Bus coupler CT failure includes failure detection of bus coupler (bay1) and
bypass bus (bay 2), CBF split phase blocking.

68
 Chapter 10 Secondary circuit monitoring

1.3.1.3 Long-term differential current logic

Long-term differential current logic is shown as Figure 50.
1.3.1.4 Logic diagram
1) Logic diagram of asymmetric failure takes phase A failure as an
example.

&
“BayCTFailAlarmChk3I2Set”=1

3I2>BayCTFailAlarm3I2Set ≥1

&
“BayCTFailAlarmChk3I2Set”=0

3I2>3I1× BayCTFailAlarmI1/I2Coef
&
Selection of bays for CT
Compound zero failure alarm
sequence current>0.1In

&
“BayCTFailAlarmLS”=1

“DiffLS”=1
&
Selection of bays for CT
failure alarm

≥1
ChkZonePhADiffCurr>BayCTFailAlarmCurrSet & T1
“CTFailAlarm-PhA”

Bus1PhADiffCurr>BayCTFailAlarmCurrSet

&
&

Bus2PhADiffCurr>BayCTFailAlarmCurrSet

&
“BayCTFailBlkChk3I2Set”=1

≥1
3I2>BayCTFailBlk3I2Set

&
“BayCTFailBlkChk3I2Set”=0

3I2>3I1× BayCTFailBlkI1/I2Coef
&
Selection of bays for CT
Compound zero failure block
sequence current>0.1In

“BayCTFailBlkLS”=1
&
“DiffLS”=1

Selection of bays for CT &

failure block T2
“CTFailBlkBus1-PhA”

ChkZonePhADiffCurr>BayCTFailBlkCurrSet &

Bus1PhADiffCurr>BayCTFailBlkCurrSet

&
& T2
“CTFailBlkBus2-PhA”

Bus2PhADiffCurr>BayCTFailBlkCurrSet

T1：BayCTFailAlarmTime
T2：BayCTFailBlkTime
In：“Bayn CTSecVal” in the equipment parameter

Figure 48 Line CT failure detection

69
Chapter 10 Secondary circuit monitoring

&
“BC CTFailAlarmChk3I2”=1

≥1
3I2>BC CTFailAlarm3I2Set

&
“BC CTFailAlarmChk3I2”=0

3I2>3I1× BC CTFailAlarmI1/I2Coef
&
Selection of bays for bus
Compound zero coupler CT failure alarm
sequence current>0.1In

&
“DiffLS”=1

“BC CTFailAlarmLS”=1

Selection of bays for bus

coupler CT failure alarm
&
T1
Bus1DiffCurr<“BC CTFailAlarmCurrSet” “BC1PhA CTFailAlarm”

Bus1PhADiffCurr>“BC CTFailAlarmCurrSet”
&
T1
“BC2PhA CTFailAlarm”
Bus2PhADiffCurr>“BC CTFailAlarmCurrSet”

&
“BC CTFailBlkChk3I2Set”=1

≥1
3I2>BC CTFailBlk3I2Set

&
“BC CTFailBlkChk3I2Set”=0

3I2>3I1× BC CTFailBlkI1/I2Coef
&
Selection of bays for bus
Compound zero coupler CT failure block
sequence current>0.1In

&
“DiffLS”=1

“BC CTFailBlkLS”=1

Selection of bays for bus

coupler CT failure block
&
T2
Bus1DiffCurr<“BC CTFailBlkCurrSet” “BC1CTFailBlk-PhA”

Bus1PhADiffCurr>“BC CTFailBlkCurrSet”
&
T2
“BC2CTFailBlk-PhA”
Bus2PhADiffCurr>“BC CTFailBlkCurrSet”

T1：BC CTFailAlarmTime
T2：BC CTFailBlkTime
In：“Bay1 CT1SecVal”, “Bay1 CT2SecVal”, “Bay2 CT1SecVal”, “Bay2 CT2SecVal”in the equipment parameter.

Figure 49 Bus coupler CT failure detection

70
 Chapter 10 Secondary circuit monitoring

2) Logic diagram of three-phase failure

ChkZonePhADiffCurr>LongTermDiffCurrSet
&
ChkZonePhBDiffCurr>LongTermDiffCurrSet

ChkZonePhCDiffCurr>LongTermDiffCurrSet

Bus1PhADiffCurr>LongTermDiffCurrSet
&
Bus1PhBDiffCurr>LongTermDiffCurrSet

Bus1PhCDiffCurr>LongTermDiffCurrSet
>=1
T1
Bus2PhADiffCurr>LongTermDiffCurrSet LongTermDiffCurr
&
Bus2PhBDiffCurr>LongTermDiffCurrSet

Bus2PhCDiffCurr>LongTermDiffCurrSet

Bus3PhADiffCurr>LongTermDiffCurrSet
&
Bus3PhBDiffCurr>LongTermDiffCurrSet

Bus3PhCDiffCurr>LongTermDiffCurrSet

T1：LongTermDiffCurrSet

Figure 50 Long-term differential current detection

1.3.2 Setting list

Table 51 CT failure check setting
Defaul
Number Setting name Range Step Unit Remark
t value
1. BC CTFailAlarmCurrSet 0.1In~20In 1 0.01 A
Note 1
2. BC CTFailBlkCurrSet 0.1In~20In 1 0.01 A

3. BC CTFailAlarm3I2Set 0.1In~20In 1 0.01 A Note 2

4. BC CTFailAlarmI1/I2Coef 0.2~1 1 0.01

5. BC CTFailBlk3I2Set 0.1In~20In 1 0.01 A Note 2

6. BC CTFailBlkI1/I2Coef 0.2~1 1 0.01

7. BayCTFailAlarmCurrSet 0.1In~20In 1 0.01 A

Note 1
8. BayCTFailBlkCurrSet 0.1In~20In 1 0.01 A

9. BayCTFailAlarm3I2Set 0.1In~20In 1 0.01 A Note 2

10. BayCTFailAlarmI1/I2Coef 0.2~1 1 0.01

11. BayCTFailBlk3I2Set 0.1In~20In 1 0.01 A Note 2

12. BayCTFailBlkI1/I2Coef 0.2~1 1 0.01

13. BC CTFailAlarmTime 0.1~15 10.0 0.01 s

14. BC CTFailBlkTime 0.1~15 10.0 0.01 s

15. BayCTFailAlarmTime 0.1~15 10.0 0.01 s

71
Chapter 10 Secondary circuit monitoring

Defaul
Number Setting name Range Step Unit Remark
t value
16. BayCTFailBlkTime 0.1~15 10.0 0.01 s

17. LongTermDiffCurrSet 0.1In~20In 1 0.01 A Note 1

18. LongTermDiffCurrTime 0.1~15 10.0 0.01 s

Note 1: In in the setting is "CTReferenceSecVal" in the equipment

parameter.
Note 2: In in the setting is "BaynCTSecVal" in the equipment parameter. If
"CT2MainCTOfBypassBus" is set as 0, In is "Bay2_CT1SecVal" in the
equipment parameter, otherwise, In is "Bay2_CT2SecVal" in the
equipment parameter.
Table 52 CT failure check logic switch
Set Default
Number Logic switch name Remark
mode value
1-bus coupler CT
failure alarm on;
1. BC CTFailAlarmLS 1/0 0
0-bus coupler CT
failure alarm off;
1- test the negative
sequence current;
2. BC CTFailAlarmChk3I2 1/0 0
0-test ratio of positive
and negative current;
1- bus coupler CT
failure blocking
function on;
3. BC CTFailBlkLS 1/0 0 0-bus coupler CT
failure blocking
function off;
1- test the negative
sequence current;
4. BC CTFailBlkChk3I2Set 1/0 0
0-test ratio of positive
and negative current;
1-bay CT failure alarm
on;
5. BayCTFailAlarmLS 1/0 0
0-bay CT failure alarm
off;
1- test the negative
sequence current;
6. BayCTFailAlarmChk3I2SetLS 1/0 0
0-test ratio of positive
and negative current;
1-enable bay CT
failure blocking
function;
7. BayCTFailBlkLS 1/0 0
0-disable bay CT
failure blocking
function;
1- test the negative
sequence current;
8. BayCTFailBlkChk3I2Set 1/0 0
0-test ratio of positive
and negative current;

72
 Chapter 10 Secondary circuit monitoring

1.3.3 Report list

Table 53 Report list

Number Report name Remark

Alarm report:
1. CTFailBlkBus1-PhA
2. CTFailBlkBus1-PhB
3. CTFailBlkBus1-PhC
4. CTFailBlkBus2-PhA
5. CTFailBlkBus2-PhB
6. CTFailBlkBus2-PhC
7. CTFailBlkBus3-PhA
8. CTFailBlkBus3-PhB
9. CTFailBlkBus3-PhC
10. CTFailAlarm-PhA
11. CTFailAlarm-PhB
12. CTFailAlarm-PhC
13. BC1PhA CTFailAlarm Bus coupler CT1 failure or bypass bus CT1 failure
14. BC2PhA CTFailAlarm Bus coupler CT2 failure or bypass bus CT1 failure
15. BC3PhA CTFailAlarm Bypass bus CT2 failure
16. BC1PhB CTFailAlarm Ditto
17. BC2PhB CTFailAlarm Ditto
18. BC3PhB CTFailAlarm Ditto
19. BC1PhC CTFailAlarm Ditto
20. BC2PhC CTFailAlarm Ditto
21. BC3PhC CTFailAlarm Ditto
22. BC1CTFailBlk-PhA Ditto
23. BC2CTFailBlk-PhA Ditto
24. BC3CTFailBlk-PhA Ditto
25. BC1CTFailBlk-PhB Ditto
26. BC2CTFailBlk-PhB Ditto
27. BC3CTFailBlk-PhB Ditto
28. BC1CTFailBlk-PhC Ditto
29. BC2CTFailBlk-PhC Ditto
30. BC3CTFailBlk-PhC Ditto
31. LongTermDiffCurr

2 VT failure
2.1 Overview
When the secondary circuit of the voltage transformer is broken or short
circuit, the measured voltage is zero by the protections based on the

73
Chapter 10 Secondary circuit monitoring

undervoltage criterion and this can cause the mis-operation of IED. VT

failure check provides voltage monitoring for such protections. VT
monitoring is used to monitor the voltage transformer circuit, single-phase
VT failure, two-phase VT failure and three-phase VT failure.

2.2 Function module description

The I/O signals described herein only reflect the visible engineering part.
VT failure check function input and output signal diagram is shown as
below:
Symmetrical and asymmetrical VT Fuse Fail
Detection

1
PT1FAIL

2
PT2FAIL

3
PT3FAIL

Figure 51 Logic diagram of input and output signals of VT failure check function
The left is the input and the right is the output.
Table 54 Parameter description

Function Input Description

Output

VT1FAIL Busbar 1 VT failure

OUTPUT
VT2FAIL Busbar 2 VT failure

VT3FAIL Busbar 3 VT failure

2.3 Detailed description

2.3.1 Protection principle
Take busbar 1 VT failure as an example.
VT failure function can be enabled when the logic switch
"Bus1VTFailAlarmOn" is set as 1 and "BU0On" is 1(centralized default
enabling), it can be used to detect single-phase, two-phase and
three-phase VT failure.
There are three main criteria for detecting VT failure, which are the check
of the three phase failure, the check of the asymmetric failure of the
grounding system, and the check of the asymmetry of the non-direct
grounding system. The prerequisite is that the protection device starting
component does not start. Specifically as follows:
2.3.1.1 Three-phase (symmetric) VT failure
When the secondary side three phase of VT failure occurs, if the startup
component does not start, then the maximum of compounded zero
sequence voltage 3U0 and three-phase phase-to-earth voltage are both
less than "Bus1VTFailPEVolt" and busbar current is greater than threshold
(bay current of busbar is greater than 0.08In).
2.3.1.2 Single-phase/ two-phase (asymmetric) VT failure
a) When the secondary side single phase or two phases of VT failure
occurs, if the system is grounded directly and protection does not start,

74
 Chapter 10 Secondary circuit monitoring

then the compounded zero sequence voltage 3U0 exceeds

"Bus1VTFailPEVolt".
b) When the secondary side single-phase or two-phase of VT failure
occurs, if the system is not directly grounded and the stating
component does not start, then then compounded zero sequence
voltage 3U0 exceeds "Bus1VTFailPEVolt" and the difference between
the maximum and minimum of voltage exceeds "Bus1VTFailPEVolt".
2.3.1.3 Logic diagram
Take busbar 1 VT failure as an example.
If the secondary circuit failure of VT is detected, the protection will send off
the report "Bus1VTFail" through the delay of "Bus1VTFailAlarmTime".
Bus1BusHasLiveCurr
&
max(Ua,Ub,Uc)<“Bus1VTFailPEVolt”

Calc3U0<“Bus1VTFailPEVolt”

& ≥1
Calc3U0>=“Bus1VTFailPEVolt”

“Bus1VTNutrEarth”=1

“Bus1VTNutrEarth”=0 &

PPVolt(Max- Min)>“Bus1VTFailPPVoltSet”

&
&
IEDStartup InstantVTFail=1

“BU0On”

“Bus1VTFailAlarmOn”=1

&
“Bus1VTFailAlarmOn”=0 &
≥1
InstantVTFail=0

min(Ua,Ub,Uc)>“Bus1VTFailNormalVolt”

“Bus1VTFail”=1

&
&
T

T
“Bus1VTFail”=1

T：“Bus1VTFailAlarmTime”

Figure 52 Logic diagram of VT failure protection

2.3.2 Setting list

Table 55 VT failure check setting
Default
Number Setting name Range Step Unit Remark
value
1. Bus1VTFailPEVolt 5.00~20.00 8.00 0.01 V

2. Bus2VTFailPEVolt 5.00~20.00 8.00 0.01 V

3. Bus3VTFailPEVolt 5.00~20.00 8.00 0.01 V

75
Chapter 10 Secondary circuit monitoring

Default
Number Setting name Range Step Unit Remark
value
4. Bus1VTFailPPVoltSet 10.00~30.00 10.00 0.01 V

5. Bus2VTFailPPVoltSet 10.00~30.00 10.00 0.01 V

6. Bus3VTFailPPVoltSet 10.00~30.00 10.00 0.01 V

7. Bus1VTFailNormalVolt 40.00~120.00 40.00 0.01 V

8. Bus2VTFailNormalVolt 40.00~120.00 40.00 0.01 V

9. Bus3VTFailNormalVolt 40.00~120.00 40.00 0.01 V

10. Bus1VTFailAlarmTime 0.1~100.0 10.00 0.01 s

11. Bus2VTFailAlarmTime 0.1~100.0 10.00 0.01 s

12. Bus3VTFailAlarmTime 0.1~100.0 10.00 0.01 s

Table 56 VT failure check logic switch

Set Default
Number Logic switch name Remark
mode value
1-Busbar 1 VT failure alarm is
1. Bus1VTFailAlarmOn 1/0 0 on; 0-Busbar I VT failure
alarm is off;
1-Busbar 2 VT failure alarm
2. Bus2VTFailAlarmOn 1/0 0 on; 0-Busbar 2 VT failure
alarm off;
1-Busbar 3 VT failure alarm
3. Bus3VTFailAlarmOn 1/0 0 on; 0-Busbar 3 VT failure
alarm off;
1-Busbar 1 VT neutral point is
4. Bus1VTNutrEarth 1/0 0 grounded; 0-Busbar 1 VT
neutral point is not grounded;
1-Busbar 2 VT neutral point is
5. Bus2VTNutrEarth 1/0 0 grounded; 0-Busbar 2VT
neutral point is not grounded;
1-Busbar 3 VT neutral point is
6. Bus3VTNutrEarth 1/0 0 grounded; 0-Busbar 3 VT
neutral point is not grounded;

2.3.3 Report list

Table 57 Report list

Number Report name Remark

Alarm report:
1. Bus1VTFail /
2. Bus2VTFail /
3. Bus3VTFail /

76
 Chapter 10 Secondary circuit monitoring

2.3.4 Technical data

Table 58 VT failure check technical data
Content Range and value Error
VT failure phase-to-earth voltage 5.0V～20.0V, step 0.01V ≤ ±3% setting or ±1V
VT failure phase-to-phase voltage 10.0V～30.0V, step 0.01V ≤ ±3% setting or ±1V
return to VT normal voltage 40.0V～120.0V, step 0.01V ≤ ±3% setting or ±1V

77
 Chapter 11 User-defined function

Chapter 11 User-defined function

About this chapter

This chapter describes BI, BO, LED configuration and user
defined logic functions.

79
Chapter 11 User-defined function

1 Overview
The binary input and output, report, LED of device can be defined
secondly in accordance with demands. According to the actual situation of
the project, the user can define the logic. This chapter mainly describes
the function of the AESPStudio tool software which may be used in
engineering application to perform the user defined function and the
matters needing attention.

2 User-defined configuration
2.1 Open project
Click the file→open, in the open file dialog box, open the file named
aespro.

2.2 Binary input configuration

The title of BI can be modified by engineering example. The property of
each BI can be set in BI configuration according to demand.
Table 59 Binary input configuration

Binary input configuration

Configuration item Description

Excitation changes from 0 to 1, and close position of binary input

Binary input time 1
is defined by time 1
Excitation changes from 1 to 0, and open position of binary input
Binary input time 2
is defined by time 2

Configure "WaveRecor", "RisingEdgeTrigger",

Waveform record set
"FallingEdgeTrigger"

Configuration "SirenBit", "BellBit", "PulseQuantity", "SendSOE",

Property 1
"DualPosnBI", "ACInput" and "BCUProtocol"

Configure "NonSmartModule", "24V", "48V", "110V", "125V",

Property 2
"220V", "250V"
Property 3 Configure "OrdinaryBI", "MaintState", "Rmt/Local", "Invalid"

Bay control unit and

Configure "Prot", "BCU"
protection property

Note: when setting waveform record, if "DFR" is configured, and then the
BI will be in the waveform recording;if "RisingEdgeTrigger" is configured,
when the BI changes from 0 into 1, the waveform record will be generated;
if "FallingEdgeTrigger" is configured, when the BI changes from 1 into 0,
the waveform record will be generated. The generated waveform record
file will be saved into the list of startup waveform records.
The work voltage can only be configured within ranges defined by this
module unit. Hardware board contains high power voltage level and low
power voltage level, respectively marked with the work voltage of DC
"110V", "125V", "220V", "250V" and "24V" as well as "48V".
The time sequence explanation of "BITime1" and "BITime2" is shown as

80
 Chapter 11 User-defined function

below.
The time of initiating circuit breaker failure BI, switch failure and external
circuit breaker failure BI is set as 5ms, and that of the others is set as 10ms
and above.

Excitation

BITime1

BI

BITime2

Figure 53 Binary input time delay sequence

Configuration way of double position binary input:
Two single-position binary inputs can be used to describe the
double-position binary input, and the close position of single input
accesses to the n hardware binary input, and then the open position of
single input accesses to the n+1 hardware binary input. "DualPosnBI" can
be selected for the property1 of binary input n; but it cannot be selectedfor
the property 1 of binary input n+1; and "Invalid"can be selected for the
property 3.
The logic state of a pair of binary inputs (binary input n and n+1)
configured with double-0position will no longer be that of the hardware
binary input. Only when (hardware binary input n, n+1) = (1, 0), the logic
binary input n refers to the close position state; only when (hardware
binary input n, n+1) = (0, 0) or (1, 1), the property of double-position of
binary input is 1, which means the invalid state.
Both the BI state and BI state in digital IO congiguration of double-position
hardware BI and logic BI are shown below
Table 60 State list for hardware binary input of double position and logic binary input
Binary input of hardware (binary
0, 0 0, 1 1, 0 1, 1
input n and n+1)
Logic binary input (binary input n
0, 1 0, 0 1, 0 0, 1
and n+1)
Note: the circuit breaker position and isolator position cannot be
configured with double-position of binary input.

2.3 Binary output configuration

The title of BI can be modified by engineering example. The property of
each BI can be set in BI configuration according to demand.

81
Chapter 11 User-defined function

Table 61 Binary output configuration

Binary output configuration

Configuration item Description

Holding time Excitation returns and BO also returns experiencing retention time.

Configure "WaveRecord", "RisingEdgeTrigger",

Waveform record set
"FallingEdgeTrigger"

Configure "ElectricLatched", "TripRedundancy",

Binary output property
"ReclaimRedundancy", "BlkedByStartup", "NCContact"

1) To configure "ElectricLatched" property, the electric relay will return

only after the signals reset. The movement sequence is shown as
follow. When the device is deenergized and then reenergized, the
electric relay can recover the state before power down.

Excitation

Rst

Relay

Figure 54 Electric latched relay trip sequence

Configuration is the node of electric retention, which can't
"BlkedByStartup" ; otherwise startup relay will return and so does BI.
Non "ElectricLatched" binary output can configure "LatchedTime",
excitation will return, after the set time, the relay returns.

Excitation

Relay

Figure 55 Non-electric latched relay trip sequence

Please configure in line with the hardware jumper of BO, and determine
whether BO is "BlkedByStartup" or not, and whether "NCContact" or not.
2) As CPU and other redundant CPU will send off command; the
configuration as "BORedundancy" of node relay trips; as CPU and
other redundant CPU retreat all the command, the configuration as
"ReclaimRedundancy" of node relay will trip. If the protection
configuration does not configure redundancy, "ReclaimRedundancy"
and "BORedundancy" can't be set.
This device is equipped with redundant CPU, therefore, for the BO
used for tripping, it must be configured with "TripRedundancy", and it
is suggested not be configured with "ReclaimRedundancy" according
to the principle "BO contacts are driven by both of the two CPU and
command is withdrew by one of the CPUs". For the BO used for alarm,

82
 Chapter 11 User-defined function

it is suggested not be configured with "TripRedundancy" but with

"RedundancyRecovery" according to the principle "BO contacts are
driven by one of the two CPUs and commands are withdrew by both of
the two CPUs".
It should be noted that the redundant property of “BOCfg” and
“LEDCfg” should be consistent.
3) It is suggested that the BO used for tripping on tripping module should
be set as “BlkedByStartup”, and the BO used for sending trip or alarm
signal on tripping module needn't to be set as "BlkedByStartup". The
configuration of hardware jumper and the BO should be consistent.
See figure, one of configuration properties of BO "BlkedByStartup"
must be linked with the contact of hardware; if one "BlkedByStartup"
jumper is shared by three output modules, every three BOs shall form
a group to be configured similarly. Which means BO1, BO2 and BO3
shall form a group; BO4, BO5 and BO6 form a group and so on.
4) Please set the property of "NCContact" according to the needs of
project. The configuration of hardware jumper and the BO should be
consistent.

Figure 56 Diagram of binary output configuration

2.4 LED configuration

The title of LED can be modified by engineering example. On control plate,
the calibrated LED indicator tag can be embedded into the corresponding
position of the indicator light. The property of each LED can be set in LED
configuration according to demand.
Table 62 Light configuration.

Light configuration.

Configuration item Description

Configuration "Latched", "NonLatched", and configuration is

Holding property
"Latched", recovery action should be enacted to eliminate light state.

Light color The color of LED is "Yellow", "Green" and "Red"

The LED is flashing or constant on, n represents the flash frequency

Flashing
is n*50ms; when it is 0 or 1, the LED is always on.

As the configuration is "Redundancy" property, multiple CPU will

Redundancy
trigger light at the same time and the LED will be enlightened

83
Chapter 11 User-defined function

As CPU and other redundant CPU all send out lighting commands, the
LED configured with "Redundancy" can be enlightened. If LED doesn't
have redundancy property, "Redundancy" property cannot be set.

2.5 IO Matrix configuration

The IO Matrix configuration achieves a fast correlation between virtual and
real points in the software. Virtual point comes from the application
software, corresponding to the functional software to modify the data
points, the real point from the limited resources provided by the device.
2.5.1 AC IO configuration
AC IO configuration is used to specify the source of the required input
information for the application, the AC or DC excitation of the device is
configured as AC sampling or SV data.
“X” means the valid selection.

Figure 57 Diagram of channel configuration

2.5.2 Digital IO configuration

The digital IO configuration is used to specify the protection action of the
device. External input signal is dependent on each function of the device
and external manifestations of action consist of the opening and the lights,
etc., through the configuration to achieve the definition.
“H” refers to the valid high power level; “L” is valid low power level.

84
 Chapter 11 User-defined function

Figure 58 Diagram of function configuration

2.6 Binary input switch setting group

2.6.1 Function description
IED can switch the setting zone in two ways. When the setting
"BISwitchSettingGroup" is set as 0, IED will response to the panel or
SCADA to switch the setting group; when the setting
"BISwitchSettingGroup" is set as 1, IED will not response to the panel or
SCADA to switch the setting group, it will switch the setting group
automatically according to the status of binary input.
The device provides three default configurable binary inputs to switch
setting group, and in BIToSetGrp, BI1, BI2, BI3, BI4 can be set by users in
the engineering research and development version.
Table 63 Switch setting group configuration examples for three binary inputs

Number BIToSetGrp3/2/1 Setting group

1. 000 1
2. 001 2
3. 010 3
4. 011 4
5. 100 5
6. 101 6
7. 110 7
8. 111 8

If the various BI groups designate target setting group randomly, and the
user-defined logic of engineering research and development is realized,
then write the target setting group to **: ChangeSettingGrp. InSettingZone.
IED provides up to 8 setting groups.

85
Chapter 11 User-defined function

Figure 59 Diagram of binary input switch setting group configuration

2.6.2 Setting list

Table 64 Logic switch of binary input switching setting group diagram

Number Logic switch name Set mode Default value Remark

1. BISwitchSetGrp 1/0 0

2.7 Other configurations

The name of the device can be changed according to the requirements of
the project, and it can be named in accordance with the project schedule,
so as to facilitate the maintenance of the project.
The default length of waveform recording file generated by IED is 2.5
cycles before fault and 20 cycles before and after the fault together. It
supports to instantiate RS_WAVEPARAM by AESP tool and the users can
define the length of waveform records according to their needs. The length
of single waveform record cannot be longer than 200ms before fault, and
the total length of waveform records cannot be longer than 20s. Single
waveform record cannot be greater than 512k.

2.8 Defined logic

The AESP tool provides the basic elements of the module to support
user-defined simple engineering logic. The intermediate data and the
intermediate nodes in the application software which is open to the user
can be used conveniently in the configuration interface, and the logical
application of the project is realized.

Figure 60 AESPStudio working interface

86
 Chapter 12 Substation communication

Chapter 12 Substation
communication

About this chapter

This chapter describes functions such as substation
communication interface and protocol, clock synchronization
and so on.

87
Chapter 12 Substation communication

1 Overview
Each IED provides communication port to communicate with one or more
substation system. IED supports following communication protocols:
1) IEC 61850-8-1 communication protocol
2) IEC 60870-5-103 communication protocol
3) DNP 3.0
4) MODBUS

1.1 Communication protocol

1.1.1 IEC61850-8 communication protocol
Protocol IEC61850-8 allows two or more IED in one or more factories to
communicate and cooperate on the basis of their functions.
Standard IEC 61850-8-1 rules GOOSE (generic object of substation event).
By publishing and subscribing mechanism, GOOSE standardizes
communication state and control information between IEDs. That is to say,
if event is tested to happen, IED shall send information to devices which
have subscribed the event by multi cast.
1.1.2 IEC60870-5-103 communication protocol
IEC 60870-5-103 is master-slave type protocol and communicate with
control system through serial port. According to IEC rules, main station is
the master and substation is the slave. Communication is carried out on
the basis of point-to-point principle. Main station should be equipped with
the software that is able to receive IEC 60870-5-103 communication report.
For a more comprehensive understanding of the IEC60870-5-103 protocol,
you can refer to the fifth part of "IEC60870 standard": 103 section of
"communication protocol": "the standard of information communication
interface for IED protection".

1.2 Communication port

1.2.1 Front plate communication port
Front plates of all IEDs have a RJ45 communication port respectively. By
this port, users can use PC to operate Sifang debug software to connect
IED for setting, testing, configuring and so on.
1.2.2 RS485 communication port
The master provides an independent electric RS485 communication port
connecting to substation automatic system. The port supports protocol
IEC60870-5-103. Two isolated RS485 communication ports of bay unit are
not be used.
1.2.3 Ethernet communication port
IED provides three Ethernet ports to connect to substation's automatic
system.

88
 Chapter 12 Substation communication

1.3 Technical data

Table 65 Front plate communication port
Items Data
Number 1
Connection mode Debugging RJ45 port for software
Communication rate 100Mbit/s

Table 66 RS485 communication port

Items Data
Number 2
By two conductors
Connection mode
Communication port of rear plate
Maximum communication distance 1.0km
Test voltage 500V AC earthing
Support protocol IEC 60870-5-103
Parameter is set as 9600 baud,
Communication rate Minimum 1200 baud rate, maximum 19200
baud rate
Table 67 Ethernet communication port
Items Data
Ethernet communication port
Number 3
Cable or optical fibers/backboard
Connection mode
communication port
Maximum communication distance 100m
Support protocol IEC 6087050
Communication rate 100Mbit/s
Support protocol IEC 60870-5-103
Communication rate 100Mbit/s

Table 68 Time synchronization port

Items Data
Time synchronization mode Pulse or optical signal time synchronization
IRIG-B signal format IRIG-B000
Connected by two conductors or optical fibers
Connection mode
Communication port of rear plate
Volt level Differential signal

89
Chapter 12 Substation communication

1.4 Typical substation communication mode

Through communication protocols supported by communication port, IED
is able to communicate with one or more substation system or device.
Server or Server or
Work Station 1 Work Station 2

Switch
Work Station 3

Net 1: IEC61850/IEC103,Ethernet Port A

Switch Net 2: IEC61850/IEC103,Ethernet Port B Switch

Switch

Gateway Switch
or
converter

Net 3: IEC103, RS485 Port A

Figure 61 Multiple network substation automatic system connection case

1.5 Typical clock synchronization mode

All IEDs provide a clock synchronization port, it is able to choose IRIG-B
code or pulse time synchronization. For pulse time synchronization, IED
can automatically adapt to second or minute pulse time synchronization
mode. Meanwhile, IED could adopt SNTP mode to synchronize.

SNTP IRIG-B Pulse

Ethernet port IRIG-B port Binary input

Figure 62 Clock synchronization mode

90
 Chapter 13 Distributed IED hardware

Chapter 13 Distributed IED hardware

About this chapter

This chapter describes hardware for bay unit and central unit
of distributed device.

91
Chapter 13 Distributed IED hardware

1 Main device hardware

1.1 Overview
1.1.1 IED structure
Height for IED crate is 4U and width is 19 inches. Entirely embedded
installation back wired mode.
1) The front panel of IED is aluminum alloy by founding in integer and
overturn downwards. LCD, LED and setting keys are mounted on the
plate. There is a RJ45 interface on faceplate supporting PC
connection.
2) Back plug mode, module is fixed by screw spike.
3) Module is connected through bus of rear plate. IED could connect to
automatic system through rear interface.

482.6 465.1±0.2
+0.3
465.1 450 0
101.6±0.1

4- φ 6.5
+0.3
101.6

178 0
177

447.1
426.7
341.4

296.5
323

Figure 63 Diagram of installation size (unit mm)

1.1.2 Module arrangement diagram

Figure 64 Layout diagram of IED rear plate module (there are 14 ports on the data

92
 Chapter 13 Distributed IED hardware

management module)

1.2 Man-machine interface (MMI) and operation

1.2.1 Liquid crystal display (LCD)
The LCD back light of HMI is blue, 9 lines can be displayed. When
operating Sifang key or IED issuing alarm or trip report, background blue
light automatically lights up. Soon after the latest trip or alarm, background
blue light dies out after 5 minutes of time setting.

1.2.2 Man-machine interface (MMI)

MMI is man-machine interface. LCD screen displays the device running
information, such as measured value for current and voltage, connector
state and BI, BO and bay signal line diagram.
If there is no key operation, the MMI main cycle interface shows part of
device information. User could press “ESC” to lock current display, and
press “ESC” again to restore circulation display.
Faceplate area description is as follows: zone one is for the user-defined
indicator area; zone two is for the key area of the control function; zone
three is for the debugging of net port; zone four is for the key district of the
basic key.

Figure 65 MMI schematic diagram

The user-defined indicator area consists of 24 lights, where the position of
running lights and alarm light are fixed, and the functions of other 22 lamps
can carry out the configuration of light color, light property according to the
needs of the user; in key areas, there is indicator indicating device state on
each of the remote, local and blocking key respectively.
RUN: When running lights, the green light is lightened during the normal
operation, while the running light is off if there is an alarm of class 1.
ALARM: alarm indicator, the device alarm lightens the red light.
The faceplate uses the Ethernet port to connect PC and device, which
supports setting device parameter, measuring function, downloading
programs and analyzing data. The debugging IP address of Ethernet port
is 192.178.111.31 which is unchangeable.
The key includes basic key and control functional key. Basic key is on the
right of the screen and control functional key is below the screen to realize
human-computer interaction. Keys for IED of CSC series contain the same

93
Chapter 13 Distributed IED hardware

appearance and operation mode, for details in the following table.

Table 69 IED MMI key
Key Function
 Move up in the menu
 Page up between screens
 Increase setting value

 Move down in the menu

 Page down among screens to reduce settings.

Move left in the menu

Move right in the menu

 Reset LED light

 Directly back to normal circulation display interface

 Entering main menu or sub-menu

 Affirming revised setting

 Back to previous menu

 Exit revising setting
 Back to circulation display interface
 Locking or unlocking circulation display interface (when
locking, top right corner of LCD displays a small key)
 Value adds 1;
+ 

Page down;
Logic switch shift from the present value to the opposite
value; namely "1" to "0", or "0" to "1"
 Value minus 1;
- 

Page up;
Logic switch shift from the present value to the opposite
value; namely "1" to "0", or "0" to "1"

F1 F2  User-defined function key

 The shortcuts for menu options are able to set to relate
with menu items to execute functions of this menu.
F3 F4  as the input signal to participate in logic

 Switching to remote operation mode, earthing control shall

be blocked. Switching to earthing control mode, remote
operation shall be blocked.
 It is used for locking and unlocking control key and
user-defined key so as to prevent mistakenly touching.

 Breaker closes

94
 Chapter 13 Distributed IED hardware

Key Function

 Breaker opens

1.2.3 Menu structure

Click the key MMI to enter the IED menu, and view information or take
some related operations. Due to the differences in the function of various
type of IED, the following lists show the maximum menu configuration; the
value of related setting information and various type of IED is on the basis
of actual display.
Table 70 IED menu
L1 menu L2 menu L3 menu L4 menu Description
Read the measure input
PriVal
primary-value of the IED
Calc
Read the measure input
SecVal
second-value of the IED
Analog Read the analog input of the IED
Read binary input state of
CU
central unit
Read binary input state of bay
BU0
unit 0
Read binary input state of bay
BU1~10
unit 1~10
Read binary input state of bay
BI BU11~20
unit 11~20
Read binary input state of bay
IEDState BU21~30
unit 21~30
Read binary input state of bay
BU31~40
unit 31~40
Read the original binary input
GOOriginBI
state of GOOSE
Read binary output state of
BO
central unit
ViewInfo Read state information of
GOOSESubState
GOOSE subscription
GOState
Read state information of
GOOSEPubState
GOOSE publishing
Read state information of the
StateMon
IED
Read the current alarm
AlarmInfo
information
Read common setting of
CommonSet
protection
Read setting of differential
DiffSet
protection
Read setting of bus coupler
BusCouSet
protection
ViewSet Read setting of circuit breaker
CBFSet
failure protection
Read setting of dead zone
DeadZoneSet
protection
Read setting of overcurrent
OCSet
protection
EquipParm Read the equipment parameters
ConState FunctionCon Read the function connector

95
 Chapter 13 Distributed IED hardware

L1 menu L2 menu L3 menu L4 menu Description

information
Read state information of
GOOSEPubSoftCon
GOOSE publishing
Read state information of
GOOSESubSoftCon
GOOSE subscription
IED IDCode Read the unique code of IED
Read the version information of
VerInfo IEDVer
IED
VrtlTrmlChkCode Read the VT check code
Read the synchronization mode
SyncMode
of IED
IEDSet Read the Ethernet information of
EthernetSet
CommParm IED
IEDAddr Read IED address
FunctionCon Set function connector state
Set state information of GOOSE
ConOn/Off GOOSEPubSoftCon
publishing
Operate Set state information of GOOSE
GOOSESubSoftCon
subscription
Switch current operation setting
SwitchSetGrp
area
GenlRpt Read general report
StartupRpt Read the startup report
TripRpt Read the trip Report
AlarmRpt Read the alarm report
OperationRpt Read the operation report
ViewRpt Read alarm of data
DMAlarmRpt
management module
BIChangeRpt Read the BI change report
Startup waveform record shown
StartupDFRList
in list
Trip waveform record shown in
TripDFRList
list
ProtSet Setting the ProtSet
GrpCopy Copy setting of setting zone
WriteSet SubstationName Set substation name
Set the protected equipment
EquipParm ProtEquipName
name
EquipParm Set equipment parameters
Test the binary output contact of
PhysicalBO
BOTest central unit
GOOSE BO Test GOOSE signal
FnAlarmChk
TripRptChk
GOAlarmChk
DMAlarmChk
TestMenu CommChk Test communication signal
BIChk
MSTAlarmChk
ConChk
AnalogChk
LEDTest TestLED
Manual triggering to generate
MC DFR
fault and disturbance record

96
 Chapter 13 Distributed IED hardware

L1 menu L2 menu L3 menu L4 menu Description

ProtSet
SoftConn
Analog
SampleVal
IEDState BIO
ConnState
Print VerInfo Print various information
StartupRpt
TripRpt
Rpt AlarmRpt
OperRpt
BIChgRpt
IEDSet
SetClock Set time
SyncMode Choose synchronization mode
NetTimeSyncIPSet Set SNTP address
TimeZone Set the local time zone
Set
daylight-saving
time in
Mode1
TimeSet sequence of
year, month, The two
day modes cannot
DST
Set be enabled
daylight-saving simultaneously
time in
Mode2
sequence of
month, week,
hour
IEDSet
Set the Ethernet information of
EthernetSet
IED
IEDAddr Set IED address
Serial1Set
CommParm SerialSet Serial2Set Set serial port parameters
Serial3Set
ProtocolSet Set the protocol information
PRPSet
IEDName
Password Set IED password
Contrast Set the contrast
OtherSet Set report parameters and the
mode that sending
DisplayMode
primary-secondary value to
SCADA
CHN Confirm
Language ENG Confirm Switch language
RUS Confirm
Click the key in the recycle main interface, the menu tree will be shown
in the MMI interface; click the key or to select menu items, when the
cursor stays in the corresponding menu item, if there is a symbol
""behind this menu item, it can click the key or to enter the next

97
Chapter 13 Distributed IED hardware

menu; if there is no signal "", it can click the key to enter the menu
items.

SIFANG 2017-10-01 21:30:1D

IEDState  Analog 
ViewSet  AnalogInput
ConState  BI 
VerInfo  BO
BO
GOState 
ViewInfo  IEDSet  StateMon
Operate  AlarmInfo
ViewRpt 
WriteSet 
TestMenu
IEDSet 
Language 
PresentSetGrpNo.:

Figure 66 Menu tree diagram

BO 1/2

BO 1 0
BO 2 0
BO 3 0
BO 4 0
BO 5 0
BO 6 0
BO 7 0
BO 8 0
BO 9 0

Figure 67 Menu diagram

98
 Chapter 13 Distributed IED hardware

1.3 BI modules
1.3.1 Overview
The BI hardware of BI module includes two types of welding: 1) high power
voltage level, adaptive 110V, 220V, 125V, 250V and 2) low power voltage
level, adaptive 24V and 48V. Work rated power source of device BI is
modified by configuration file before applying.
1.3.2 BI module description
There are three indication lights on the BI panel to show the status of the
board, the indication light definition is shown in the following table.
Table 71 Definition of BI module indicator
Serial number of Function of indicator
Introduction of indicator status
indicator light light
1 Power supply light Light is on when power on
2 Running light Flash when operating properly
3 Spare Off

Due to the different location of the slot, the BI module can be set at
different address of board cards, and the address is set through the jumper
J2. Take the side away from single board as L side, the side near single
board as H side, from bottom to top are AD0, AD1, AD2 and AD3.
Table 72 BI module address definition
Slot
Jumper Control content Jumper settings
location
BI1 J2 BI1 address AD3~AD0 are short connected to the L side

28 BIs are divided into 4 groups. All groups are independent from each
other.

BI
1 2 3 LED
c a
2 BI14 BI1
4 BI15 BI2
6 BI16 BI3
8 BI17 BI4
10 BI18 BI5
BINARY INPUT

12 BI19 BI6
14 BI20 BI7
16 BI21 BI8
18 BI22 BI9
20 BI23 BI10
22 BI24 BI11
24 BI25 BI12
26 BI26 BI13
28 COM2 COM1
30 BI28 BI27
32 COM4 COM3

Figure 68 Diagram of BI module terminal

99
Chapter 13 Distributed IED hardware

1.3.3 Technical data

Table 73 BI parameter

Executive
Items Data
standard
110V/125V/220V/250V DC
Rated voltage IEC 60255-1
24V/48V DC
Startup voltage IEC 60255-1 70%Ur, rated DC 24V/48V, 110V/125V/220V/250V
Return voltage IEC 60255-1 55%Ur, rated DC 24V/48V, 110V/125V/220V/250V
286V, rated DC voltage 110V/125V/220V/250V;
The maximum BI voltage IEC 60255-1
62V, rated DC voltage 24V/48V;
Maximum 0.5W/ input, 110V DC
Power consumption IEC 60255-1
Maximum 1W/ input, 220V DC

1.4 BO modules
1.4.1 Overview
The module provides certain of protection closing control so as to realize
telecontrol switching. Some channels could be switched to normally
opened or closed contact.
1.4.2 BO Module description
There are three indication lights on the BO panel to show the status of the
board, the indication light definition is shown in the following table.
Table 74 Definition of BO module indicator
Serial number of
Function of indicator light Introduction of indicator status
indicator light
1 Power supply light Light is on when power on
2 Running light Flash when operating properly
3 Spare Off
Due to the different location of the slot, the BO module can be set at
different address of board cards, and the address is set through the jumper
J2. Take the side away from single board as L side, the side near single
board as H side, from bottom to top are AD0, AD1, AD2 and AD3.
Table 75 BO module address definition
Slot location Jumper Control content Jumper settings
BO1 J2 BO1 address AD3~AD0 are short connected to the L side
1. Connection method of jumper:
First step: to determine the state of contact 15, 16
The center position is short connected with B by J28 and J30, it represents
that the 15th and 16th channels of contacts are always closed; the center
position is connected with A represents, it represents that the 15th and
16th contacts are always opened.
Second step: to determine J27 and J29
1) If J28 and J30 represent constant-closed contacts, J27 and J29 trip to
B, J25 and J26 trip to 24V-, it will not be blocked by starting;
2) If J28 and J30 represent constant-open contacts, J27 and J29 trip to A,

100
 Chapter 13 Distributed IED hardware

J25 and J26 trip to 24V-, it will not be blocked by starting; J25 and J26
trip to QD, it represents that the 15th and 16th channels of contacts
will be blocked by starting.
The third step: to determine J11-J24
When J11~J24 trip to QD (1-2), it is blocked by initiation; when tripping to
24V-(2-3), it is not blocked by initiation;
The 1~14 way are normally open and non-holding contacts which are not
blocked by initiation; 15~16 way are normally open and non-holding
contacts which are not blocked by initiation (be configured in normally
close state).
2. Jumper cap wiring mode:
J27, J28, J29 and J30 trip to A; J25 and J26 switch to 24V-, which means
that the normally open contacts are non-holding and are not blocked by
initiation; J11~J24 trip to 24V-.
The jumper wiring methods mentioned above are default, and they can be
changed in accordance with the requirements of project.

BO
1 2 3 LED
c a
2 BO1
4 BO2
6 BO3
8 BO4
10 BO5
BINARY OUTPUT

12 BO6
14 BO7
16 BO8
18 BO9
20 BO10
22 BO11
24 BO12
26 BO13
28 BO14
30 BO15
32 BO16

Figure 69 Diagram of BO module terminal

1.4.3 Technical data

Table 76 BO parameter
Executive
Items Data
standard
Maximum work voltage IEC60255-1 250V AC
5A continuous,
Current carrying capacity IEC60255-1
30A, 200ms On, 15s Off

101
Chapter 13 Distributed IED hardware

Executive
Items Data
standard
1100 W( ) at inductive load L/R>40ms
Closing capacity IEC60255-1
1000VA (AC)
220V , 0.15A, L/R≤40ms
Arc breaking capacity IEC60255-1
110V , 0.30A, L/R≤40ms
Mechanical endurance IEC60255-1 50,000,000 times (switching frequency is 3HZ)
Opening times IEC60255-1 ≥1000 times
Closing times IEC60255-1 ≥1000 times
IEC60255-1
Authentication IEC60255-23 UL/CSA, TŰV
IEC61810-1
IEC60255-1
Contact circuit resistance IEC60255-23 30mΩ
IEC61810-1
Contact insulation test (AC IEC60255-1
AC1000V 1min
dielectric strength ) IEC60255-27
Maximum temperature that
IEC60255-1 55℃
operation allows

1.5 CPU module

1.5.1 Overview
CPU module is core of the IED and responsible for running all protection
logic, hardware self-check and communication and information exchanges
for external devices such as MMI, PC, measurement, substation automatic
system, working station, RTU, printers and so on. CPU module supports
time synchronization and communication port.
IED provides multiple configurations for user's need. Differences lie in
quantities for Ethernet port, optical/electric port, time synchronization
mode, storage capacity, thickness of module and so on.
1.5.2 CPU module terminal diagram
The CPU module panel has twelve indicators to indicate the operation
status of the board and the definition of indicator is shown as the following
table.
Table 77 Definition of indicator of CPU module
Indicator serial
Indicator function Indicator state introduction
number
Indicator 1 of Flash when communicating normally while close
1
Ethernet Plate when communicating abnormally
Indicator 2 of Flash when communicating normally while close
2
Ethernet Plate when communicating abnormally
Indicator 3 of Flash when communicating normally while close
3
Ethernet Plate when communicating abnormally
4 Spare /
5 Spare /
6 Spare /
7 Spare /
Flash when operating normally while close when
8 CPU1 Running light
operating abnormally

102
 Chapter 13 Distributed IED hardware

Indicator serial
Indicator function Indicator state introduction
number
Flash when operating normally while close when
9 CPU2 Running light
operating abnormally
Time
10 Signal light is flashing
synchronization LED
11 Spare /
12 Spare /

CPU
1 4 7 10 11 12
2 5 8 LED
3 6 9

ETH1

ETH2 PULSE-IN+ 1
PULSE-IN- 2
3
ETH3 4
5
6
ETH4 7
8
TX PRINT-TX 9
ETH5 PRINT-RX 10
RX PRINT-GND 11
RS485-1A 12
TX RS485-1B 13
RX ETH6 RS485-GND 14
RS485-2A 15
TX RS485-2B 16
RX ETH7

Figure 70 Diagram of CPU module terminal

Table 78 Definition of CPU terminals

Terminals Definition
1 Differential time synchronization IN+
2 Differential time synchronization IN-
3~8 /
9 Print sending
10 Print receiving
11 Print
12 485-1A

103
Chapter 13 Distributed IED hardware

Terminals Definition
13 485-1B
14 485-GND
15 485-2A
16 485-2B
Ethernet port 1 RJ45 port
Ethernet port 2 RJ45 port
Ethernet port 3 RJ45 port
Ethernet port 4 RJ45 port
Ethernet port 5 SFP Ethernet port and RJ45 ports are available for choosing.
Ethernet port 6 SFP Ethernet port and RJ45 ports are available for choosing.
Ethernet port 7 SFP Ethernet port and RJ45 ports are available for choosing.

1.5.3 Technical data

Table 79 RS485 communication port
Items Data
Number 2
Lead by double wires, on the CPU module
Port type
bottom plate
Maximum transmission distance 1.0 km
Test voltage 500V earthing AC voltage
Used for IEC 60870-5-103 protocol
Default setting 9600 bps;
Transmission rate
Minimum. 1200 bps, maximum. 19200 bps
Table 80 Ethernet communication port
Items Data
Ethernet port
Number 3
RJ45 or optical Ethernet port. On the CPU
Port type
module
Maximum transmission distance 100m
Used for IEC 61850 protocol
Transmission rate 100Mbit/s
Used for IEC 60870-5-103 protocol
Transmission rate 100Mbit/s
Table 81 Time synchronization
Items Data
Synchronization mode IRIG-B time synchronization
IRIG-B signal format IRIG-B000
Double wire conductor or optical fibers
Port type
connector. On the CPU module
Voltage level Differential signal input

104
 Chapter 13 Distributed IED hardware

1.6 Data management module

1.6.1 Overview
Data management module is responsible for the download and upload of
data between central unit and bay unit. Provide single board configured
with 14 ports.
1.6.2 Data management terminal diagram for module
On the panel of data management module, there are 18 indicators to
indicate the operation state of the panel, and the definition of indicator is
shown as below.
Table 82 Definition of indicator of CPU module
Indicator
serial Indicator function Indicator state introduction
number
Indicator 1 of Flash when communicating normally while close when
1
Ethernet Plate communicating abnormally
Indicator 2 of Flash when communicating normally while close when
2
Ethernet Plate communicating abnormally
Indicator 3 of Flash when communicating normally while close when
3
Ethernet Plate communicating abnormally
Indicator 4 of Flash when communicating normally while close when
4
Ethernet Plate communicating abnormally
Indicator 5 of Flash when communicating normally while close when
5
Ethernet Plate communicating abnormally
Indicator 6 of Flash when communicating normally while close when
6
Ethernet Plate communicating abnormally
Indicator 7 of Flash when communicating normally while close when
7
Ethernet Plate communicating abnormally
Flash when operating normally while close when operating
8 Running LED of CPU
abnormally
9 Spare /
Indicator 11 of When the communication is normal, the light flashes, which is
11
Ethernet Plate suitable for the module configured with 14 ports
Indicator 12 of When the communication is normal, the light flashes, which is
12
Ethernet Plate suitable for the module configured with 14 ports
Indicator 13 of When the communication is normal, the light flashes, which is
13
Ethernet Plate suitable for the module configured with 14 ports
Indicator 14 of When the communication is normal, the light flashes, which is
14
Ethernet Plate suitable for the module configured with 14 ports
Indicator 15 of When the communication is normal, the light flashes, which is
15
Ethernet Plate suitable for the module configured with 14 ports
Indicator 16 of When the communication is normal, the light flashes, which is
16
Ethernet Plate suitable for the module configured with 14 ports
Indicator 17 of When the communication is normal, the light flashes, which is
17
Ethernet Plate suitable for the module configured with 14 ports
18 Spare /
19 Spare /

105
Chapter 13 Distributed IED hardware

DM
1 4 7 11 14 17
2 5 8 LED 12 15 18 LED
3 6 9 13 16 19

TX TX
RX
ETH1 RX
ETH11
TX TX
RX ETH2 RX ETH12
TX TX
RX ETH3 RX ETH13
TX TX
RX ETH4 RX ETH14
TX TX
RX ETH5 RX ETH15
TX TX
RX ETH6 RX ETH16
TX TX
RX ETH7 RX ETH17

Figure 71 Terminal diagram for data management module (14 ports)

Table 83 Terminal definition for data management module
Terminal Definition Description

ETH1 SFP optical Ethernet port /

ETH2 SFP optical Ethernet port /
ETH3 SFP optical Ethernet port /
ETH4 SFP optical Ethernet port /
ETH5 SFP optical Ethernet port /
ETH6 SFP optical Ethernet port /
ETH7 SFP optical Ethernet port /
ETH11 SFP optical Ethernet port /
ETH12 SFP optical Ethernet port /
ETH13 SFP optical Ethernet port /
ETH14 SFP optical Ethernet port /
ETH15 SFP optical Ethernet port /
ETH16 SFP optical Ethernet port /
ETH17 SFP optical Ethernet port /

1.6.3 Technical data

Table 84 Ethernet communication port
Items Data
Ethernet port
Number 14
Port type Optical Ethernet port.
Maximum transmission distance 100m

1.7 Power supply module

1.7.1 Overview
Power module converts the input 220V/110V into DC power for IED
running. All working powers are not earthing to the same ground to create
electrical isolation. In order to improve anti-interference ability for power

106
 Chapter 13 Distributed IED hardware

circuit, the module is equipped with anti-interference filter in DC input.

What's more, the module is equipped with sophisticated power protection
function (undervoltage, overvoltage, overcurrent, overpower, etc.) to
prevent IED breakdown from power failure. It integrates IED's alarm and
signal output.
1.7.2 Power module introduction
There are three indication lights on the power module panel to show the
state of panel, and the definition of indication light is shown as below.
Table 85 Definition of power module indicators
Serial number of Function of
Introduction of indicator status
indicator light indicator light
Power supply
1 Light is on when power on (green)
light
2 Alarm light Light is on when error occurs (red)
Light is on when power is off and when
3 Error light
malfunction occurs (red)

POWER
PWR
ALARM
FAIL P0
1 ALARM2+
2 ALARM2-
3 FAIL2+
4 FAIL2-
P1
1 ALARM1+
2 ALARM1-
3 FAIL1+
4 FAIL1-
5
6 IN+
7
8 IN-
9
10

Figure 72 Diagram of power supply module terminals

Table 86 The definition of power supply module terminals

Terminals Definition Description

P0-1 ALARM2+
Always opened and unlatched
P0-2 ALARM2-
P0-3 FAIL2+ Always closed and unlatched

107
Chapter 13 Distributed IED hardware

P0-4 FAIL2-
P1-1 ALARM1+
Always opened and unlatched
P1-2 ALARM1-
P1-3 FAIL1+
Always closed and unlatched
P1-4 FAIL1-
P1-5 /
P1-6 IN+
P1-7 /
P1-8 IN-
P1-9 /
P1-10 Case earthing

1.7.3 Technical data

Table 87 Technical data
Item number Executive standard Data
Rated voltage Uaux IEC60255-1 110V to 250V
Input voltage error range IEC60255-1 ±%20Uaux
Static power consumption IEC60255-1 ≤ 50W each power module
Maximum load power
IEC60255-1 ≤ 70W each power module
consumption

1.8 wiring terminal

Table 88 wiring terminal
module Terminal/wire size
2
AC module 4mm screw terminal
1.5mm2 crimp terminal
BI/BO module
2.5mm2 screw terminal
1.5mm2 crimp terminal
Power module
2.5mm2 screw terminal

1.9 Test
Table 89 Insulation test
Item number Executive standard Data
Overvoltage level IEC60255-27 Level III
Interference degree IEC60255-27 Two degrees
Insulation IEC60255-27 Basic insulation
IEC60255-27 Front plate: IP 40
Protection level (IP)
IEC 60529 Top and bottom of baseplate: IP 30
1) 2KV, 50Hz 2.8kV
Test between the following circuits:
 Power BI
 CT/VT input
IEC 60255-5
 Binary input
EN 60255-5
 Binary output
Dielectric Strength ANSI C37.90
 Earthing
GB/T 15145-2017
2) 500V, 50Hz, test between the
DL/T 478-2013
following circuits,
 Communication port to earth
 Time synchronization port
earthing

108
 Chapter 13 Distributed IED hardware

Item number Executive standard Data

Ui≥63V5kV (1.2/50μs, 0.5J)
Ui<63V1kV
IEC60255-5 Test between the following circuits:
IEC 60255-27 Circuit:
EN 60255-5  Binary input of power supply
Impact voltage test
ANSI C37.90  CT/VT input
GB/T 15145-2017  Binary input
DL/T 478-2013  Binary output
 Earthing
Note Ui: Rated voltage
IEC60255-5
IEC 60255-27
EN 60255-5
Insulation resistance ≥ 100MΩ 500V
ANSI C37.90
GB/T 15145-2017
DL/T 478-2013
Earthing resistance IEC60255-27 ≤ 0.1Ω
Fireproofing grade IEC60255-27 Level V2
Table 90 EMC test
Item number Executive standard Data
1MHz pulse group IEC60255-22-1 Grade 3
interference test IEC60255-26 2.5kV CM;
IEC61000-4-18 1 kV DM
EN 60255-22-1
ANSI/IEEE C37.90.1
Electrostatic discharge IEC 60255-22-2 Grade 4
immunity IEC 61000-4-2 ±8kV electro-contact discharge;
EN 60255-22-2 15kV air discharge;
Radiated electromagnetic IEC 60255-22-3 Grad e 4
field immunity EN 60255-22-3 10V/m 、 80MHz~1GHz 、
1.4GHz~2.7GHz
Electrical fast transient IEC 60255-22-4, Grad e 4
immunity IEC 61000-4-4 Communication port: 4KV
EN 60255-22-4 Other port: 2KV
ANSI/IEEE C37.90.1
Surge (impact) immunity IEC 60255-22-5 Grad e 4
IEC 61000-4-5 4.0kV，CM
2.0kV，DM
Radio frequency IEC 60255-22-6 Frequency sweep: 150kHz – 80MHz
interference test IEC 61000-4-6 Calibration frequency: 27 MHz and 68
MHz
10V
AM, 80%, 1kHz
Power frequency immunity IEC60255-22-7 Level A
test 300V CM
150V DM
Power frequency magnetic IEC 61000-4-8 Grade 4
field immunity test 100A/m is larger than30s. 300 A/m 1
s to 3s
100KHz pulse-group noise IEC61000-4-18 Grade 3
immunity Communication port: 2KV

109
Chapter 13 Distributed IED hardware

Item number Executive standard Data

Other port: 4KV
Damped oscillation Grade 5
IEC61000-4-10
magnetic field immunity test 100A/m
Pulse magnetic field Grade 5
immunity IEC61000-4-9 1000A/m
Conducted emission IEC 60255-25 0.15MHz~30MHz, level A
Radiated emission IEC 60255-25 30MHz~1000MHz, level A
Table 91 Mechanical experiment
Item number Executive standard Data
Sinusoidal vibration IEC60255-21-1 Grade 1
response test EN 60255-21-1
Sinusoidal vibration and IEC60255-21-1 Grade 1
endurance test EN 60255-21-1
Impact response test IEC60255-21-2 Grade 1
EN 60255-21-2
Impact and endurance test IEC60255-21-2 Grade 1
EN 60255-21-2
Collision test IEC60255-21-2 Grade 1
Seismic experiment IEC60255-21-3 Grade 1

Table 92 Environmental test

Items Data
High and low temperature test -40°C to +70°C
Temperature storage test -40°C to +70°C
Humidity test Relative humidity is 95%

1.10 Structural design

Table 93 Structural design
Items Data
Dimension 4U×1/2 19 inches
Weight ≤ 7kg

1.11 CE certification
Table 94 CE certification
Items Data
EN 61000-6-2 and EN61000-6-4 ( EMC
EMC
Steering Committee 2004/108/EC)
LVD EN 60255-27 (LVD 2006/95 EC)

2 Bay unit hardware

2.1 Overview
2.1.1 IED structure
The enclosure for IED is 19 2 inches in width and 4U in height. Entirely
embedded installation back wired mode.

110
 Chapter 13 Distributed IED hardware

Figure 73 Diagram of installation size (unit mm)

1) The front panel of IED is aluminum alloy by founding in integer and
overturn downwards. LCD, LED and setting keys are mounted on the
plate. There is a RJ45 interface on faceplate supporting PC
connection.
2) Back plug mode, module is fixed by screw spike.
3) Module is connected through bus of rear plate. IED could connect to
automatic system through rear interface.
2.1.2 Module arrangement diagram

Figure 74 IED rear plate module layout diagram

111
Chapter 13 Distributed IED hardware

2.2 Man-machine interface (MMI) and operation

2.2.1 Liquid crystal display (LCD)
The LCD back light of HMI is blue, 9 lines can be displayed. When
operating Sifang key or IED issuing alarm or trip report, background blue
light automatically lights up. Soon after the latest trip or alarm, background
blue light dies out after 5 minutes of time setting.
2.2.2 Man-machine interface (MMI)
MMI is man-machine interface. LCD screen displays the device running
information, such as measured value for current and voltage, connector
state and BI, BO and bay signal line diagram.
If there is no key operation, the MMI main cycle interface shows part of
device information. User could press “ESC” to lock current display, and
press “ESC” again to restore circulation display.
The description of faceplate area is as follows: zone one is for the
user-defined indicator area; zone two is for the key area of the control
function; zone three is for the debugging of net port; zone four is for the
key district of the basic key.

CSC-211

Figure 75 MMI schematic diagram

The user-defined indicator area consists of 24 lights, where the position of
running lights and alarm light are fixed, and the functions of other 22 lamps
can carry out the configuration of light color, light property according to the
needs of the user; in key areas, there is indicator indicating device state on
each of the remote, local and blocking key respectively.
RUN: When running lights, the green light is lightened during the normal
operation, while the running light is off if there is an alarm of Class 1.
ALARM: alarm indicator, the device alarm lightens the red light.
The faceplate uses the Ethernet port to connect PC and device, which
supports setting device parameter, measuring function, downloading

112
 Chapter 13 Distributed IED hardware

programs and analyzing data. The debugging IP address of Ethernet port

is 192.178.111.21, which is unchangeable.
The key includes basic key and control functional key. Basic key is on the
right of the screen and control functional key is below the screen to realize
human-computer interaction. Keys for IED of CSC series contain the same
appearance and operation mode, for details in the following table.
Table 95 IED MMI key
Key Function
 Move up in the menu
 Page up between screens
 Increase setting value

 Move down in the menu

 Page down among screens to reduce settings.

Move left in the menu

Move right in the menu

 Reset LED light

 Directly back to normal circulation display interface

 Entering main menu or sub-menu

 Affirming revised setting

 Back to previous menu

 Exit revising setting
 Back to circulation display interface
 Locking or unlocking circulation display interface (when
locking, top right corner of LCD displays an icon of a small
key)
 Value adds 1;
+ 

Page down
Logic switch shift from the present value to the opposite
value; namely "1" to "0", or "0" to "1"
 Value minus 1
- 

Page up
Logic switch shift from the present value to the opposite
value; namely "1" to "0", or "0" to "1"
 User-defined function key
F1 F2  The shortcuts for menu options are able to set to relate with
menu items to execute functions of this menu.
F3 F4  as the input signal to participate in logic

 Switching to remote operation mode, and earthing control

shall be blocked.
 Switching to earthing control mode, remote operation shall

113
Chapter 13 Distributed IED hardware

Key Function
be blocked.
 It is used for locking and unlocking control key and
user-defined key so as to prevent mistakenly touching.

 Breaker closes

 Breaker opens

2.2.3 Menu structure

Click the key MMI to enter the IED menu, and view information or take
some related operations. Due to the differences in the function of various
type of IED, the following lists show the maximum menu configuration; the
value of related setting information and various type of IED is on the basis
of actual display.

114
 Chapter 13 Distributed IED hardware

Table 96 IED menu

L1 menu L2 menu L3 menu L4 menu Description
Read the analog input
Analog
of the IED
Read the binary input
ConventionalBI
of the IED
BIO
Read the binary output
IEDState ConventionalBO
of the IED
Read state information
StateMon
of the IED
ViewInfo
Read the current alarm
AlarmInfo
information
Read the function
ConState FunctionCon
connector information
Read the unique code
IED IDCode
of IED
VerInfo
Read the version
IEDVer
information of IED
Set function connector
Operate ConOn/Off FunctionCon
state
AlarmRpt Read the alarm report
Read the operation
OperationRpt
report
ViewRpt
Read the BI change
BIChangeRpt report

BOTest ConventionalBO Test the BO contacts

LEDTest TestLED
ViewZeroDrift
TestMenu
ViewScale
FactoryTest
AdjZeroDrift
AdjScale
TimeZone Set the local time zone
Set daylight-saving
Mode1 time in sequence of
TimeSet year, month, day
DST
Set daylight-saving
Mode2 time in sequence of
month, week, hour
IEDSet Serial1Set
Set serial port
SerialSet Serial2Set
parameters
CommParm Serial3Set
Set the protocol
ProtocolSet
information
Password Set IED password
OtherSet
Contrast Set the contrast
CHN Confirm
Language ENG Confirm Switch language
RUS Confirm
Click the key in the recycle main interface, the menu tree will be shown
in the MMI interface; click the key or to select menu items, when the
cursor stays in the corresponding menu item, if there is a symbol
""behind this menu item, it can click the key or to enter the next

115
Chapter 13 Distributed IED hardware

menu; if there is no signal "", it can click the key to enter the menu
items.

SIFANG 2017-10-01 21:30:1D

Calc  ConventionalBI
BIO  ConventionalBO
StateMon
IEDState 
AlarmInfo
ConState 
ViewInfo  VerInfo 
Operate 
ViewRpt 
TestMenu
IEDSet 
Language 

Figure 76 Menu tree diagram

BO 1/2

IEDErrAlarm 0
RunErrAlarm 0
X9_BO 3 0
X9_BO 4 0
X8_BO 1 0
X8_BO 2 0
X8_BO 3 0
X8_BO 4 0
X8_BO 5 0

Figure 77 Menu diagram

2.3 Analog input module

2.3.1 Overview
AC module contains voltage and current transformers. The module
converts two-side current and voltage to processable signal for IED data
collecting system and serves as electrical isolation. IED in different type
shall be with different current and voltage transformers. The module is
optional according to different project requirements.
2.3.2 Analog input module introduction
There are three kinds of AC modules, which are divided into current and
voltage types. Figure shows AC module terminal.
The left two modules are voltage AC module terminal diagrams that can
access to 6 channels of voltage and 3 channels of voltage respectively.
The terminal identification without ' suffix is inlet positive terminal, while
that with ' suffix is the outlet negative terminal.
The last is current type AC module terminal diagrams, here, only the
terminal diagram of the AC module with 6 channels of protection currents

116
 Chapter 13 Distributed IED hardware

is shown (AC module of 3 channels of protection current has no I2, the

other are the same), it supports 1A or rated 5A current access, and each
current channel provides 3 wiring terminals. The terminal identification
without ' suffix is shared inlet positive terminal, while that with' suffix is the
outlet negative terminal. For example, the use of rated 1A of Ia should
access the current from the Ia terminal to the I1a_1’ terminal and I1a_5 '
terminal is suspended; the use of rated 5A should access the current from
the Ia terminal to Ia_5' and Ia_1' terminal is suspended; the wiring principle
of other protection type of current channels is same.

AC AC AC
b a b a b a
1 I1a_1' I1a 1 I1a_1' I1a 1 U1a' U1a

2 I1b_5' I1a_5' 2 I1b_5' I1a_5' 2

3 I1b_1' I1b 3 I1b_1' I1b 3 U1b' U1b

4 I1c_1' I1c 4 I1c_1' I1c 4 U1c' U1c
5 I2a_5' I1c_5' 5 I1c_5' 5

6 I2a_1' I2a 6 6 U2a' U2a

7 I2b_1' I2b 7 7 U2b' U2b
8 I2c_5' I2b_5' 8 8

9 I2c_1' I2c 9 9 U2c' U2c

10 10 10 U3a' U3a

11 11 11 U3b' U3b

12 12 12 U3c' U3c

Figure 78 AC module terminal diagram

2.3.3 Technical data

Table 97 Current transformer parameters
Items Executive standard Data
Rated current IEC 60255-1 1A or 5 A
Sampling range for Protection CT is 0.05 In to 40
conventional current In, while measurement CT is
transformer 0.05 In to 1.2 In.
Power consumption (per ≤ 0.2 VA when In = 1A;
phase) ≤ 0.5 VA when In = 5 A
Thermal overload capacity of IEC 60255-1 100 Ir overload 1s
nominal current transformer IEC 60255-27 Continuous 4 Ir

117
Chapter 13 Distributed IED hardware

Table 98 Voltage transformer parameter

Items Executive Data
standard
Rated voltage Vr (line voltage) IEC 60255-1 100V/110V
Sampling range (phase-to-earth
0.4V~180V
voltage)
Power consumption (Vr = 110V) IEC 60255-27 ≤ 0.1 5VA each phase
DL/T 478-2013
Thermal overload capacity IEC 60255-27 400V, overload 60s
(phase-to-earth voltage) DL/T 478-2013 200V, continuous

2.4 BIO module

2.4.1 Overview
BIO module provides all the trip outputs, some channels could be switched
to normally opened or closed node.
The BI and BO of the hardware of BIO module include two types of
welding : 1) high power voltage level, adaptive 110V, 220V, 125V, 250V
and 2) low power voltage level, adaptive 24V and 48V. Work rated power
source of device BI is modified by configuration file before applying.
2.4.2 BIO module introduction
There are three indication lights on the BIO panel to show the status of the
board, the indication light definition is shown in the following table.
Table 99 Definition of BIO module indicator
Serial number Function of indicator
Introduction of indicator status
of indicator light light
1 Power supply light Light is on when power on
2 Running light Flash when operating properly
3 Spare Off

According to the different slot locations of the BIO module, different board
addresses need to be set, and address is set through jumper J6. Take the
side away from single board as L side, the side near single board as H side,
from bottom to top are AD0, AD1, AD2 and AD3.
Table 100 Definition of BIO module address
Slot location Jumper Control content Jumper settings
BIO1 J6 BIO1 address AD3~AD0 are short connected to the L side
AD3~AD1 are short connected to the L side,
BIO2 J6 BIO2 address
AD0 is short connected to the H side
AD3, AD2, AD0 are short connected to the L
BIO3 J6 BIO3 address
side, AD1 is short connected to the H side
AD3, AD2 are short connected to the L side,
BIO4 J6 BIO4 address AD1 and AD0 are short connected to the H
side
Each BIO board has 6 BI and 12 BO. 6 BI are divided into 2 groups, and
each of 3 BI shares a common terminal.
12 BO are divided into 4 groups, and each group can be set as whether
through the starting through jumper, with total four groups of jumpers
J11~J14. The jumper inserting into 1, 2 pin represents through starting

118
 Chapter 13 Distributed IED hardware

relay outlet, inserting into 2, 3 pin represents not through starting relay
outlet.
Table 101 BIO module retrip description 1
BIO module address
Binary output 1 and 2 pin 2 and 3 pin
definition jumper
J11 BO1~ BO3 Start Without start
J12 BO4~ BO6 Start Without start
J13 BO7~ BO9 Start Without start
J14 BO10~ BO12 Start Without start

BO12 can switch normally open or normally closed contact by JP1 jumper,
when the jumper jumps to NC side, it is normally closed contact, when the
jumper jumps to NO side, and it is normally open contact.
Table 102 BIO module retrip description 2
Jumper Binary output NC NO
Normally closed Normally opened
JP1 BO12
contact contact

BIO
1 2 3
c a
2 BO1
4 BO2
6 BO3
BINARY OUTPUT

8 BO4
10 BO5
12 BO6
14 BO7
16 BO8
18 BO9
20 BO10
22 BO11
24 BO12
26 BI4 BI1
BINARY INPUT

28 BI5 BI2
30 BI6 BI3
32 COM2 COM1

Figure 79 Diagram of BIO module terminal

119
Chapter 13 Distributed IED hardware

2.4.3 Technical data

Table 103 BI parameter

Executive
Items Data
standard
110V/125V/220V/250V DC
Rated voltage IEC 60255-1
24V/48V DC
70%Ur, rated DC 24V/48V,
Startup voltage IEC 60255-1
110V/125V/220V/250V
55%Ur, rated DC 24V/48V,
Return voltage IEC 60255-1
110V/125V/220V/250V
286V, rated DC voltage 110V/125V/220V/250V;
The maximum BI voltage IEC 60255-1
62V, rated DC voltage 24V/48V;
Maximum 0.5W/ input, 110V DC
Power consumption IEC 60255-1
Maximum 1W/ input, 220V DC

Table 104 BO parameter

Executive
Items Data
standard
Maximum work voltage IEC60255-1 250V AC
5 A continuous,
Current carrying capacity IEC60255-1
30A, 200ms On, 15s Off
1100 W(DC) inductive load L/R>40ms
Closing capacity IEC60255-1
1000VA (AC)
220V(DC), 0.15A，L/R≤40ms
Arc breaking capacity IEC60255-1
110V(AC), 0.30A, L/R≤40ms
Mechanical endurance IEC60255-1 50,000,000 times (switching frequency is 3HZ)

Opening times IEC60255-1 ≥1000 times

Closing times IEC60255-1 ≥1000 times

IEC60255-1
Authentication IEC60255-23 UL/CSA, TŰV
IEC61810-1
IEC60255-1
Contact circuit resistance IEC60255-23 30mΩ
IEC61810-1
Contact insulation test IEC60255-1
AC1000V 1min
(AC dielectric strength ) IEC60255-27
Maximum temperature
IEC60255-1 55℃
that operation allows

2.5 CPU module

2.5.1 Overview
CPU module is core of the IED and responsible, and it is responsible for
hardware self-check and communication with external devices for
information exchange of MMI, PC and so on. In addition, CPU sends
remote measure, remote control to the host and receives the contact drive
signals of the host to the sub machine.

120
 Chapter 13 Distributed IED hardware

Provides multiple configurations for user's needs, and differs from types of
plug-in components.
2.5.2 CPU module introduction
The CPU module panel has six indicators to indicate the operation status
of the board and the definition of indicator is shown as the following table.
Table 105 Definition of indicator of CPU module

Indicator serial
Indicator function Indicator state introduction
number
Indicator 1 of Flash when communicating normally while close
1 when communicating abnormally
Ethernet Plate
Indicator 2 of Flash when communicating normally while close
2 when communicating abnormally
Ethernet Plate
Indicator 3 of Flash when communicating normally while close
3 when communicating abnormally
Ethernet Plate
Flash when operating normally while close when
4 Running LED of CPU
operating abnormally
5 Spare /
6 Spare /

CPU
1 2 3
4 5 6

TX
ETH1
RX

ETH2

ETH3

Figure 80 CPU module terminal diagram

Table 106 Ethernet port configuration
Number Configuration
1 Optical interface

121
Chapter 13 Distributed IED hardware

2.6 Power supply module

2.6.1 Overview
The input of the power supply module is the working voltage of the device,
and the output is the working voltage of the other boards of the device. The
input and output circuits of the power supply module are not common,
which plays the electric isolation role. In order to improve anti-interference
ability for power supply module circuit, the power supply module is
equipped with anti-interference filter inside the device. Power supply
module provides 11 channels BI and 4 channels relay BO, and provide
reliable electric isolation.
2.6.2 Power module introduction
There is a power indicator light on the power supply panel to indicate the
state of the board, and it is often on when normal.
BI10 on the power supply module is fixed defined as "IEDRst", BO1 is
fixed defined as "IEDFaultAlarm"; BO2 is fixed defined as "RunErrAlarm".
Other BI and BO can be user-defined according to different functional
requirements by the user. Each channel of BO has two sets of contacts,
respectively corresponding to BO common port 1 and BO common port 2,
and BO relay are non retaining type.
Note: BO 1 is constant-closed contact, other BOs are constant-opened
contacts, and BO 3 and BO 4 are fixed to trip not by starting relay.

POWER
PWR
c a
2 BI7 BI1

4 BI8 BI2
BINARY INPUT

6 BI9 BI3

8 RELAY RESET BI4

10 BI11 BI5

12 BICOM BI6

14 COM2 COM1
SIGNAL CONTACT

16 FAIL 1 FAIL 2

18 ALARM 1 ALARM 2

20 BO3-1 BO3-2

22 BO4-1 BO4-2

24 IN+
POWER INPUT

26

28 IN-
30

32

Figure 81 Diagram of power supply module terminals

122
 Chapter 13 Distributed IED hardware

Table 107 Definition of power supply module terminals

Number c a
2 Binary input 7 Binary input 1
4 Binary input 8 Binary input 2
6 Binary input 9 Binary input 3
8 Device reset Binary input 4
10 Binary input 11 Binary input 5
12 BI common terminal Binary input 6
14 BO common port 2 BO common port 1
16 IED fault alarm 1 IED fault alarm 2
18 Abnormal operation alarm 1 Abnormal operation alarm 2
20 BO 3-1 BO 3-2
22 BO 4-1 BO 4-2
24 Power supply positive Power supply positive
26 Undefined Undefined
28 Negative power supply Negative power supply
30 Undefined Undefined
32 Grounding Grounding

2.6.3 Technical data

Table 108 Technical data
Item number Executive standard Data
Rated voltage Uaux IEC60255-1 110V to 250V
Input voltage error range IEC60255-1 ±%20 Uaux
Static power consumption IEC60255-1 ≤ 50W for each power module
Maximum load power
IEC60255-1 ≤ 60W for each power module
consumption

2.7 Wiring terminal

Table 109 Wiring terminal

module Terminal/wire size

2
AC module 4mm screw terminal
1.5mm2 crimp terminal
BIO module
2.5mm2 screw terminal
1.5mm2 crimp terminal
Power module
2.5mm2 screw terminal

123
Chapter 13 Distributed IED hardware

2.8 Test
Table 110 Insulation test
Items Executive standard Measurement methods
Front plate: IP54
IEC60255-27
Protection level (IP) Side panel: IP52
IEC60529
Backward plate: IP 30
2KV, 50Hz (rated voltage >63V)
tested between the following circuits:
 Power supply
 CT/VT input
IEC 60255-5
 Binary input
EN 60255-5
 Binary output
Dielectric Strength ANSI C37.90
Chassis ground 500V, 50Hz (rated
GB/T 15145-2017
voltage ≤63V)
DL/T 478-2013
Test between the following circuits:
 Communication port
 Time synchronization port
 Case earthing
5kV (rated voltage>60V) (
1kV (rated voltage≤60V)
1.2/50μs, 0.5J
IEC60255-5
Test between the following circuits:
IEC 60255-27
 Power supply
EN 60255-5
Impulse voltage  CT / VT input
ANSI C37.90
 Binary input
GB/T 15145-2017
 Binary output
DL/T 478-2013
 Communication port
 Time synchronization port
 Case earthing
IEC60255-5
IEC 60255-27
EN 60255-5
Insulation resistance ≥ 100MΩ, 500V DC
ANSI C37.90
GB/T 15145-2017
DL/T 478-2013
Earthing resistance IEC60255-27 ≤ 0.1Ω
Flame rating IEC60255-27 Level V2
Table 111 EMC test
Items Executive standard Measurement methods
IEC60255-22-1
IEC60255-26 Level III
1MHz pulse group
IEC61000-4-18 2.5kV CM;
interference test
EN 60255-22-1 1kV DM
ANSI/IEEE C37.90.1
IEC 60255-22-2 Level IV
Electrostatic discharge
IEC 61000-4-2 ±8kV electro-contact discharge;
immunity
EN 60255-22-2 ±15kV air discharge;
Level IV
Radiated electromagnetic IEC 60255-22-3
10V/m, 80MHz~1GHz,
field immunity EN 60255-22-3
1.4GHz~2.7GHz
Immunity degree of IEC 60255-22-4, Level IV

124
 Chapter 13 Distributed IED hardware

Items Executive standard Measurement methods

electrical fast transient pulse IEC 61000-4-4 Communication port: 4KV;
group EN 60255-22-4 Other ports: 2KV
ANSI/IEEE C37.90.1
Level IV
IEC 60255-22-5
Surge (impact) immunity 4.0kV CM;
IEC 61000-4-5
2.0kV DM
Frequency sweep: 150kHz – 80 MHz
Calibration frequency: 27MHz and 68
Radio frequency IEC 60255-22-6
MHz
interference test IEC 61000-4-6
10V
AM, 80%, 1kHz
Level A
Power frequency immunity
IEC60255-22-7 300V CM
test
150V DM
Class V
Power frequency magnetic
IEC 61000-4-8 100A/m greater than 30s
field immunity test
1000 A/m, 1s to 3s
Level III
100KHz pulse-group noise
IEC61000-4-18 Communication port: 2KV;
immunity
Other ports: 4KV
Damped oscillation Class V
IEC61000-4-10
magnetic field immunity test 100A/m
Pulse magnetic field Class V
IEC61000-4-9
immunity 1000A/m
Conducted emission IEC 60255-25 0.15MHz~30MHz, class A
Radiated emission IEC 60255-25 30MHz~1000MHz, class A
Table 112 Mechanical experiment
Items Executive standard Measurement methods
Sinusoidal vibration IEC60255-21-1
Grade 1
response test EN 60255-21-1
Sinusoidal vibration and IEC60255-21-1
Grade 1
endurance test EN 60255-21-1
IEC60255-21-2
Impact response test Grade 1
EN 60255-21-2
IEC60255-21-2
Impact and endurance test Grade 1
EN 60255-21-2
Collision test IEC60255-21-2 Grade 1
Aseismic test IEC60255-21-3 Grade 1
Table 113 Environmental test
Items Data
High and low temperature test -40°C to +70°C
Temperature storage test -40°C to +70°C
Maximum relative humidity 95%, no
Humidity test
condensation

125
Chapter 13 Distributed IED hardware

2.9 Structural design

Table 114 Structural design
Items Data
Dimension 4U×1/2 19 inches
Weight ≤ 9kg

2.10 CE Certification
Table 115 CE certification
Items Data
EN 61000-6-2 and EN61000-6-4 ( EMC
EMC
Steering Committee 2004/108/EC)
LVD EN 60255-27 (LVD 2006/95 EC)

126
 Chapter 14 Centralized IED hardware

Chapter 14 Centralized IED hardware

About this chapter

This chapter describes the hardware parts of central unit and
slave unit for centralized busbar differential.

127
Chapter 14 Centralized IED hardware

1 Main device hardware

1.1 Overview
1.1.1 IED structure
Height for IED crate is 4U and width is 19 inches. Entirely embedded
installation connection terminals to other system on the rear.
1) Faceplate for IED is casted by aluminum alloy and able to downward
turn. LCD, LED and setting keys are mounted on the plate. There is a
RJ45 interface on the faceplate suitable for connecting a PC.
2) Plug in or plug out the module on the backplate, module is fixed by
screw spike.
3) Module is connected through bus of backplate. IED could connect to
automatic system through rear interface on the backplate.
482.6 465.1±0.2
465.1 450
+0.3
0

4-?
6.5
+0.3
101.6

101.6
178 0
177

447.1
426.7
263
281.4

236.5

Figure 82 Installation size diagram (unit mm)

1.1.2 Module arrangement diagram

Figure 83 IED backplate module layout diagram

128
 Chapter 14 Centralized IED hardware

1.2 Analog input module

1.2.1 Overview
AC module contains voltage and current transformers. The module
converts two-side current and voltage to processable signal for IED data
acquisition system and serves as electrical isolation. IED in different type
shall be with different current and voltage transformers. The module is
optional according to different project requirements.
1.2.2 Analog input module introduction
The following figure shows the terminal diagram of the AC plug-in,
supporting the access of 6 and 3 channels of current.
Protection current channel supports 1A or rated 5A current access, and
each current channel provides 3 wiring terminals. The terminal
identification without ' suffix is shared inlet positive terminal, while that with'
suffix is the outlet negative terminal. For example, the use of rated 1A of Ia
should access the current from the Ia terminal to the I1a_1’ terminal and
I1a_5 ' terminal is suspended; the use of rated 5A should access the
current from the Ia terminal to Ia_5' and Ia_1' terminal is suspended; the
wiring principle of other protection type of current channels is same.

AC
b a
1 I1a_1' I1a

2 I1b_5' I1a_5'

3 I1b_1' I1b

4 I1c_1' I1c

5 I2a_5' I1c_5'

6 I2a_1' I2a

7 I2b_1' I2b

8 I2c_5' I2b_5'

9 I2c_1' I2c

10 Ua' Ua

11 Ub' Ub

12 Uc' Uc

Figure 84 AC module terminal diagram

129
Chapter 14 Centralized IED hardware

1.2.3 Technical parameter

Table 116 Current transformer parameter
Items Implementation Data
standards
Rated current IEC 60255-1 1A or 5A
Sampling range for Protection CT is 0.05 In to 40
conventional current In, while measurement CT is
transformer 0.05 In to 1.2 In.
Power consumption (each ≤0.2VA when In=1A;
phase) ≤0.5VA when In=5A;
Thermal overload capacity of IEC 60255-1 100I, overload 1s
conventional current IEC 60255-27 Continuous 4 Ir
transformer
Table 117 Voltage transformer parameter
Items Implementation Data
standards
Rated voltage Vr IEC 60255-1 100V/110V
(phase-to-phase voltage)
Sampling range
0.4V~180V
(phase-to-earth voltage)
Power consumption (Vr = 110 IEC 60255-27 ≤ 0.1 5VA each phase
V) DL/T 478-2013
Thermal overload capacity IEC 60255-27 400V, overload 60s
(phase voltage) DL/T 478-2013 200V, continuous

1.3 Man-machine interface (MMI) and operation

1.3.1 Liquid crystal display (LCD)
The LCD back light of HMI is blue, 9 lines can be displayed. When
operating Sifang key or IED issuing alarm or trip report, background blue
light automatically lights up. Soon after the latest trip or alarm, background
blue light dies out after 5 minutes of time setting.
1.3.2 Man-machine interface (MMI)
MMI is man-machine interface. LCD screen displays the device running
information, such as measured value for current and voltage, connector
state and BI, BO and bay signal line diagram.
If there is no key operation, the MMI main cycle interface shows part of
device information in a cycle way. User could press “ESC” to lock current
display, and press “ESC” again to restore circulation display.
The description of faceplate area is as follow: zone one is for the
user-defined indicator light area; zone two is for the key area of the control
function; zone three is for the debugging of net port; zone four is for the
key district of the basic key.

130
 Chapter 14 Centralized IED hardware

Figure 85 MMI module schematic diagram

The customized indicator light area consists of 24 lights, where the
position of running lights and alarm light are fixed, and the functions of
other 22 lamps can carry out the configuration of light color, light property
according to the needs of the user; in key areas, there is indicator light
indicating device state on each of the remote, local and blocking key
respectively.
RUN: When running indicator light, the green light is lightened during the
normal operation, while the running light is off if there is an alarm of class
1.
ALARM: alarm indicator light, the device alarm lightens the red light.
The faceplate uses the Ethernet port to connect PC and device, which
supports setting device parameter, measuring function, downloading
programs and analyzing data. The debugging IP address of Ethernet port
is 192.178.111.221 which is unchangeable.
The key includes basic key and control functional key. Basic keys are on
the right of the screen and control functional keys are below the screen to
realize human-computer interaction. Keys for IED of CSC series contain
the same appearance and operation mode, for details in the table as
follow.

131
Chapter 14 Centralized IED hardware

Table 118 IED MMI key

Key Function
 Move up in the menu
 Page up between screens
 Add setting
 Move down in the menu
 Page down among screens to reduce setting.

Move left in the menu

Move right in the menu

 Reset LED light

 Directly back to normal circulation display interface

 Entering main menu or sub-menu

 Confirm that you want to change the settings.

 Back to up one level

 Exiting and revising setting
 Back to circulation display interface
 Lock or unlock circulation display interface (when
locking, top right corner of LCD displays a small key)
 Value adds 1
+ 

Page down
Logic switch shift from the present value to the opposite value;
namely "1" to "0", or "0" to "1"
 Value minus 1
- 

Page up
Logic switch shift from the present value to the opposite value;
namely "1" to "0", or "0" to "1"

F1 F2  User-defined function key

 The shortcuts for menu options are able to set to relate with
menu items to execute functions of this menu.
F3 F4  as the input signal to participate in logic

 Switching to remote operation mode, earthing control shall be

blocked. Switching to earthing control mode, remote operation
shall be blocked.
 It is used for locking and unlocking control key and
user-defined key so as to prevent mistakenly touching.

 Breaker closes

 Breaker opens

1.3.3 Menu structure

Through the MMI key, you can enter the IED menu, view information or

132
 Chapter 14 Centralized IED hardware

perform related operations. Due to the differences in the function of

various type of IED, the following lists show the maximum menu
configuration; the value of related setting information and various type of
IED is on the basis of actual display.
Table 119 Device menu
L1 menu L2 menu L3 menu L4 menu Description
Primary Read the measure input
Analog value primary-value of the IED
quantity Secondary Read the measure input
value second-value of the IED
Read the analog input of the
Analog input
IED
Binary input Read the binary input of the IED
Read binary input state of
Central unit
central unit
Read binary input state of bay
Bay unit 1
unit 1
Read binary input state of bay
Bay unit 2
unit 2
Binary input Read binary input state of bay
Bay unit 3
unit 3
Read binary input state of bay
Bay unit 4
unit 4
GOOSE
Read the original binary input
original
state of GOOSE
IED State binary input
Read binary output state of
Central unit
central unit
Read binary input state of bay
Bay unit 1
unit 1
View Read binary input state of bay
Binary output Bay unit 2
informatio unit 2
n Read binary input state of bay
Bay unit 3
unit 3
Read binary input state of bay
Bay unit 4
unit 4
Goose
ReadGOOSEsubscribe
subscriptio
information
n state
GOOSE state
GOOSE
ReadGOOSE publishing
publication
information
state
Read state information of the
State monitor
IED
Alarm Read the current alarm
information information
Common Read common setting of
setting protection
Differential Read setting of differential
setting protection
Bus coupler Read setting of bus coupler
View setting setting protection
Circuit break Read setting of circuit breaker
failure setting failure protection
Dead zone Read setting of dead zone
setting protection
Overcurrent Read setting of overcurrent

133
Chapter 14 Centralized IED hardware

L1 menu L2 menu L3 menu L4 menu Description

setting protection
Equipment Read the equipment
parameter parameters
Function Read the function connector
connector information
GOOSE Read connector state
Connector publishing soft information of GOOSE
state connector publishing
GOOSE
ReadGOOSEsubscribe
subscription
connector information
soft connector
IED
identification Read the unique code of IED
code
Version
Read the version information of
information IED version
IED
Check code of Read the check code of virtual
virtual terminal terminal
Time
Read the synchronization mode
synchronizatio
of IED
n mode
Set IED Set Read the Ethernet information
Communicatio Ethernet of IED
n parameter IED
Read IED address
address
Function
Set function connector state
connector
GOOSE
Set state information of
Enable/Disable publishing soft
GOOSE publishing
Running connector connector
operation GOOSE
ReadGOOSE subscribe
subscription
connector state
soft connector
Switch setting Switch present operation
group setting group
General report Read general report
Startup report Read the startup report
Trip report Read the trip report
Alarm report Read the alarm report
Operation
Read the operation report
report
Binary input
View Read the BI change report
change report
report
Startup
disturbance Startup disturbance and fault
and fault record shown in list
record list
Trip
disturbance Trip disturbance and fault
and fault record shown in list
record list
Protection
Setting the ProtSet
setting
Write
Copy setting
setting Copy setting of setting group
group
Equipment Substation Set substation name. It uses
parameter name Unicode encoding, with a

134
 Chapter 14 Centralized IED hardware

L1 menu L2 menu L3 menu L4 menu Description

maximum input of 24
characters.
Set the protected equipment
Protection
name. It uses Unicode
equipment
encoding, with a maximum
name
input of 24 characters.
Equipment
Set equipment parameters
parameter
Test all binary Test the binary output nodes of
Binary output outputs the whole device
test GOOSE binary
Test GOOSE signal
output
Protection
function alarm
check
Trip report
check
GOOSE alarm
Communicatio check
Binary input Test communication signal
n check
check
MST alarm
check
Connector
check
Analog check
LED Test Test LED light
Manually
controlled
Manual triggering to generate
disturbance
fault and disturbance record
and fault
record
Test menu View zero drift
View scale
Adjust zero
drift
Factory test Adjust scale
Physical binary View the binary input state of
input the central unit module
Physical binary Test the binary output contact
output of the central unit module
Protection
setting
Soft connector
Analog
quantity
Sampling
value
Print Binary Print various information
IED State
input output
Connector
state
Version
information
Startup
Report
report

135
Chapter 14 Centralized IED hardware

L1 menu L2 menu L3 menu L4 menu Description

Trip report
Alarm
report
Operation
report
Binary
input
change
report
Set IED
Modify clock Set time
Time
synchronizatio Choose synchronization mode
n mode
Set Network
synchronizatio Set SNTP address
n IP
Set time zone Set the local time zone
Set
Set time daylight-savin
g time in
Mode 1
sequence of
The two
year, month,
modes cannot
Daylight saving day
be enabled
time Set
simultaneousl
daylight-savin
y
g time in
Mode 2
sequence of
month, week,
hour
Set IED
Set the Ethernet information of
Set Ethernet
IED
IED address Set IED address
Set serial
port 1
Set serial
Communicatio Set serial port Set serial port parameters
port 2
n parameter Set serial
port 3
Protocol
Set the protocol information
setting
Set PRP
IED name
Set password Set IED password
Contrast Set the contrast
Set Other Set report parameters and the
mode that sending
Display mode
primary-secondary value to
SCADA
Confirm
Chinese
switching
Set Confirm
English Switch language
Language switching
Confirm
Russian
switching
Click the key in the recycle main interface, the menu tree will be

136
 Chapter 14 Centralized IED hardware

shown in the MMI interface; click the key or to select menu items,
when the cursor stays in the corresponding menu item, if there is a symbol
"" behind this menu item, it can click the key or to enter the next
menu; if there is no signal "", it can click the key to enter the menu
items.

SIFANG 2017-10-01 21:30:15

AnMlog 
AnMlogInpt
IEDStMte
VieRSet  BI 
ConStMte BO 
VerInfo  GoStMte 
ViewInfo  IEDSet  StMteMon
Operate  AlMrmInfo
ViewRpt 
WriteSet 
TestMen 
IE5Set 
Language

tresentSetDrpNo.: 1

Figure 86 Menu tree diagram

1.4 BI modules
1.4.1 Overview
The BI and BO of the hardware of binary input and output module include
two types of soldering: 1) Strong power level, self-adapting 110V, 220V,
125V, 250V and 2) low power voltage level, adaptive 24V and 48V. Work
rated power source of device BI is modified by configuration file before
applying.
1.4.2 BI Module description
There are three indicator lights on the BI faceplate to show the status of
the board, the indicator light definition is shown in the following table.
Table 120 Definition of BI module indicator light
The serial
Introduction of indicator
number of Indicator light function
light state
indicator light
Light is on when device is
1 Power supply light
energized
2 Running light Flash when work properly
3 Spare Off
Due to the different location of the slot, the BI module can be set at
different address of module, and the address is set through the jumper J6.
Take the side away from single board as L side, the side near single board
as H side, from bottom to top are AD0, AD1, AD2 and AD3.
Table 121 BI module address definition
Slot location Jumper Control content Jumper settings
AD3~AD1 are short
connected to the L side, AD0
BI2 J6 BI address 2
is short connected to the H
side

137
Chapter 14 Centralized IED hardware

AD3~AD0 are short

connected to the L side
BI3 J6 BI address 3
AD1~AD0 are short
connected to the H side

28 binary inputs are divided into 4 groups, common terminal of all groups
are independent from each other.

BI
1 2 3 LED
c a
2 BI14 BI1
4 BI15 BI2
6 BI16 BI3
8 BI17 BI4
10 BI18 BI5

BINARY INPUT
12 BI19 BI6
14 BI20 BI7
16 BI21 BI8
18 BI22 BI9
20 BI23 BI10
22 BI24 BI11
24 BI25 BI12
26 BI26 BI13
28 COM2 COM1
30 BI28 BI27
32 COM4 COM3

Figure 87 BI module terminal diagram

1.4.3 Technical parameter

Table 122 BI parameter

Implementation
Items Data
standards
110V/125V/220V/250V DC
Rated voltage IEC 60255-1
24V/48V DC
Startup voltage IEC 60255-1 70%Ur, rated DC 24V/48V, 110V/125V/220V/250V
Return voltage IEC 60255-1 55%Ur, rated DC 24V/48V, 110V/125V/220V/250V
The maximum 286V, rated DC voltage 110V/125V/220V/250V
IEC 60255-1
BI voltage 62V, rated DC voltage 24V/48V;
Power Maximum 0.5W/input, 110V DC
IEC 60255-1
consumption Maximum 1W/input, 220V DC

1.5 BO modules
1.5.1 Introduction
Module provides certain of protection tripping and closing circuit breaker
control and realizes telecontrol opening or closing of isolator. Some
channels could be switched to normally open or closed contact.

138
 Chapter 14 Centralized IED hardware

1.5.2 BO module description

There are three indicator lights on the BO faceplate to show the status of
the board, the indicator light definition is shown in the following table.
Table 123 Definition of BO module indicator light
The serial
Introduction of
number of Indicator light function
indicator light state
indicator light
Light is on when device
1 Power supply light
is energized
Flash when work
2 Running light
properly
3 Spare Off
Due to the different location of the slot, the BO module can be set at
different address of module, and the address is set through the jumper J7.
Take the side away from single board as L side, the side near single board
as H side, from bottom to top are AD0, AD1, AD2 and AD3.
Table 124 BO module address definition
Slot
Jumper Control content Jumper settings
location
J7 BO2 address AD3~AD1 are short connected to the L side, AD0
BO2
is short connected to the H side
AD3、AD2、AD0 are short connected to the L
BO3 J7 BO3 address side,
AD1 is short connected to the L side
Each binary input and output board has 16 binary outputs. 16 binary
outputs are divided into 5 groups, each group can be set as startup
blocking or not startup blocking by changing the jumper position, there are
total four groups of jumpers J1~J5. The jumper inserting into 1, 2 pin
represents that binary output is blocked by startup relay, inserting into 2, 3
pin represents that binary output is unblocked by startup relay.
Table 125 Description 1 for jumper of binary input and output module
The
definition
of address
jumper of
Binary output 1 and 2 pin 2 and 3 pin
binary
input and
output
module
J1 BO1~ BO3 Startup blocking Not startup blocking
J2 BO4~ BO6 Startup blocking Not startup blocking
J3 BO7~ BO9 Startup blocking Not startup blocking
J4 BO10~ BO12 Startup blocking Not startup blocking
J5 BO13~ BO16 Startup blocking Not startup blocking

BO16 can switch to normally open or normally closed contacts. J30 is

normally open when trip to A, and normally closed when trip to B.

139
Chapter 14 Centralized IED hardware

BO
1 2 3 LED
c a
2 BO1
4 BO2
6 BO3
8 BO4
10 BO5

BINARY OUTPUT
12 BO6
14 BO7
16 BO8
18 BO9
20 BO10
22 BO11
24 BO12
26 BO13
28 BO14
30 BO15
32 BO16

Figure 88 BO module terminal diagram

1.5.3 Technical parameter
Table 126 BO parameter
Items Implementation Data
standards
Maximum work voltage IEC60255-1 250V AC
Impact overcurrent capacity IEC60255-1 5 A continuous,
30A, 200ms ON, 15s OFF
Closing capacity IEC60255-1 1100 W( ) at inductive load L/R>40 ms
1000VA (AC)
Arc breaking capacity IEC60255-1 220V , 0.15A，L/R≤40ms
110V , 0.30A，L/R≤40ms

Electrical life IEC60255-1 50,000,000 times (switching frequency is

3HZ)
Opening times IEC60255-1 ≥1000
Closing times IEC60255-1 ≥1000
Authentication IEC60255-1 UL/CSA, TŰV
IEC60255-23
IEC61810-1
Contact circuit resistance IEC60255-1 30mΩ
IEC60255-23
IEC61810-1
Contact insulation test (AC IEC60255-1 AC1000V 1min
dielectric strength ) IEC60255-27
Maximum temperature
IEC60255-1 55℃
operation allows

140
 Chapter 14 Centralized IED hardware

1.6 Binary input and output module

The same as Chapter 13 2.4.

1.7 CPU module

1.7.1 Overview
CPU module is core of the IED and responsible for running all protection
logic, hardware self-check and device communication for external devices
such as MMI, PC, measurement, substation automatic system, working
station, RTU, printers and so on. Besides, CPU module sends telemetry,
telesignalisation, SOE, event report and recorded wave to backstage, it
provides time synchronization and communication port.
CPU module provides multiple configuration for user's need. Differences
lie in quantities for Ethernet port, optical/electric port, time synchronization
mode, storage capacity and so on.

1.7.2 CPU moduleintroduction

The CPU module faceplate has six indication light to indicate the operation
state of the board and the definition of indication light is shown as follow
table.
Table 127 Definition of indication light of CPU module
The serial
number of Indicator light function Introduction of indicator light state
indicator light
Faceplate Ethernet 1 Flash when communicating normally while close
1
indicator light when communicating abnormally
Faceplate Ethernet 2 Flash when communicating normally while close
2
indicator light when communicating abnormally
Faceplate Ethernet 3 Flash when communicating normally while close
3
indicator light when communicating abnormally
Flash when operating normally while close when
4 Running LED of CPU
operating abnormally
Flash when operating normally while close when
5 Running LED of CPU
operating abnormally
6 Spare /

141
Chapter 14 Centralized IED hardware

CPU1 CPU1
1 2 3 1 2 3
4 5 6 4 5 6

TX TX TX
ETH1 ETH11 ETH1 ETH11
RX RX RX

TX TX TX
ETH2 ETH12 ETH2 ETH12
RX RX RX

TX TX
ETH13 ETH13
ETH3 RX ETH3 RX

TX TX
ETH14 ETH14
RX RX

PULSE - 1 PULSE - 1
PULSE + 2 PULSE + 2
PULSE-GND 3 PULSE-GND 3

Figure 89 CPU1 module terminal diagram

142
 Chapter 14 Centralized IED hardware

CPU2 CPU2
1 2 3 1 2 3
4 5 6 4 5 6

TX TX TX
ETH1 ETH11 ETH1 ETH11
RX RX RX

TX TX TX
ETH2 ETH12 ETH2 ETH12
RX RX RX

TX TX
ETH13 ETH13
ETH3 RX ETH3 RX

TX TX
ETH14 ETH14
RX RX

RS485-1A 1 RS485-1A 1
RS485-1B 2 RS485-1B 2
RS485-1GND 3 RS485-1GND 3
4 4
RS485-2A 5 RS485-2A 5
RS485-2B 6 RS485-2B 6
RS485-2GND 7 RS485-2GND 7
8 8
RS232-TXD 9 RS232-TXD 9
RS232-RXD 10 RS232-RXD 10
RS232-GND 11 RS232-GND 11

Figure 90 CPU2 module terminal diagram

Table 128 Definition of CPU terminal1

Terminals Definition
01 PULSE-
02 PULSE+
03 PULSE-GND
Ethernet port 1 SFP Ethernet port / RJ45 ports
Ethernet port 2 SFP Ethernet port / RJ45 ports
Ethernet port 3 RJ45 port
Ethernet port SFP optical Ethernet port
11
Ethernet port SFP optical Ethernet port
12
Ethernet port SFP optical Ethernet port
13
Ethernet port SFP optical Ethernet port
14

143
Chapter 14 Centralized IED hardware

Table 129 Definition of CPU terminal2

Terminals Definition
01 RS 485-1A
02 RS485-1B
03 RS485-1GND
04
05 RS485-2A
06 RS485-2B
07 RS485-2GND
08
09 RS232-TXD
10 RS232-RXD
11 RS232-GND
Ethernet port 1 SFP Ethernet port / RJ45 ports
Ethernet port 2 SFP Ethernet port / RJ45 ports
Ethernet port 3 RJ45 port
Ethernet port SFP optical Ethernet port
11
Ethernet port SFP optical Ethernet port
12
Ethernet port SFP optical Ethernet port
13
Ethernet port SFP optical Ethernet port
14
Table 130 Net port configuration
Number Configuration
RJ45 electrical port+RJ45 electrical port+RJ45
1
electrical port
2 Optical port+optical port+RJ45 electrical port

1.7.3 Technical parameter

Table 131 RS485 communication port
Items Data
Quantity 2
Extract twisted pair. On the bottom plate of
Port type
CPU2 module
Maximum transmission distance 1.0km
Voltage withstand test 500V earthing AC voltage
Used for protocol IEC60870-5-103
Default setting 9600bps;
Transmission rate
Minimum: 1200bps; maximum: 19200bps
Table 132 Ethernet communication port
Items Data
Ethernet port
Quantity 7
RJ45 or optical Ethernet port. There are 3 on
Port type
the bottom plate of CPU1 module and 4 on

144
 Chapter 14 Centralized IED hardware

Items Data
the top of the CPU module.
Maximum transmission distance 100m
Used for IEC61850 Protocol
Transmission rate 100Mbit/s
Used for protocol IEC60870-5-103
Transmission rate 100Mbit/s
Table 133 Time synchronization
Items Data
Synchronization mode IRIG-B time synchronization
IRIG-B signal format IRIG-B000
Twisted-pair connection. On the bottom plate
Port type
of CPU1 module
Voltage level Differential signal input

1.8 Power supply module

The same as Chapter 13 2.6.

1.9 Wire connection terminal

Table 134 Wire connection terminal
The module Terminal/wire size
Alternating current module 4 mm2 screw terminal
1.5mm2 crimp terminal
BI/BO module
2.5 mm2 screw terminal
1.5mm2 crimp terminal
Power supply module
2.5 mm2 screw terminal

1.10 Test
Table 135 Insulation test
Item number Implementation Data
standards
Overvoltage level IEC60255-27 Class III
Interference degree IEC60255-27 Degree 2
Insulation IEC60255-27 Basic insulation
Protection level (IP) IEC60255-27 Faceplate IP 40
IEC 60529 Top and bottom of baseplate: IP 30
Insulation IEC 60255-5 2KV, 50Hz 2.8kV
withstanding EN 60255-5 tested between the following circuits:
ANSI C37.90  Power BI
GB/T 15145-2017  CT / VT input
DL/T 478-2013  Binary input
 Binary output
 Earthing
500V, 50Hz
Test between the following circuits:
 Communication port to earth
 Time synchronization port earthing
Impulse voltage test IEC60255-5 Ui≥63V5kV (1.2/50μs, 0.5J)

145
Chapter 14 Centralized IED hardware

Item number Implementation Data

standards
IEC 60255-27 Ui<63V1kV
EN 60255-5 tested between the following circuits:
ANSI C37.90 Circuit:
GB/T 15145-2017  Power BI
DL/T 478-2013  CT / VT input
 Binary input
 Binary output
 Earthing
Note Ui: Rated voltage
Insulation resistance IEC60255-5 ≥ 100MΩ 500V
IEC 60255-27
EN 60255-5
ANSI C37.90
GB/T 15145-2017
DL/T 478-2013
Earthing resistance IEC60255-27 ≤ 0.1Ω
fireproof grade IEC60255-27 Class V2

Table 136 EMC test

Item number Implementation Data
standards
1MHz pulse group IEC60255-22-1
interference test IEC60255-26 Class III
IEC61000-4-18 2.5kV CM;
EN 60255-22-1 1kV，DM
ANSI/IEEE C37.90.1
Immunity degree of IEC 60255-22-2 Class IV
electrostatic discharge IEC 61000-4-2 ±8kV electro-contact discharge;
EN 60255-22-2 15kV air discharge;
Radiated electromagnetic IEC 60255-22-3 IV class;
field immunity EN 60255-22-3 10V/m、80MHz~1GHz、
1.4GHz~2.7GHz
Electrical fast transient IEC 60255-22-4,
Class IV
immunity IEC 61000-4-4
Communication port: 4KV
EN 60255-22-4
ANSI/IEEE C37.90.1 Other ports: 2KV
Surge (impact) immunity IEC 60255-22-5 Class IV
IEC 61000-4-5 4.0kV，CM；
2.0kV，DM
Radio frequency IEC 60255-22-6 Frequency scanning: 150kHz–
interference test IEC 61000-4-6 80MHz
Calibration frequency: 27MHz and
68MHz
10V
AM,80%,1kHz
Power frequency immunity IEC60255-22-7 Class A
test 300V，CM
150V，DM
Power frequency magnetic IEC 6 1000-4-8 Class V
field immunity test 100A/m>30s

146
 Chapter 14 Centralized IED hardware

Item number Implementation Data

standards
1000A/m，1s 到 3s
100KHz pulse-group noise IEC61000-4-18 Class III
immunity Communication port: 2KV
Other ports: 4KV
Damped oscillation Class V
IEC61000-4-10
magnetic field immunity 100A/m
Pulse magnetic field Class V
IEC61000-4-9
immunity test 1000A/m
Conducted emission IEC 60255-25 0.15MHz~30MHz，class A
Radiated emission IEC 60255-25 30MHz~1000MHz，class A
Table 137 Mechanical experiment
Item number Implementation Data
standards
Sinusoidal vibration IEC60255-21-1
Class 1
response test EN 60255-21-1
Sinusoidal vibration and IEC60255-21-1
Class 1
endurance test EN 60255-21-1
Impact response test IEC60255-21-2
Class 1
EN 60255-21-2
Impact and endurance test IEC60255-21-2
Class 1
EN 60255-21-2
Collision test IEC60255-21-2 Class 1
Seismic experiment IEC60255-21-3 Class 1
Table 138 Environmental test
Items Data
High and low temperature test -40°C to +70°C
Temperature storage test -40°C to +70°C
Humidity test Relative humidity is 95%

1.11 Structural design

Table 139 Structural design
Items Data
Dimension 4U 19 inches
Weight ≤ 15kg

1.12 CE Certificate
Table 140 CE Certificate
Items Data
EN 61000-6-2 and EN61000-6-4 ( EMC
EMC
Steering Committee 2004/108/EC)
LVD EN 60255-27 (LVD 2006/95 EC)

147
Chapter 14 Centralized IED hardware

2 Slave unit hardware

2.1 Overview
2.1.1 IED structure
Height for IED crate is 4U and width is 19 inches. Entirely embedded
installation connection terminals to other system on the rear.
1) Faceplate for IED is casted by aluminum alloy and able to downward
turn. Supporting PC connections
2) Plug in or plug out the module on the backplate, module is fixed by
screw spike.
3) Module is connected through bus of backplate. IED could connect to
automatic system through rear interface on the backplate.
482.6 465.1±0.2
465.1 +0.3
450 0

4-?
6.5
+0.3
101.6

101.6
178 0
177

447.1
426.7
263
281.4

236.5

Figure 91 Diagram of installation size (unit mm)

2.1.2 Module arrangement diagram

Figure 92 IED backplate module layout diagram

2.2 Analog input module

2.2.1 Overview
AC module contains voltage and current transformers. The module
converts two-side current and voltage to processable signal for IED data

148
 Chapter 14 Centralized IED hardware

acquisition system and serves as electrical isolation. IED in different type

shall be with different current and voltage transformers. The module is
optional according to different project requirements.
2.2.2 Analog input module introduction
The following figure shows the terminal diagram of the AC plug-in,
supporting the access of 6 channels of current.
Protection current channel supports 1A or rated 5A current access, and
each current channel provides 3 wiring terminals. The terminal
identification without ' suffix is shared inlet positive terminal, while that with'
suffix is the outlet negative terminal. For example, the use of rated 1A of Ia
should access the current from the Ia terminal to the I1a_1’ terminal and
I1a_5 ' terminal is suspended; the use of rated 5A should access the
current from the Ia terminal to Ia_5' and Ia_1' terminal is suspended; the
wiring principle of other protection type of current channels is same.

AC
b a
1 I1a_1' I1a

2 I1b_5' I1a_5'

3 I1b_1' I1b

4 I1c_1' I1c

5 I2a_5' I1c_5'

6 I2a_1' I2a

7 I2b_1' I2b

8 I2c_5' I2b_5'

9 I2c_1' I2c

10

11

12

Figure 93 AC module terminal diagram

2.2.3 Technical parameter

Table 141 Current transformer parameter
Items Implementation Data
standards
Rated current IEC 60255-1 1A or 5A
Sampling range for Protection CT is 0.05 In to 40
conventional current In, while measurement CT is
transformer 0.05 In to 1.2 In.
Power consumption (each ≤0.2VA when In=1A;
phase) ≤0.5VA when In=5A;
Thermal overload capacity of IEC 60255-1 100I, overload 1s
conventional current IEC 60255-27 Continuous 4 Ir

149
Chapter 14 Centralized IED hardware

transformer

Table 142 Voltage transformer parameter

Items Implementation Data
standards
Rated voltage Vr IEC 60255-1 100V/110V
(phase-to-phase voltage)
Sampling range
0.4V~180V
(phase-to-earth voltage)
Power consumption (Vr = 110 IEC 60255-27 ≤ 0.1 5VA each phase
V) DL/T 478-2013
Thermal overload capacity IEC 60255-27 400V, overload 60s
(phase voltage) DL/T 478-2013 200V, continuous

2.3 Man-machine interface (MMI) and operation

N/A.

2.4 BI modules
The same as the this chapter 1.3

2.5 BO modules
The same as the this chapter 1.4

2.6 Binary input and output module

The same as Chapter 13 2.4.

2.7 CPU module

2.7.1 Overview
CPU module is core of the IED and responsible for running all protection
logic, hardware self-check and communication and information exchanges
for external devices such as PC measurement, substation automatic
system, working station, RTU, printers and so on. CPU module supports
time synchronization and communication port.
IED provides multiple configuration for user's need. Differences lie in
quantities for Ethernet port, optical/electric port, time synchronization
mode, storage capacity, thickness of module and so on.
2.7.2 CPU module terminal diagram
The CPU module faceplate has six indication light to indicate the operation
state of the board and the definition of indication light is shown as follow
table.
Table 143 Definition of indication light of CPU module

The serial number of Indicator light

Introduction of indicator light state
indicator light function
Faceplate Ethernet 1 Flash when communicating normally while
1
indicator light close when communicating abnormally
Faceplate Ethernet 2 Flash when communicating normally while
2 close when communicating abnormally
indicator light

150
 Chapter 14 Centralized IED hardware

The serial number of Indicator light

Introduction of indicator light state
indicator light function
Faceplate Ethernet 3 Flash when communicating normally while
3 close when communicating abnormally
indicator light
Flash when operating normally while close
4 Running LED of CPU
when operating abnormally

5 Spare /

6 Spare /

CPU
1 2 3
4 5 6

TX
ETH1
RX

TX
ETH2
RX

ETH3

Figure 94 CPU module terminal diagram

Table 144 CPU terminal definition
Terminals Definition
Ethernet port 1 SFP optical Ethernet port
Ethernet port 2 SFP optical Ethernet port (Spare)
Ethernet port 3 RJ 45 port (spare)

151
Chapter 14 Centralized IED hardware

2.8 Power supply module

The same as Chapter 13 2.6.

2.9 Wire connection terminal

Table 145 Wire connection terminal
The module Terminal/wire size
Alternating current module 4 mm2 screw terminal
1.5mm2 crimp terminal
BI/BO module
2.5 mm2 screw terminal
1.5mm2 crimp terminal
Power supply module
2.5 mm2 screw terminal

2.10 Test
Table 146 Insulation test
Item number Implementation Data
standards
Overvoltage level IEC60255-27 Class III
Interference degree IEC60255-27 Degree 2
Insulation IEC60255-27 Basic insulation
Protection level (IP) IEC60255-27 Faceplate IP 40
IEC 60529 Top and bottom of baseplate: IP 30
Insulation IEC 60255-5 2KV, 50Hz 2.8kV
withstanding EN 60255-5 tested between the following circuits:
ANSI C37.90  Power BI
GB/T 15145-2017  CT / VT input
DL/T 478-2013  Binary input
 Binary output
 Earthing
500V, 50Hz
Test between the following circuits:
 Communication port to earth
 Time synchronization port earthing
Impulse voltage test IEC60255-5 Ui≥63V5kV (1.2/50μs, 0.5J)
IEC 60255-27 Ui<63V1kV
EN 60255-5 tested between the following circuits:
ANSI C37.90 Circuit:
GB/T 15145-20017  Power BI
DL/T 478-2013  CT / VT input
 Binary input
 Binary output
 Earthing
Note Ui: Rated voltage
Insulation resistance IEC60255-5 ≥ 100 MΩ500 V
IEC 60255-27
EN 60255-5
ANSI C37.90
GB/T 15145-2017
DL/T 478-2013
Earthing resistance IEC60255-27 ≤ 0.1Ω
fireproof grade IEC60255-27 Class V2

152
 Chapter 14 Centralized IED hardware

Table 147 EMC test

Item number Implementation Data
standards
1MHz pulse group IEC60255-22-1
interference test IEC60255-26 Class III
IEC61000-4-18 2.5kV, CM;
EN 60255-22-1 1kV, DM
ANSI/IEEE C37.90.1
Immunity degree of IEC 60255-22-2 Class IV
electrostatic discharge IEC 61000-4-2 ±8kV electro-contact discharge;
EN 60255-22-2 15kV air discharge;
Radiated IEC 60255-22-3
IV class;
electromagnetic field EN 60255-22-3
10V/m, 80MHz~1GHz, 1.4GHz~2.7GHz
immunity
Electrical fast transient IEC 60255-22-4
Class IV
immunity IEC 61000-4-4
Communication port: 4KV
EN 60255-22-4
Other ports: 2KV
ANSI/IEEE C37.90.1
Surge (impact) immunity IEC 60255-22-5 Class IV
IEC 61000-4-5 4.0kV, CM;
2.0kV, DM
Radio frequency IEC 60255-22-6 Frequency scanning: 150kHz–80MHz
interference test IEC 61000-4-6 Calibration frequency: 27MHz and
68MHz
10V
AM,80%,1kHz
Power frequency IEC60255-22-7 Class A
immunity test 300V, CM
150V, DM
Power frequency IEC 6 1000-4-8 Class V
magnetic field immunity 100A / m 大于 30s
test 1000A/m, from 1s to 3s
100KHz pulse-group IEC61000-4-18 Class III
noise immunity Communication port: 2KV
Other ports: 4KV
Damped oscillation Class V
IEC61000-4-10
magnetic field immunity 100A/m
Pulse magnetic field Class V
IEC61000-4-9
immunity test 1000A/m
Conducted emission IEC 60255-25 0.15MHz~30MHz, class A
Radiated emission IEC 60255-25 30MHz~1000MHz, class A

153
Chapter 14 Centralized IED hardware

Table 148 Mechanical experiment

Item number Implementation Data
standards
Sinusoidal vibration IEC60255-21-1
Class 1
response test EN 60255-21-1
Sinusoidal vibration and IEC60255-21-1
Class 1
endurance test EN 60255-21-1
Impact response test IEC60255-21-2
Class 1
EN 60255-21-2
Impact and endurance test IEC60255-21-2
Class 1
EN 60255-21-2
Collision test IEC60255-21-2 Class 1
Seismic experiment IEC60255-21-3 Class 1
Table 149 Environmental test
Items Data
High and low temperature test -40°C to +70°C
Temperature storage test -40°C to +70°C
Humidity test Relative humidity is 95%

2.11 Structural design

Table 150 Structural design
Items Data
Dimension 4U 19 inches
Weight ≤ 15kg

2.12 CE Certificate
Table 151 CE Certificate
Items Data
EN 61000-6-2 and EN61000-6-4 ( EMC
EMC
Steering Committee 2004/108/EC)
LVD EN 60255-27 (LVD 2006/95 EC)

154
 Chapter 15 Appendix

Chapter 15 Appendix

155
Chapter 15 Appendix

1 Setting list
Table 152 IED parameter

Number Name Range Unit Default Remark

1. VTPriPPVolt 0~1500 kV 220
2. VTSecPPVolt 0~1000 V 100
3. CTReferencePriVal 0~10000 A 1000
4. CTReferenceSecVal 1~5 A 1
5. Bay1_CT1PriVal 0~10000 A 1000
6. Bay1_CT1SecVal 1~5 A 1
7. Bay1_CT2PriVal 0~10000 A 1000
8. Bay1_CT2SecVal 1~5 A 1
9. Bay2_CT1PriVal 0~10000 A 1000
10. Bay2_CT1SecVal 1~5 A 1
11. Bay2_CT2PriVal 0~10000 A 1000
12. Bay2_CT2SecVal 1~5 A 1
13. Bay3_CTPriVal 0~10000 A 1000
14. Bay3_CTSecVal 1~5 A 1
15. Bay4_CTPriVal 0~10000 A 1000
16. Bay4_CTSecVal 1~5 A 1
17. Bay5_CTPriVal 0~10000 A 1000
18. Bay5_CTSecVal 1~5 A 1
19. Bay6_CTPriVal 0~10000 A 1000
20. Bay6_CTSecVal 1~5 A 1
21. Bay7_CTPriVal 0~10000 A 1000
22. Bay7_CTSecVal 1~5 A 1
23. Bay8_CTPriVal 0~10000 A 1000
24. Bay8_CTSecVal 1~5 A 1
25. Bay9_CTPriVal 0~10000 A 1000
26. Bay9_CTSecVal 1~5 A 1
27. Bay10_CTPriVal 0~10000 A 1000
28. Bay10_CTSecVal 1~5 A 1
29. Bay11_CTPriVal 0~10000 A 1000
30. Bay11_CTSecVal 1~5 A 1
31. Bay12_CTPriVal 0~10000 A 1000
32. Bay12_CTSecVal 1~5 A 1
33. Bay13_CTPriVal 0~10000 A 1000
34. Bay13_CTSecVal 1~5 A 1
35. Bay14_CTPriVal 0~10000 A 1000
36. Bay14_CTSecVal 1~5 A 1

156
 Chapter 15 Appendix

Number Name Range Unit Default Remark

37. Bay15_CTPriVal 0~10000 A 1000
38. Bay15_CTSecVal 1~5 A 1
39. Bay16_CTPriVal 0~10000 A 1000
40. Bay16_CTSecVal 1~5 A 1
41. Bay17_CTPriVal 0~10000 A 1000
42. Bay17_CTSecVal 1~5 A 1
43. Bay18_CTPriVal 0~10000 A 1000
44. Bay18_CTSecVal 1~5 A 1
45. Bay19_CTPriVal 0~10000 A 1000
46. Bay19_CTSecVal 1~5 A 1
47. Bay20_CTPriVal 0~10000 A 1000
48. Bay20_CTSecVal 1~5 A 1
49. Bay21_CTPriVal 0~10000 A 1000
50. Bay21_CTSecVal 1~5 A 1
51. Bay22_CTPriVal 0~10000 A 1000
52. Bay22_CTSecVal 1~5 A 1
53. Bay23_CTPriVal 0~10000 A 1000
54. Bay23_CTSecVal 1~5 A 1
55. Bay24_CTPriVal 0~10000 A 1000
56. Bay24_CTSecVal 1~5 A 1
57. Bay25_CTPriVal 0~10000 A 1000
58. Bay25_CTSecVal 1~5 A 1
59. Bay26_CTPriVal 0~10000 A 1000
60. Bay26_CTSecVal 1~5 A 1
61. Bay27_CTPriVal 0~10000 A 1000
62. Bay27_CTSecVal 1~5 A 1
63. Bay28_CTPriVal 0~10000 A 1000
64. Bay28_CTSecVal 1~5 A 1
65. Bay29_CTPriVal 0~10000 A 1000
66. Bay29_CTSecVal 1~5 A 1
67. Bay30_CTPriVal 0~10000 A 1000
68. Bay30_CTSecVal 1~5 A 1
69. Bay31_CTPriVal 0~10000 A 1000
70. Bay31_CTSecVal 1~5 A 1
71. Bay32_CTPriVal 0~10000 A 1000
72. Bay32_CTSecVal 1~5 A 1
73. Bay33_CTPriVal 0~10000 A 1000
74. Bay33_CTSecVal 1~5 A 1

157
Chapter 15 Appendix

Number Name Range Unit Default Remark

75. Bay34_CTPriVal 0~10000 A 1000
76. Bay34_CTSecVal 1~5 A 1
77. Bay35_CTPriVal 0~10000 A 1000
78. Bay35_CTSecVal 1~5 A 1
79. Bay36_CTPriVal 0~10000 A 1000
80. Bay36_CTSecVal 1~5 A 1
81. Bay37_CTPriVal 0~10000 A 1000
82. Bay37_CTSecVal 1~5 A 1
83. Bay38_CTPriVal 0~10000 A 1000
84. Bay38_CTSecVal 1~5 A 1
85. Bay39_CTPriVal 0~10000 A 1000
86. Bay39_CTSecVal 1~5 A 1
87. Bay40_CTPriVal 0~10000 A 1000
88. Bay40_CTSecVal 1~5 A 1
89. BISwitchSetGrp 0/1 0

Note: distributed bus differential supports 40 bays, centralized bus

differential support 28 bays.
Table 153 Enable/disable single busbar section of logic switch
Num Default
Logic switch description Setting Mode Remark
ber value

1. Bay 3 On busbar 1 0/1 0

2. Bay 4 On busbar 1 0/1 0

3. Bay 5 On busbar 1 0/1 0

4. Bay 6 On busbar 1 0/1 0

5. Bay 7 On busbar 1 0/1 0

6. Bay 8 On busbar 1 0/1 0

7. Bay 9 On busbar 1 0/1 0

8. Bay 10 On busbar 1 0/1 0

9. Bay 11 On busbar 1 0/1 0

10. Bay 12 On busbar 1 0/1 0

11. Bay 13 On busbar 1 0/1 0

12. Bay 14 On busbar 1 0/1 0

13. Bay 15 On busbar 1 0/1 0

14. Bay 16 On busbar 1 0/1 0

15. Bay 17 On busbar 1 0/1 0

16. Bay 18 On busbar 1 0/1 0

17. Bay 19 On busbar 1 0/1 0

18. Bay 20 On busbar 1 0/1 0

19. Bay 21 On busbar 1 0/1 0

158
 Chapter 15 Appendix

Num Default
Logic switch description Setting Mode Remark
ber value

20. Bay 22 On busbar 1 0/1 0

21. Bay 23 On busbar 1 0/1 0

22. Bay 24 On busbar 1 0/1 0

23. Bay 25 On busbar 1 0/1 0

24. Bay 26 On busbar 1 0/1 0

25. Bay 27 On busbar 1 0/1 0

26. Bay 28 On busbar 1 0/1 0

27. Bay 29 On busbar 1 0/1 0

28. Bay 30 On busbar 1 0/1 0

29. Bay 31 On busbar 1 0/1 0

30. Bay 32 On busbar 1 0/1 0

31. Bay 33 On busbar 1 0/1 0

32. Bay 34 On busbar 1 0/1 0

33. Bay 35 On busbar 1 0/1 0

34. Bay 36 On busbar 1 0/1 0

35. Bay 37 On busbar 1 0/1 0

36. Bay 38 On busbar 1 0/1 0

37. Bay 39 On busbar 1 0/1 0

38. Bay 40 On busbar 1 0/1 0

Note: distributed bus differential supports 40 bays, centralized bus differential

support 28 bays.

2 Report list
About operation report and protection alarm report; please see the report
list in the protection chapter.

2.1 Alarm report

IED contains alarm reports shown as below:
1) Alarm I belongs to IED fault alarm. When alarm I happens, the alarm
LED on the front panel of the IED will flash, and running LED on the
front panel of the IED will go off. All of protection function will be out of
service and the trip power of protection will be blocked by the IED.
2) Alarm II belongs to running error alarm. When alarm II happens, the
alarm LED on the front panel of the IED will flash. Alarm II won't block
the trip power of protection.

159
Chapter 15 Appendix

Table 154 Alarm report list of Class I

Number Report name Alarm code Description

1 SampleValErr 32769

2 IEDParmErr 32770

3 ROMSumChkErr 32771

4 SetErr 32772 Need to rewrite setting

5 UnconfirmConnMode 32773

6 SoftConnErr 32774

7 SystemCfgErr 32775

8 SampleErr 32776
9 IED CPUModuleErr 32778

10 SetGrpPointerErr 32780

11 LogicFileErr 32798 Need to reload sf、esdc file

12 CfgFileErr 35769

13 CfgFileInconsist 35770

14 IOMatrixErr 35771 Need to reload sf、esdc file

The setting of binary output
module jumper is not consistent
15 BOChkNoResponse 33769
with the software configuration,
and the jumper should be reset.
16 BOBreakdown 33770

17 BIBreakdown 33784

18 BIO CPUErr 33789

19 BIO ROMSumErr 33790

The module of BI and BO is
20 BIO EEPROMErr 32779
unmarked, please remark it.
21 BIOCfgErr 32777

22 BISelfChkCircuitErr 33787

23 BOLatchedPropertyCfgErr 33793
You need to confirm the module
address jumper, module should be
24 BICommInterrupt 33781
plugged tightly, and confirm that
the program of BI is correct.
You need to confirm the module
address jumper, module should be
25 BOCommInterrupt 33782
plugged tightly, and confirm that
the program of BI is correct.

160
 Chapter 15 Appendix

Table 155 Alarm report list of class II

Number Alarm report Alarm code Description

1 SRAMSelfChkErr 33771

2 TestStateNotRst 33772

3 OperFail 33773

4 CanCommInterrupt 33775

5 FLASHSelfChkErr 33776

6 WorkInTestSetGrp 33783

7 BIInputErr 33785

8 DualPosnInputIncosist 33786

9 BIOInputPowerErr 33788

2.2 Operation report

Table 156 System operation report list

Number Report Alarm code

1. SwitchSetGrpSuccess 32769
2. CopySetGrpSuccess 32789
3. WriteIEDSetSuccess 32770
4. WriteParmSuccess 32771
5. WriteCfgSuccess 32772
6. AdjScaleSuccess 32773
7. AdjAngleSuccess 32788
8. HardConnOn/OffSuccess 32774
9. SoftConnOn/OffSuccess 32775
10. ClearCfg 32776
11. IEDRst(CPUReboot) 32778
12. FactoryRst 32779
13. BOTestSuccess 32780
14. ZeroDriftAdjSuccess 32782
15. ClearAllRptSuccess 32783
16. MaintModeOn 32785
17. MaintModeOff 32786
18. AutoRebootAfterCfg 32868

161
Chapter 15 Appendix

2.3 Explanation of abbreviations

2.3.1 Explanation of setting abbreviations
Table 157 Explanation of setting abbreviations

Abbreviations Explanation
DiffCurrThreshold Differential current threshold
RestrCoef Restraint coefficient
UVBlkDiffSet Setting of undervoltage blocking differential
3U0BlkDiffSet Setting of zero sequence voltage blocking differential
3U2BlkDiffSet Setting of negative sequence voltage blocking differential
BC DZ CTDisconnTime CT disconnection time of bus coupler dead zone
UVBlkCBFSet Blocking circuit breaker failure setting of undervoltage
3U0BlkCBFSet Blocking circuit breaker failure setting of zero sequence voltage
3U2BlkCBFSet Blocking circuit breaker failure setting of negative sequence voltage
BaynCBF OCSet Circuit breaker failure overcurrent setting of bay n
BaynCBF3I0Set Circuit breaker failure zero sequence current setting of bay n
BaynCBF3I2Set Circuit breaker failure negative sequence current setting of bay n
BaynCBFRetripTime Circuit breaker failure retrip time of bay n
BaynCBFTripBusTime Circuit breaker failure trip busbar time of bay n
BaynCBF BIMonitorTime Circuit breaker failure binary input monitor time of bay n
BCOCStage1CurrSet Current setting of bus coupler overcurrent stage 1
BC OCSatge1Time Time of bus coupler overcurrent stage 1
BCOCStage2CurrSet Current setting of bus coupler overcurrent stage 2
BC OCSatge2Time Time of bus coupler overcurrent stage 2
BC3I0Stage1CurrSet Current setting of bus coupler zero sequence current stage 1
BC3I0Satge1Time Time of bus coupler zero sequence current stage 1
BC3I0Stage2CurrSet Current setting of bus coupler zero sequence current stage 2
BC3I0Satge2Time Time of bus coupler zero sequence current stage 2
BCFailCurrSet Current setting of bus coupler circuit breaker failure
BCFailRetripTime Retrip time of bus coupler circuit breaker failure
BCFailTripBusTime Bus coupler circuit breaker failure trip busbar time
BCFailMonitorTime Monitoring time of bus coupler circuit breaker failure
BC DZ CTDisconnTime CT disconnection time of bus coupler dead zone
BaynOCCurrSet Overcurrent protection current setting of bay n
BaynOCTime Overcurrent protection time setting of bay n
BaynDZCurrSet Dead zone current setting of bay n
BaynDZTripTime Dead zone trip time of bay n
BaynDZ3I0Set Dead zone zero sequence current setting of bay n
BaynDZ3I2Set Dead zone negative sequence current setting of bay n
BaynDZ BIMonitorTime Dead zone binary input monitor time of bay n
BC CTFailAlarmCurrSet Current setting of bus coupler CT failure alarm
BC CTFailBlkCurrSet Current setting of bus coupler CT failure blocking
BayCTFailAlarmCurrSet Current setting of bay CT failure alarm
BayCTFailBlkCurrSet Current setting of bay CT failure blocking
BC CTFailAlarmTime Time of bus coupler CT failure alarm
BC CTFailBlkTime Time of bus coupler CT failure blocking
BayCTFailAlarmTime Time of bay CT failure alarm
BayCTFailBlkTime Time of bay CT failure blocking

162
 Chapter 15 Appendix

Abbreviations Explanation
Bus1VTFailPEVolt Phase-to-earth voltage setting of busbar 1 VT failure
Bus2VTFailPEVolt Phase-to-earth voltage setting of busbar 2 VT failure
Bus3VTFailPEVolt Phase-to-earth voltage setting of busbar 3 VT failure
Bus1VTFailPPVoltSet Phase-to-phase voltage setting of busbar 1 VT failure
Bus2VTFailPPVoltSet Phase-to-phase voltage setting of busbar 2 VT failure
Bus3VTFailPPVoltSet Phase-to-phase voltage setting of busbar 3 VT failure
Bus1VTFailNormalVolt Normal voltage setting of busbar 1 VT failure
Bus2VTFailNormalVolt Normal voltage setting of busbar 2 VT failure
Bus3VTFailNormalVolt Normal voltage setting of busbar 3 VT failure
Bus1VTFailAlarmTime Alarm time of busbar 1 VT failure
Bus2VTFailAlarmTime Alarm time of busbar 2 VT failure
Bus3VTFailAlarmTime Alarm time of busbar 3 VT failure
VTPriPPVolt VT primary phase-to-phase voltage
VTSecPPVolt VT secondary phase-to-phase voltage
CTReferencePriVal Reference primary value of CT
CTReferenceSecVal Reference secondary value of CT
Bay1CT1PriVal CT 1 primary value of bay 1
Bay1CT1SeccondayVal CT 1 secondary value of bay 1
Bay1CT2PriVal CT 2 primary value of bay 1
Bay1CT2SeccondayVal CT 2 secondary value of bay 1
Bay2CT1PriVal CT 1 primary value of bay 2
Bay2CT1SeccondayVal CT 1 secondary value of bay 2
Bay2CT2PriVal CT 2 primary value of bay 2
Bay2CT2SeccondayVal CT 2 secondary value of bay 2
Bay3 CTPriVal CT primary value of bay 3
Bay3 CTSecVal CT secondary value of bay 3
Bay4 CTPriVal CT primary value of bay 4
Bay4 CTSecVal CT secondary value of bay 4
Bay5 CTPriVal CT primary value of bay 5
Bay5 CTSecVal CT secondary value of bay 5
Bay6 CTPriVal CT primary value of bay 6
Bay6 CTSecVal CT secondary value of bay 6
Bay7 CTPriVal CT primary value of bay 7
Bay7 CTSecVal CT secondary value of bay 7
Bay8 CTPriVal CT primary value of bay 8
Bay8 CTSecVal CT secondary value of bay 8
Bay9 CTPriVal CT primary value of bay 9
Bay9 CTSecVal CT secondary value of bay 9
Bay10 CTPriVal CT primary value of bay 10
Bay10 CTSecVal CT secondary value of bay 10
Bay11 CTPriVal CT primary value of bay 11
Bay11 CTSecVal CT secondary value of bay 11
Bay12 CTPriVal CT primary value of bay 12
Bay12 CTSecVal CT secondary value of bay 12
Bay13 CTPriVal CT primary value of bay 13
Bay13 CTSecVal CT secondary value of bay 13
Bay14 CTPriVal CT primary value of bay 14
Bay14 CTSecVal CT secondary value of bay 14

163
Chapter 15 Appendix

Abbreviations Explanation
Bay15 CTPriVal CT primary value of bay 15
Bay15 CTSecVal CT secondary value of bay 15
Bay16 CTPriVal CT primary value of bay 16
Bay16 CTSecVal CT secondary value of bay 16
Bay17 CTPriVal CT primary value of bay 17
Bay17 CTSecVal CT secondary value of bay 17
Bay18 CTPriVal CT primary value of bay 18
Bay18 CTSecVal CT secondary value of bay 18
Bay19 CTPriVal CT primary value of bay 19
Bay19 CTSecVal CT secondary value of bay 19
Bay20 CTPriVal CT primary value of bay 20
Bay20 CTSecVal CT secondary value of bay 20
Bay21 CTPriVal CT primary value of bay 21
Bay21 CTSecVal CT secondary value of bay 21
Bay22 CTPriVal CT primary value of bay 22
Bay22 CTSecVal CT secondary value of bay 22
Bay23 CTPriVal CT primary value of bay 23
Bay23 CTSecVal CT secondary value of bay 23
Bay24 CTPriVal CT primary value of bay 24
Bay24 CTSecVal CT secondary value of bay 24
Bay25 CTPriVal CT primary value of bay 25
Bay25 CTSecVal CT secondary value of bay 25
Bay26 CTPriVal CT primary value of bay 26
Bay26 CTSecVal CT secondary value of bay 26
Bay27 CTPriVal CT primary value of bay 27
Bay27 CTSecVal CT secondary value of bay 27
Bay28 CTPriVal CT primary value of bay 28
Bay28 CTSecVal CT secondary value of bay 28
Bay29 CTPriVal CT primary value of bay 29
Bay29 CTSecVal CT secondary value of bay 29
Bay30 CTPriVal CT primary value of bay 30
Bay30 CTSecVal CT secondary value of bay 30
Bay31 CTPriVal CT primary value of bay 31
Bay31 CTSecVal CT secondary value of bay 31
Bay32 CTPriVal CT primary value of bay 32
Bay32 CTSecVal CT secondary value of bay 32
Bay33 CTPriVal CT primary value of bay 33
Bay33 CTSecVal CT secondary value of bay 33
Bay34 CTPriVal CT primary value of bay 34
Bay34 CTSecVal CT secondary value of bay 34
Bay35 CTPriVal CT primary value of bay 35
Bay35 CTSecVal CT secondary value of bay 35
Bay36 CTPriVal CT primary value of bay 36
Bay36 CTSecVal CT secondary value of bay 36
Bay37 CTPriVal CT primary value of bay 37
Bay37 CTSecVal CT secondary value of bay 37
Bay38 CTPriVal CT primary value of bay 38
Bay38 CTSecVal CT secondary value of bay 38

164
 Chapter 15 Appendix

Abbreviations Explanation
Bay39 CTPriVal CT primary value of bay 39
Bay39 CTSecVal CT secondary value of bay 39
Bay40 CTPriVal CT primary value of bay 40
Bay40 CTSecVal CT secondary value of bay 40
BISwitchSetGrp Binary input switches setting group

2.3.2 Explanation of logic switch abbreviations

Table 158 Explanation of logic switch abbreviations

Abbreviations Explanations
DiffLS Logic switch of differential protection
VoltBlkDiffLS Logic switch of voltage blocking differential
BC DZ LS Logic switch of bus coupler dead zone protection
IsoErrAlarmOnly Alarm only of Isolator error
BC BUFaultBlkDiff Bay unit fault of bus coupler blocking differential
VoltBlkCBF LS Logic switch of voltage blocking circuit breaker failure
BaynCBF LS Logic switch of circuit breaker failure of bay n
Logic switch of circuit breaker failure zero/negative sequence
BaynCBF3I0/I2DetectLS detection of bay n
BaynCBFTripExtrBIOn Enable circuit breaker failure trip of external binary input of bay n
CT2MainCTOfBypassBus CT2 is main CT of bypass bus
BC OC LS Logic switch of bus coupler overcurrent protection
BC OCStage1LS Logic switch of bus coupler overcurrent stage 1
BC OCStage2LS Logic switch of bus coupler overcurrent stage 2
BC3I0Stage1LS Logic switch of bus coupler zero sequence current stage 1
BC3I0Stage2LS Logic switch of bus coupler zero sequence current stage 2
CT2MainCTOfBC CT2 is main CT of busbar coupler
BCFailLS Logic switch of bus coupler circuit breaker failure
DiffInitBCFailLS Logic switch of Differential initiating bus coupler circuit breaker failure
OCInitBCFailLS Logic switch of overcurrent initiating bus coupler failure
ExtrInitBCFailLS Logic switch of external initiating bus coupler circuit breaker failure
Bay1CBFTripExtrBIOn Enable circuit breaker failure trip of external binary input of bay 1
CT2MainCTOfBC CT2 is main CT of busbar coupler
BaynOC LS Bay n overcurrent protection logic switch
BaynDZProtLS Logic switch of dead zone protection of bay n
BaynDZ3I0/I2DetectLS Logic switch of dead zone zero/negative sequence detection of bay n
BC CTFailAlarmLS Logic switch of bus coupler CT failure alarm
BC CTFailBlkLS Logic switch of bus coupler CT failure blocking
BayCTFailBlkLS Logic switch of bay CT failure blocking
BayCTFailAlarmLS Logic switch of bay CT failure alarm
Bus1VTFailAlarmOn Enable alarm of busbar 1 VT failure
Bus2VTFailAlarmOn Enable alarm of busbar 2 VT failure
Bus3VTFailAlarmOn Enable alarm of busbar 3 VT failure
Bus1VTNutrEarth VT neutral point earthing of busbar 1
Bus2VTNutrEarth VT neutral point earthing of busbar 2
Bus3VTNutrEarth VT neutral point earthing of busbar 3
BISwitchSetGrp Binary input switches setting group

165
 Chapter 15 Appendix

2.3.3 Explanation of trip report and alarm report

Table 159 Explanation of trip report and alarm report

Abbreviations Explanation
BUn NetACommInterrupt Network A communication interruption of bay unit n
BUn NetBCommInterrupt Network B communication interruption of bay unit n
BUn NetAAddrErr Network A address error of bay unit n
BUn NetBAddrErr Network B address error of bay unit n
BUCommInterrupt Communication interruption of bay unit
DiffStartup Startup of differential protection
Bus1DiffTrip-PhA Differential trip of busbar 1 - phase A
Bus1DiffTrip-PhB Differential trip of busbar 1 - phase B
Bus1DiffTrip-PhC Differential trip of busbar 1 - phase C
Bus2DiffTrip-PhA Differential trip of busbar 2 - phase A
Bus2DiffTrip-PhB Differential trip of busbar 2 - phase B
Bus2DiffTrip-PhC Differential trip of busbar 2 - phase C
Bus3DiffTrip-PhA Differential trip of busbar 3 - phase A
Bus3DiffTrip-PhB Differential trip of busbar 3 - phase B
Bus3DiffTrip-PhC Differential trip of busbar 3 - phase C
ExtrBITripBus1 External binary input trip busbar 1
ExtrBITripBus2 External binary input trip busbar 2
ExtrBITripBus3 External binary input trip busbar 3
BlkBus1 Blocking busbar 1
BlkBus2 Blocking busbar 2
BlkBus3 Blocking busbar 3
VoltUnblkBus1Diff Voltage unblocking busbar 1 differential
VoltUnblkBus2Diff Voltage unblocking busbar 2 differential
VoltUnblkBus3Diff Voltage unblocking busbar 3 differential
NoIsoPosnInput No isolator position input
Bus1-2Tied Busbar 1-2 tied
Bus2-3Tied Busbar 2-3 tied
Bus1-3Tied Busbar 1-3 tied
Bus1-2-3Tied Busbar 1-2-3 tied
Bus1IsoPosnErr Isolator position error of busbar 1
Bus2IsoPosnErr Isolator position error of busbar 2
Bus3IsoPosnErr Isolator position error of busbar 3
CB PD Circuit breaker position discrepancy
NoCBPosnInput No circuit breaker position input
CTRatioOverLmt CT ratio is overlimit
CBFProtStartup Startup of circuit breaker failure protection
BaynCBFRetrip Circuit breaker failure retrip of bay n
Bus1CBFTrip Circuit breaker failure trip of busbar 1
Bus2CBFTrip Circuit breaker failure trip of busbar 2
ExtrCBFTripBus1 External circuit breaker failure binary input trip busbar 1
ExtrCBFTripBus2 External circuit breaker failure binary input trip busbar 2
BaynCBF BIAlarm Circuit breaker failure binary input alarm of bay n
VoltUnblkBus1CBF Voltage unblocking busbar 1 circuit breaker failure
VoltUnblkBus2CBF Voltage unblocking busbar 2 circuit breaker failure
BC OCTripOn Startup of bus coupler overcurrent protection

166
 Chapter 15 Appendix

Abbreviations Explanation
OCStage1PhATrip Phase A trip of bus coupler overcurrent stage 1
OCStage1PhBTrip Phase B trip of bus coupler overcurrent stage 1
OCStage1PhCTrip Phase C trip of bus coupler overcurrent stage 1
OCStage2PhATrip Phase A trip of bus coupler overcurrent stage 2
OCStage2PhBTrip Phase B trip of bus coupler overcurrent stage 2
OCStage2PhCTrip Phase C trip of bus coupler overcurrent stage 2
BC3I0Stage1Trip Trip of bus coupler zero sequence current stage 1
BC3I0Stage2Trip Trip of bus coupler zero sequence current stage 2
BCFailStartup Startup of busbar coupler circuit breaker failure
BCFailRetrip Bus coupler circuit breaker failure retrip
BCFailTrip Bus coupler circuit breaker failure trip
BCInitCBFErr Bus coupler startup circuit breaker failure is abnormal
BaynOCStartup Startup of overcurrent protection of bay n
BaynOCTrip-PhA Overcurrent protection trip phase A of bay n
BaynOCTrip-PhB Overcurrent protection trip phase B of bay n
BaynOCTrip-PhC Overcurrent protection trip phase C of bay n
OCOrDZSetErr Overcurrent or dead zone setting error
BaynDZProtStartup Dead zone protection startup of bay n
BaynDZTrip Dead zone protection trip of bay n
BaynDZ BIAlarm Binary input alarm of bay n dead zone
CTFailBlkBus1-PhA CT failure blocking busbar 1 - phase A
CTFailBlkBus1-PhB CT failure blocking busbar 1 - phase B
CTFailBlkBus1-PhC CT failure blocking busbar 1 - phase C
CTFailBlkBus2-PhA CT failure blocking busbar 2 - phase A
CTFailBlkBus2-PhB CT failure blocking busbar 2 - phase B
CTFailBlkBus2-PhC CT failure blocking busbar 2 - phase C
CTFailBlkBus3-PhA CT failure blocking busbar 3 - phase A
CTFailBlkBus3-PhB CT failure blocking busbar 3 - phase B
CTFailBlkBus3-PhC CT failure blocking busbar 3 - phase C
CTFailAlarm-PhA CT failure alarm - phase A
CTFailAlarm-PhB CT failure alarm - phase B
CTFailAlarm-PhC CT failure alarm - phase C
BC1PhA CTFailAlarm CT failure alarm of bus coupler 1 - phase A
BC2PhA CTFailAlarm CT failure alarm of bus coupler 2 - phase A
BC3PhA CTFailAlarm CT failure alarm of bus coupler 3 - phase A
BC1PhB CTFailAlarm CT failure alarm of bus coupler 1 - phase B
BC2PhB CTFailAlarm CT failure alarm of bus coupler 2 - phase B
BC3PhB CTFailAlarm CT failure alarm of bus coupler 3 - phase B
BC1PhC CTFailAlarm CT failure alarm of bus coupler 1 - phase C
BC2PhC CTFailAlarm CT failure alarm of bus coupler 2 - phase C
BC3PhC CTFailAlarm CT failure alarm of bus coupler 3 - phase C
BC1CTFailBlkPhA CT failure blocking of bus coupler 1 - phase A
BC2CTFailBlkPhA CT failure blocking of bus coupler 2 - phase A
BC3CTFailBlkPhA CT failure blocking of bus coupler 3 - phase A
BC1CTFailBlkPhB CT failure blocking of bus coupler 1 - phase B
BC2CTFailBlkPhB CT failure blocking of bus coupler 2 - phase B
BC3CTFailBlkPhB CT failure blocking of bus coupler 3 - phase B
BC1CTFailBlkPhC CT failure blocking of bus coupler 1 - phase C

167
 Chapter 15 Appendix

Abbreviations Explanation
BC2CTFailBlkPhC CT failure blocking of bus coupler 2 - phase C
BC3CTFailBlkPhC CT failure blocking of bus coupler 3 - phase C
Bus1VTFail VT failure of busbar 1
Bus2VTFail VT failure of busbar 2
Bus3VTFail VT failure of busbar 3
SampleValErr Error of sampling value
IEDParmErr Error of IED parameter
ROMSumChkErr Error of ROM sum check
SetErr Error of setting
UnconfirmConnMode Unconfirmed connector mode
SoftConnErr Error of soft connector
SystemCfgErr Error of system configuration
IED CPUModuleErr Error of IED CPU module
SetGrpPointerErr Error of setting group pointer
LogicFileErr Error of logic file
CfgFileErr Error of configuration file
CfgFileInconsist Configured files are inconsistent
IOMatrixErr Error of IOMatrix
SRAMSelfChkErr Self-check error of SRAM
TestStateNotRst Test state is not reset
OperFail Operate unsuccessfully
CanCommInterrupt Can communication is interrupted
FLASHSelfChkErr Self-check error of FLASH
WorkInTestSetGrp Work in test setting group
SVINNetASampleLinkErr Sampling link error of SVIN network A
SVINNetBSampleLinkErr Sampling link error of SVIN network B
SVINNetAMsgLostFrame Message lost frame of SVIN network A
SVINNetBMsgLostFrame Message lost frame of SVIN network B
SVINNetARcvCfgErr Receiving configuration error of SVIN network A
SVINNetBRcvCfgErr Receiving configuration error of SVIN network B
SVINNetADelayOverLmt Delay overlimit of SVIN network A
SVINNetBDelayOverLmt Delay overlimit of SVIN network B
GOCBNetACommInterrupt Communication interruption of GOCB network A
GOCBNetBCommInterrupt Communication interruption of GOCB network B
GOCBNetARcvCfgErr Receiving configuration error of GOCB network A
GOCBNetBRcvCfgErr Receiving configuration error of GOCB network B
SVINNetARcvCorrFrameNo. Correctly received frame number of SVIN network A
SVINNetBRcvCorrFrameNo. Correctly received frame number of SVIN network B
SVINNetAAbandonFrameNo. Abandoned frame number of SVIN network A
SVINNetBAbandonFrameNo. Abandoned frame number of SVIN network B
SVINNetAMACAddrErrTimes MAC address error times of SVIN network A
SVINNetBMACAddrErrTimes MAC address error times of SVIN network B
SVINNetASVIDErrTimes SVID error times of SVIN network A
SVINNetBSVIDErrTimes SVID error times of SVIN network B
SVINNetAChanQtyErrTimes Channel quantity error times of SVIN network A
SVINNetBChanQtyErrTimes Channel quantity error times of SVIN network B
SVINNetACfgVerErrTimes Configuration version error times of SVIN network A
SVINNetBCfgVerErrTimes Configuration version error times of SVIN network B

168
 Chapter 15 Appendix

Abbreviations Explanation
SVINNetADelayOverLmtTimes Delay overlimit times of SVIN network A
SVINNetBDelayOverLmtTimes Delay overlimit times of SVIN network B
SVINNetALostFrameTimes Lost frame times of SVIN network A
SVINNetBLostFrameTimes Lost frame times of SVIN network B
GOCBNetARcvCorrFrameNo. Correctly received frame number of GOCB network A
GOCBNetBRcvCorrFrameNo. Correctly received frame number of GOCB network B
GOCBNetAAbandonFrameNo. Abandoned frame number of GOCB network A
GOCBNetBAbandonFrameNo. Abandoned frame number of GOCB network B
GOCBNetAMACAddrErrTimes MAC address error times of GOCB network A
GOCBNetBMACAddrErrTimes MAC address error times of GOCB network B
GOCBNetAGOCBErrTimes GOCB error times of GOCB network A
GOCBNetBGOCBErrTimes GOCB error times of GOCB network B
GOCBNetADATASETErrTimes DATASET error times of GOCB network A
GOCBNetBDATASETErrTimes DATASET error times of GOCB network B
GOCBNetAGOIDErrTimes GOID error times of GOCB network A
GOCBNetBGOIDErrTimes GOID error times of GOCB network B
GOCBNetAMbrQtyErrTimes Member quantity error times of GOCB network A
GOCBNetBMbrQtyErrTimes Member quantity error times of GOCB network B
GOCBNetADataTypeErrTimes Data type error times of GOCB network A
GOCBNetBDataTypeErrTimes Data type error times of GOCB network B
GOCBNetACfgVerErrTimes Configuration version error times of GOCB network A
GOCBNetBCfgVerErrTimes Configuration version error times of GOCB network B

2.3.4 Explanation of operation report abbreviations

Table 160 Explanation of operation report abbreviations

Abbreviations Explanation

SwitchSetGrpSuccess Switch setting group successfully

WriteIEDSetSuccess Write IED setting successfully
WriteParmSuccess Write equipement parameter successfully
WriteCfgSuccess Write configuration successfully
AdjScaleSuccess Adjust scale successfully
HardConnOn/OffSuccess Enable/disable hard connector successfully
SoftConnOn/OffSuccess Enable/disable soft connector successfully
ClearCfg Clear configuration
IEDRst(CPUReboot) IED reset (CPU reboot)
FactoryRst Factory reset
BOTestSuccess Binary output test successfully
ZeroDriftAdjSuccess Zero drift adjustment successfully
ClearAllRptSuccess Clear all report successfully
MaintModeOn Enable check mode
MaintModeOff Disable maintenance mode
AutoRebootAfterCfg Automatic reboot after configuration

169
Chapter 15 Appendix

2.3.5 Explanation of device menu abbreviations

Table 161 Explanation of device menu abbreviations

Abbreviations Explanation
AdjScale Adjust scale
AdjZeroDrift Adjust zero drift
AlarmInfo Alarm information
AlarmRpt Alarm report
Analog Analog input
AnalogChk Analog check
BI BI
BIChangeRpt BI change report
BIChk Binary input check
BIO Binary input and output
BO BO
BOTest Binary output test
BU0 Bay unit 0
BU1~10 > Bay unit 1~Bay unit 10
BU11~20 > Bay unit 11~Bay unit 20
BU21~30 Bay unit 21~Bay unit 30
BU31~40 > Bay unit 31~Bay unit 40
BusCouSet Bus coupler setting
Calc Analog
CBFSet Circuit break failure setting
CHN Chinese
CommChk Communication check
CommonSet Common setting
CommParm Communication parameter
ConChk Connector check
Confirm Confirm switch
ConOn/Off Enable/Disable connector
ConState Connector state
Contrast Contrast
ConventionalBI Conventional BI
ConventionalBO Conventional BO
CU Central unit
DeadZoneSet Dead zone setting
DiffSet Differential setting
DisplayMode Display mode
DMAlarm DM alarm
DMAlarmChk DM alarm test
DST Daylight saving time
ENG English
EquipParm Equipment parameter
EthernetSet Ethernet setting
FactoryTest Factory debugging
FnAlarmChk Protection function alarm check
FunctionCon Function connector

170
 Chapter 15 Appendix

Abbreviations Explanation
GOAlarmChk GO alarm check
GOOriginBI GOOSE original binary input
GOOSE BO GOOSE binary output
GOOSEPubSoftCon GOOSE publishing soft connector
GOOSEPubState GOOSE publication state
GOOSESubSoftCon GOOSE subscription soft connector
GOOSESubState Goose subscription state
GOState GO state
GrpCopy Zone copy
IED IDCode IED identification code
IEDSet IED set
IEDState Protection state
IEDVer IED version
Language Language set
LEDTest LED Test
ManualRcd Manual disturbance and fault record
Mode1 Mode 1
Mode2 Mode 2
MSTAlarmChk MST alarm test
NetTimeSyncIPSet Network synchronization IP setting
OCSet Overcurrent setting
Operate Running operation
OperationRpt Operation report
OtherSet Other setting
Password Set password
PriVal Primary value
ProtEquipName Protection equipment name
ProtocolSet Protocol setting
ProtSet Protection setting
RUS Russian
SecVal Secondary value
Serial1Set Serial port 1 set
Serial2Set Serial port 2 set
Serial3Set Serial port 3 set
SerialSet Serial port setting
SetClock Set clock
StartupDFRList Startup disturbance and fault record list
StartupRpt Startup report
StateMon State monitor
SubstationName Substation name
SwitchSetGrp Switch setting group
SyncMode Time synchronization mode
TestMenu Debugging menu
TimeSet Time set
TimeZone Time zone setting
TripDFRList Trip disturbance and fault record list
TripRepChk Trip report check
TripRpt Trip report

171
Chapter 15 Appendix

Abbreviations Explanation
VerInfo Version information
ViewInfo Information view
ViewRpt View report
ViewScale View scale
ViewSet View setting
ViewZeroDrift View zero drift
VrtlTrmlChkCode VT check code
WriteSet Write

172