UNIT-4

REGISTER ORGANIZATION IN COMPUTER ORGANIZATION:

1.Explain about the working of General Register Organization on cpu?

General register :
A register is made up of flip-flops. In the CPU (Central Processing Unit), a
register is a one-of-a-kind, high-speed storage region. Combinational
circuits are used to implement data processing. Before processing, the data is
always defined in a register. Program implementation is faster thanks to the
registers.
The following are two essential functions implemented by registers in CPU
operation:
1. It can be used as a temporary data store site. This allows directly
implementing applications to have quick access to data when needed.
2. It can record the CPU's condition and information about the currently
executing programme.
The registers save the address of the next programme instruction,
signals from external devices, error messages, and various data.
If a CPU has some registers, these registers can be linked by a shared bus.
The below image depicts the general organization of seven CPU registers.

The control unit is in charge of the CPU bus system. The control unit
specifies the data flow via the ALU by selecting the ALU's function and
system components.
Let us consider R1←R2 + R3, and the functions implemented within the
CPU are as follows:

Function name Description

MUX A Selector (SELA) It can insert R2 into bus A.

MUX B Selector (SELB) It can insert R3 in bus B.

ALU Operation Selector It can select the arithmetic

(OPR) addition(ADD).

Decoder Destination Selector It can transfer the result into R1.

(SELD)
The buses are used to perform the multiplexers of 3-state gates. The control
word is determined by the status of 14 binary selection inputs. The 14-bit
control word defines the micro-operation.
The register is used in computer organizations to acknowledge,
store, and transport information and directions that are used immediately by
the CPU.
These registers are used to carry out the various procedures. The CPU
uses these registers to complete the task when we do specific actions. When
we give the system information or input for a particular operation, the
information or input is saved in the registers. The registers return the
processed data after the ALU arithmetic and logical unit process the output.
The sole purpose of a register is to allow for the speedy retrieval of
data that will be processed by the CPU later. The CPU can obtain memory
from RAM rather than the hard disc, which is a considerably faster choice,
although the speed retrieved from RAM is still insufficient. As a result, catch
memory, which is faster than registers, is used. These registers work with
CPU memory such as catch and RAM to accomplish the task rapidly.
 2.What is Stack Organization & explain in detail?
STACK-ORGANIZATION
Stack is a storage structure that stores information in such a way that the last
item stored is the first item retrieved. It is based on the principle of LIFO
(Last-in-first-out). The stack in digital computers is a group of memory
locations with a register that holds the address of top of element. This
register that holds the address of top of element of the stack is called Stack
Pointer.
Stack-Operations
The two operations of a stack are:
1. Push: Inserts an item on top of stack.
2. Pop: Deletes an item from top of stack.
Implementation-of-Stack
In digital computers, stack can be implemented in two ways:
1. Register Stack
2. Memory Stack
Register Stack:
A stack can be organized as a collection of finite number of
registers that are used to store temporary information during the execution of
a program. The stack pointer (SP) is a register that holds the address of top
of element of the stack.
Memory Stack:
A stack can be implemented in a random access memory (RAM)
attached to a CPU. The implementation of a stack in the CPU is done by
assigning a portion of memory to a stack operation and using a processor
register as a stack pointer. The starting memory location of the stack is
specified by the processor register as stack pointer.
push operation is executed as follows :

SP←SP + 1 It can increment stack pointer

K[SP] ← DR It can write element on top of the stack

If (SP = 0) then (FULL ← 1) Check if stack is full

EMTY ← 0 Mark the stack not empty

The pop operation includes the following sequence of micro-operations

DR←K[SP] It can read an element

from the top of the
stack

SP ← SP – 1 It can decrement the

stack pointer

If (SP = 0) then (EMTY Check if stack is

← 1) empty

FULL ← 0 Mark the stack not full

3.Explain about Addressing Modes and its types ?

The term addressing modes refers to the way in which the operand of an
instruction is specified.

The addressing mode specifies a rule for interpreting or modifying the address
field of the instruction before the operand is actually executed.04-Sept-2019

Addressing Modes

The addressing modes help us specify the way in which an operand’s effective
address is represented in any given instruction.

The programs are generally written in high-level languages, as it’s a convenient way
in which one can define the variables along with the operations that a programmer
performs on the variables.

This program is later compiled so as to generate the actual machine code which
includes low-level instructions.

A set of low-level instructions has operands and opcodes. An addressing mode has no
relation with the opcode part. It basically focuses on presenting the address of the
operand in the instructions.

The various kind of addressing modes:

 Implied Mode

 Immediate Mode

 Register Mode

 Register Indirect Mode

 Autodecrement Mode /Autoincrement Mode

 Direct Address Mode

 Indirect Address Mode

 Indexed Addressing Mode
Implied Mode

In the implied mode, the operands are implicitly specified because, in this type
of instruction, the operand is implied in the accumulator register. All the register
reference instructions are implied-mode instructions that use an accumulator.

Immediate Mode

In the immediate mode, we specify the operand in the instruction itself.

An operand field contains the actual operand that is to be used in conjunction with an
operation that is determined in the given instruction. The immediate-mode instructions
help initialize registers to a certain constant value.

Register Mode

In the register mode, the operands exist in those registers that reside within a CPU.
In this case, we select a specific register from a certain register field in the given
instruction..

Register Indirect Mode

In the register indirect mode, the instruction available to us defines that particular
register in the CPU whose contents provides the operand’s address in the memory

The reference to a register is equivalent to specifying any memory address.

Autodecrement or the Autoincrement Mode

When the address stored in the register defines a data table in memory, it is very
crucial to decrement or increment the register after accessing the table every time. It can
be obtained using the decrement or increment instruction.
Direct Address Mode

In the direct address mode, the address part of the instruction is equal to the effective
address. The operand would reside in memory, and the address here is given directly by
the instruction’s address field. The address field would specify the actual branch
address in a branch-type instruction.

Indirect Address Mode

In an indirect address mode, control fetches the instruction available in the memory
and then uses its address part in order to (again) access memory to read its effective
address.

Indexed Addressing Mode

In the indexed addressing mode, the content of a given index register gets added to
an instruction’s address part so as to obtain the effective address.

The index register refers to a special CPU register that consists of an index value.
 3. Explain about Data Transfer and Manipulation in computer organization ?

Data Transfer Instructions Data transfer instructions move information from one
place in the PC to one more without evolving the information content. The most well-
known moves are among memory and processor registers, between processor registers
and information or result, and between the processor registers themselves.

Data Manipulation Instructions

Data manipulation instructions perform procedure on information and give

the computational capacities to the PC.

The data manipulation instructions in a typical computer are generally separated into
three essential sorts:

1. Arithmetic instructions

2. Logical and bit manipulation instructions

3. Shift instructions

Arithmetic instructions:

The arithmetic instructions characterize the arrangement of tasks performed by the

processor Arithmetic Logic Unit (ALU). The arithmetic instructions are further
classified into binary, decimal, logical, shift/rotate, and bit/byte manipulation
instructions.

Logical and Bit Manipulation Instructions :

Logical instructions perform parallel procedure on series of bits stored in

registers. They are helpful for controlling individual pieces or a gathering of pieces that
address double coded data.

The logical instructions think about each piece of the operand independently
and treat it as a Boolean variable.
Shift Instructions:

Instructions to move the substance of an operand are very valuable and are
frequently given in a few varieties. Shifts are tasks in which the pieces of a word are
moved to the left or right. The piece moved in toward the finish of the word decides the
kind of shift utilized.

4.Briefly explain about Instruction Formats in detail?

A computer program is a set of instructions that directs the computer to perform a

specific task. A computer program can contain multiple statements. The instruction
length is generally multiples of character length (8 bits).
1.Instruction includes a set of operational codes, operands, opcode, and addressing
mode.
2.Instruction length is the most fundamental issue of the format design. The longer the
instruction, the longer will be the time taken to fetch the instruction.

3.The number of bits is directly proportional to the memory range. i.e., the larger the
range requirement, the more number bits will be required.

4.If a system supports the virtual memory, then the memory range that needs to be
addressed by the instruction will be larger than the physical memory.

5.Instruction length should be equal to or the multiple of data bus length.

Working of the CPU
In a computer system organization ,the CPU cannot directly execute the program
written in a high-level language. Therefore, all the programs are first compiled to binary
format. The compiler converts the high-level program into its equivalent low-level
instruction containing 0 and 1. These instructions are machine instructions in computer
organization that the processor can directly execute.

The operating system loads the machine instructions into the RAM. The CPU starts the
execution by fetching these instructions one by one. These fetched instructions are
stored in the instruction registers. In machine instructions, the bits are grouped based on
instruction format. Each bit gives specific information to the CPU to decode.
Information required by the CPU includes the address of the data and the operation to
be performed.
The instruction format is depicted in a rectangular box, symbolizing the instruction bits
in memory words or a control register.
The bits grouped are divided into three parts:
Addressing Mode:
The addressing mode indicates how the data is represented.
Opcode:
The opcode part indicates the operation type on the data.
Operand:
The operand part indicates either the data or the address of the data.

These instruction formats are a sequence of bits (0 and 1). These bits, when grouped,
are known as fields. Each field of the machine provides specific information to the CPU
related to the operation and location of the data.
The instruction format also defines the layout of the bits for an instruction. It can be of
variable lengths with multiple numbers of addresses.
These address fields in the instruction format vary as per the organization of the
registers in the CPU. The formats supported by the CPU depend upon the Instructions
Set Architecture implemented by the processor.
Depending on the multiple address fields, the instruction is categorized as follows:
1. Three address instruction
2. Two address instruction
3. One address instruction
4. Zero address instruction

The operations specified by a computer instruction are executed on data stored in

memory or processor registers.
The operands residing in processor registers are specified with an address.
The registered address is a binary number that defines the registers in the CPU.
Instruction length:
A computer can have instructions of different lengths containing varying numbers
of addresses. The number of address fields of a computer depends on the internal design
of its registers. Most of the computers fall into one of three types of CPU organizations:
1. Single accumulator organization.
2. General register organization.
3. Stack organization.
Single Accumulator Organization
All the operations on a system are performed with an implied accumulator
register. The instruction format in this type of computer uses one address field.
For example, the instruction for arithmetic addition is defined by an assembly language
instruction ‘ADD.’
Where X is the operand’s address, the ADD instruction results in the operation.
AC ← AC + M[X].
AC is the accumulator register, M[X] symbolizes the memory word located at address
X.
General Register Organization
The general register type computers employ two or three address fields in their
instruction format. Each address field specifies a processor register or a memory. An
instruction symbolized by ADD R1, X specifies the operation R1 ← R + M [X].
This instruction has two address fields: register R1 and memory address X.
Stack Organization
A computer with a stack organization has PUSH and POP instructions that require an
address field.
Hence, the instruction PUSH X pushes the word at address X to the top of the
stack. The stack pointer updates automatically.
In stack-organized computers, the operation type instructions don’t require an address
field as the operation is performed on the two items on the top of the stack.
Types of Instruction Formats
Zero Address Instruction
This instruction does not have an operand field, and the location of operands is
implicitly represented. The stack-organized computer system supports these
instructions.
One Address Instruction
This instruction uses an implied accumulator for data manipulation operations.
An accumulator is a register used by the CPU to perform logical operations.
In one address instruction, the accumulator is implied, and hence, it does not
require an explicit reference.
All operations are done between the accumulator(AC) register and a memory
operand.
M[ ] is any memory location.
M[T] addresses a temporary memory location for storing the intermediate result.
This instruction format has only one operand field. This address field uses two
special instructions to perform data transfer, namely:
 LOAD: This is used to transfer the data to the accumulator.
 STORE: This is used to move the data from the accumulator to the memory.
Two Address Instructions
This instruction is most commonly used in commercial computers. This address
instruction format has three operand fields. The two address fields can either be
memory addresses or registers.
The MOV instruction transfers the operands to the memory from the processor
registers. R1, R2 registers.
Three Address Instruction
The format of a three address instruction requires three operand fields. These three
fields can be either memory addresses or registers.
The operand1 and operand2 contain the data or address that the CPU will operate.
Operand 3 contains the result’s address.
5.Explain about RISC Processor?

RISC is an abbreviation of Reduced Instruction Set Computer. RISC

processor has ‘instruction sets’ that are simple and have simple ‘addressing modes’.

A RISC style instruction engages “one word” in memory. Execution of the RISC
instructions are faster and take one clock cycle per instruction.

RISC Processor Architecture

RISC processor is implemented using the hardwired control unit.

The hardwired control unit produces control signals which regulate the working of
processors hardware.

RISC architecture emphasizes on using the registers rather than memory.

This is because the registers are the ‘fastest’ available memory source.
The registers are physically small and are placed on the same chip where the ALU and
the control unit are placed on the processor. The RISC instructions operate on the
operands present in processor’s registers.

RISC architecture.
All instructions in RISC are simple and execute one instruction per cycle.
The instructions are hardwired and there is no need for control store. For each
operation, we will have as defined hardwire. Making an instruction hardwired is making
a function or operation in instruction permanent using connected circuits.

RISC Instruction Sets

RISC instructions are simple and are of fixed size. Each RISC instruction engages
a single memory word.

RISC instructions operate on processor registers only. The instructions that have
arithmetic and logic operation should have their operand either in the processor
register or should be given directly in the instruction.

Like in both the instructions below we have the operands in registers

Add R2, R3

Add R2, R3, R4

The operand can be mentioned directly in the instruction as below:

Add R2, 100

But initially, at the start of execution of the program, all the operands are in memory.
So, to access the memory operands, the RISC instruction set
has Load and Store instruction.
The Load instruction loads the operand present in memory to the processor register.
The load instruction is of the form:

Load destination, Source

Example Load R2, A // memory to register

The load instruction above will load the operand present at memory location A to the
processor register R2.

The Store instruction stores the operand back to the memory. Generally, the Store
instruction is used to store the intermediate result or the final result in the memory. It is
of the form:

Store source, destination

Example Store R2, A // register to memory

The Store instruction above will store the content in register R2 into the A a memory
location.