ATTACHMENT FOR LAB 3 (MRSM)

Standard Cell Design

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Part 1: Create Schematic
1. Open a new terminal on Linux OS. RMB > Open Terminal To invoke the Pyxis Project
Manager, enter the command “dmgr_ic”.
2. Click on “File > New > Project”. Enter the project path as “/home/training/Lab”.
3. Then, browse the Library path to /EDA/MentorGraphics/tech_libs/sil013_kit. Click
OK to proceed.
4. The library setting will be shown, then click OK to proceed.
5. Click “Add Standard Libraries” to add other external libraries.
6. Some external libraries will be shown. Click OK to include these libraries in the project.
7. Now, it shows in the Explorer Pane of Pyxis Project Manager that the library “Lab” has been
created.
8. Select the “Lab” project at the Project Navigator, click on “New Library” icon; and name your
library name as shown below. E.g. “logic_component” and click “OK” to continue.
9. Select the “logic_component” library which you created in previous step, then click on “New
Schematic”, and name your schematic folder as shown below. Then the Pyxis Project Manager
will automatically invoke the Pyxis Schematic.
10. On the Pyxis schematic, click on “Add > Instance” or with the hotkey “i”, then point the
browser to “$SIL013_KIT/sil03-std-cells/schem/” and select “and02a” and click on “OK”. It
pastes the “and02a” on the schematic sheet.
11. On the Pyxis, use the hotkey “I” to call add new instance for xor gate into the schematic.
12. Repeat step 11 to obtain portin and portout from “generic_lib”.
13. Connect all the components as shown below by using wires. Click on “Add > Wire” or
you may use the hotkey “W”.
14. Rename the NetName of the PortIn and PortOut to “P3”, “P2”, “P1”, “P0”, “A1”, “A0”,
“B1” and “B0” respectively by selecting the instance and use the hotkey “Q” to change the
properties of the instance.
Figure 1 shows the complete 2x2 binary multiplier circuit.

Figure 1: 2x2 binary multiplier circuit

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15. Once the schematic is done, click on “File > Check Schematic” to check for connection
error. If errors occurred, fix the errors and run the schematic check again. If your design
is error free, then you may close the schematic checking report and save your schematic
by clicking on “File > Save Sheet > Default” and proceed to the next step.
*You may close the schematic checking report by using the strokes command by clicking
“MMB > drag to the left”. For the stroke commands, you may find it by drawing a “?”
with MMB on the screen.
16. Click on “Add > Generate Symbol…” a window will pop up. Let the setup as default
and click OK. The symbol will be generated as in Figure 2.

Figure 2: 2x2 binary multiplier symbol

17. Click on “File > Check Symbol” to check for connection error. If errors occurred, fix the
error and run the schematic check again. Click Yes to register the symbol.
If your design is error free, then you may close the symbol checking report and save your
schematic by clicking on “File > Save Symbol > Default” and proceed to the next ste

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Part 2: Testbench circuit schematic
1. Click on the “logic_component” library on the Project Navigator. Click on the “New
Schematic” icon, a window will pop up to name your schematic folder and click on
“OK”. e.g “2x2_binary_multiplier_tb”.
2. Press “i” or “Add > Instance… > Choose Symbol”, a file browser will pop up. Click on
the “logic_component” library and select the “2x2_binary_multiplier” created at the
previous chapter. Then, click “OK” to get the binary multiplier symbol.
3. Paste the “2x2_binary_multiplier” on the schematic sheet.
4. Click on “Add > Instance… > Choose Symbol” or with the hotkey “i”, to add the
components from the library.
5. Complete the test bench schematic with 1 dc_v_source, 4 pulse_v_source, VDD and
VSS. You can obtain the dc_v_source, pulse_v_source from sources_lib, and VDD, VSS
from generic_lib.
6. Connect all the components as in Figure 3 by using wires. Click on “Add > Wire” or you
may use the shortcut key “w”.

Figure 3: Components connections

7. Select the pulse_v_source by clicking the instance and press “Q” to change its
properties. Change the delay of all pulve_v_source from 1us to 1ns, pulse value from 1v
to 1.2v.
Pulse source V2 => period = 40ns, width = 20ns
Pulse source V3 => period = 80ns, width = 40ns
Pulse source V4 => period = 10ns, width = 5ns
Pulse source V5 => period = 20ns, width = 10ns

*Perform the same way to change the property of dc_v_source. Change the
dc_v_source from 1V to 1.2V.

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 Figure 4 show the four pulse sources DC source after changes are made.

Figure 4: Four pulse sources DC source

8. Add the NetName of the wire to “A1”, “A0”, “B1”, “B0”, “P3”, “P2” and “P1” and
“P0” respectively as in Figure 5 by selecting the wire and click on “RMB > Name
Net”.

Figure 5: Name the nets

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9. Once the schematic is done as in Figure 6, click on “File > Check Schematic” to check
for connection error. If errors occurred, fix the error and run the schematic check again. If
your design is error free, then you may close the schematic checking report and save your
schematic by clicking on “File > Save Sheet > Default” and proceed to the next step.

Figure 5: Complete schematic

Part 3: Simulation Transient Analysis

10. Click on “Simulation” on the left toolbar to enter to the Simulation Mode. On the
“Entering Simulation Mode” window, select New Design Configuration and keep the
name as “default”. Click OK.
11. It enters the Simulation mode as Figure 7. Then click Setup Environment to enter Setup
Environment. Select “Simulation Netlister” and type “VSS” on the ground_nodes to
connect VSS to the node 0 in netlist. Then click on “OK”.

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Figure 7: Setup Environment

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12. Click Analysis to enter Simulation Setup. In Setup Simulation window, select Analysis
and enter the setup as Figure 8. Then click “Apply”.
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Figure 8: Analysis setup

13. Choose “Output”, it will show the default output setup. Ensure the “Voltages” is chosen under
Global Outputs. Click “Apply”.
14. Click “Run Simulation” icon on the toolbar to run the simulation.

Part 4: Simulation Verification

15. Once the simulation process is completed, click on “View Wave” on the toolbar to view the
simulation waveform.
16. Click “TRAN”, you need to plot the Inputs: “A1”, “A0”, “B1” and “B0” into separate graph.
There are two ways:
First way: Double click on the “A1” and then follow by “A0”, “B1” and “B0” too.
Second way: drag and drop the input A1, A0, B1 and B0, and output P3, P2, P1 and P0 to
the wave window.
17. Screenshots the waveform that display all the inputs and outputs. Label the inputs and
outputs, and then add a vertical cursor to show the voltages.
18. Verify the waveforms by comparing with the theory of 2x2 binary multiplier.

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- END OF LABORATORIES ATTACHMENT -

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