Boolean Algebra and

Logic Gates

Abid Hasan
Lecturer, BSc in EEE, RUET
Department of Electrical & Electronics Engineering
University of Global Village (UGV), Barishal

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Algebras
◼ What is an algebra?
❑ Mathematical system consisting of
❑ Set of elements
❑ Set of operators
❑ Axioms or postulates
◼ Why is it important?
❑ Defines rules of “calculations”
◼ Example: arithmetic on natural numbers
❑ Set of elements: N = {1,2,3,4,…}
❑ Operator: +, –, *
❑ Axioms: associativity, distributivity, closure, identity elements,
etc.
◼ Note: operators with two inputs are called binary
❑ Does not mean they are restricted to binary numbers!
❑ Operator(s) with one input are called unary

Abid Hasan, Lecturer, BSc in EEE (RUET)

 BASIC DEFINITIONS
◼ The most common postulates used to formulate various
algebraic structures are as follows:
1. Closure: a set S is closed with respect to a binary operator if, for
every pair of elements of S, the binary operator specifies a rule for
obtaining a unique element of S.
❑ For example, natural numbers N={1,2,3,...} is closed w.r.t. the binary
operator + by the rule of arithmetic addition, since, for any a, bN, there
is a unique cN such that
❑ a+b = c
❑ But operator – is not closed for N, because 2-3 = -1 and 2, 3 N, but (-1)N.
2. Associative law: a binary operator * on a set S is said to be
associative whenever
❑ (x * y) * z = x * (y * z) for all x, y, zS
❑ (x+y)+z = x+(y+z)
3. Commutative law: a binary operator * on a set S is said to be
commutative whenever
❑ x * y = y * x for all x, yS
❑ x+y = y+x
Abid Hasan, Lecturer, BSc in EEE (RUET)
 BASIC DEFINITIONS
4. Identity element: a set S is said to have an identity element with
respect to a binary operation * on S if there exists an element eS
with the property that
❑ e * x = x * e = x for every xS
❑ 0+x = x+0 =x for every xI . I = {…, -3, -2, -1, 0, 1, 2, 3, …}.
❑ 1*x = x*1 =x for every xI. I = {…, -3, -2, -1, 0, 1, 2, 3, …}.
5. Inverse: a set having the identity element e with respect to the
binary operator to have an inverse whenever, for every xS, there
exists an element yS such that
❑ x*y=e
❑ The operator + over I, with e = 0, the inverse of an element a is (-a), since
a+(-a) = 0.
6. Distributive law: if * and ．are two binary operators on a set S, * is
said to be distributive over . whenever
❑ x * (y．z) = (x * y)．(x * z)

Abid Hasan, Lecturer, BSc in EEE (RUET)

 George Boole
◼ Father of Boolean algebra
◼ He came up with a type of linguistic algebra, the three
most basic operations of which were (and still are)
AND, OR and NOT. It was these three functions that
formed the basis of his premise, and were the only
operations necessary to perform comparisons or basic
mathematical functions.
◼ Boole’s system (detailed in his 'An Investigation of the
Laws of Thought, on Which Are Founded the
Mathematical Theories of Logic and Probabilities',
1854) was based on a binary approach, processing only
two objects - the yes-no, true-false, on-off, zero-one
approach.
George Boole (1815 - 1864)
◼ Surprisingly, given his standing in the academic
community, Boole's idea was either criticized or
completely ignored by the majority of his peers.
◼ Eventually, one bright student, Claude Shannon (1916-
2001), picked up the idea and ran with it

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Axiomatic Definition of Boolean Algebra
◼ We need to define algebra for binary values
❑ Developed by George Boole in 1854
◼ Huntington postulates for Boolean algebra (1904):
◼ B = {0, 1} and two binary operations, + and．
❑ Closure with respect to operator + and operator ·
❑ Identity element 0 for operator + and 1 for operator ·
❑ Commutativity with respect to + and ·
x+y = y+x, x·y = y·x
❑ Distributivity of · over +, and + over ·
x·(y+z) = (x·y)+(x·z) and x+(y·z) = (x+y)·(x+z)
▪ Complement for every element x is x’ with x+x’=1, x·x’=0
❑ There are at least two elements x,yB such that xy

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Boolean Algebra
◼ Terminology:
❑ Literal: A variable or its complement
❑ Product term: literals connected by •
❑ Sum term: literals connected by +

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Postulates of Two-Valued Boolean
Algebra
◼ B = {0, 1} and two binary operations, + and．
◼ The rules of operations: AND、OR and NOT.

AND OR NOT
x y x．y x y x+y x x'
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
1. Closure (+ and‧)
2. The identity elements
(1) +: 0
(2)．: 1

Abid Hasan, Lecturer, BSc in EEE (RUET)

Postulates of Two-Valued Boolean
Algebra
3. The commutative laws
4. The distributive laws

x y z y+z x．(y+z) x． y x．z (x．y)+(x．z)

0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 0 0 0 0
1 0 0 0 0 0 0 0
1 0 1 1 1 0 1 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 1 1

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Postulates of Two-Valued Boolean
Algebra
5. Complement
❑ x+x'=1 → 0+0'=0+1=1; 1+1'=1+0=1
❑ x．x'=0 → 0．0'=0．1=0; 1．1'=1．0=0
6. Has two distinct elements 1 and 0, with 0 ≠ 1

◼ Note
❑ A set of two elements
❑ + : OR operation; ．: AND operation
❑ A complement operator: NOT operation
❑ Binary logic is a two-valued Boolean algebra

Abid Hasan, Lecturer, BSc in EEE (RUET)

Basic Theorems

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Boolean Theorems
◼ Huntington’s postulates define some rules
Post. 1:
closure
Post. 2:
(a) x+0=x, (b) x·1=x
Post. 3:
(a) x+y=y+x, (b) x·y=y·x
Post. 4:
(a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
◼ Need more rules to modify Post. 5: (a) x+x’=1, (b) x·x’=0
algebraic expressions
❑ Theorems that are derived from postulates
◼ What is a theorem?
❑ A formula or statement that is derived from
postulates (or other proven theorems)
◼ Basic theorems of Boolean algebra
❑ Theorem 1 (a): x + x = x (b): x · x = x
❑ Looks straightforward, but needs to be proven !

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Proof of x+x=x
◼ We can only use Huntington postulates:
Huntington postulates:
Post. 2: (a) x+0=x, (b) x·1=x
Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
◼ Show that x+x=x.
x+x = (x+x)·1 by 2(b)
= (x+x)(x+x’) by 5(a)
= x+xx’ by 4(b)
= x+0 by 5(b)
=x by 2(a)
Q.E.D.
◼ We can now use Theorem 1(a) in future proofs

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Proof of x·x=x
◼ Similar to previous Huntington postulates:
proof
Post. 2: (a) x+0=x, (b) x·1=x
Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
Th. 1: (a) x+x=x

◼ Show that x·x = x.

x·x = xx+0 by 2(a)
= xx+xx’ by 5(b)
= x(x+x’) by 4(a)
= x·1 by 5(a)
=x by 2(b)
Q.E.D.

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Proof of x+1=1
◼ Theorem 2(a): x + 1 = 1 Huntington postulates:

x + 1 = 1．(x + 1) by 2(b) Post. 2: (a) x+0=x, (b) x·1=x

=(x + x')(x + 1) 5(a) Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
= x + x' 1 4(b) (b) x+yz = (x+y)(x+z)
= x + x' 2(b) Post. 5: (a) x+x’=1, (b) x·x’=0
=1 5(a) Th. 1: (a) x+x=x

◼ Theorem 2(b): x．0 = 0 by duality

◼ Theorem 3: (x')' = x
❑ Postulate 5 defines the complement of x, x + x' = 1 and x x' = 0
❑ The complement of x' is x is also (x')'

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Absorption Property (Covering)
Huntington postulates:
◼ Theorem 6(a): x + xy = x
❑ x + xy = x．1 + xy by 2(b) Post. 2: (a) x+0=x, (b) x·1=x
= x (1 + y) 4(a) Post. 3: (a) x+y=y+x, (b) x·y=y·x
= x (y + 1) 3(a) Post. 4: (a) x(y+z) = xy+xz,
= x．1 Th 2(a) (b) x+yz = (x+y)(x+z)
=x 2(b) Post. 5: (a) x+x’=1, (b) x·x’=0
Th. 1: (a) x+x=x
◼ Theorem 6(b): x (x + y) = x by duality
◼ By means of truth table (another way to proof )

x y xy x+xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1

Abid Hasan, Lecturer, BSc in EEE (RUET)

 DeMorgan’s Theorem
◼ Theorem 5(a): (x + y)’ = x’y’
◼ Theorem 5(b): (xy)’ = x’ + y’
◼ By means of truth table

x y x’ y’ x+y (x+y)’ x’y’ xy x’+y' (xy)’

0 0 1 1 0 1 1 0 1 1
0 11 1 0 11 0 0 0 1 1
1 0 0 1 1 0 0 0 1 1
11 1 00 0 1 0 0 11 0 0

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Operator Precedence
◼ The operator precedence for evaluating Boolean
Expression is
❑ Parentheses
❑ NOT
❑ AND
❑ OR
◼ Examples
❑ x y' + z
❑ (x y + z)'

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Boolean Functions
◼ A Boolean function
❑ Binary variables
❑ Binary operators OR and AND
❑ Unary operator NOT
❑ Parentheses
◼ Examples
❑ F1= x y z'
❑ F2 = x + y'z
❑ F3 = x' y' z + x' y z + x y'
❑ F4 = x y' + x' z

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Boolean Functions
🞕 The truth table of 2n entries

x y z F1 F2 F3 F4
0 0 0 0 0 0 0
0 0 1 0 1 1 1
0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0
◼ Two Boolean expressions may specify the same
function
❑ F3 = F4
Abid Hasan, Lecturer, BSc in EEE (RUET)
 Boolean Functions
◼ Implementation with logic gates
❑ F4 is more economical

F2 = x + y'z

F3 = x' y' z + x' y z + x y'

F4 = x y' + x' z

Abid Hasan, Lecturer, BSc in EEE (RUET)

Algebraic Manipulation
◼ To minimize Boolean expressions
❑ Literal: a primed or unprimed variable (an input to a gate)
❑ Term: an implementation with a gate
❑ The minimization of the number of literals and the number of
terms → a circuit with less equipment
❑ It is a hard problem (no specific rules to follow)
◼ Example 2.1
1. x(x'+y) = xx' + xy = 0+xy = xy
2. x+x'y = (x+x')(x+y) = 1 (x+y) = x+y
3. (x+y)(x+y') = x+xy+xy'+yy' = x(1+y+y') = x
4. xy + x'z + yz = xy + x'z + yz(x+x') = xy + x'z + yzx + yzx' =
xy(1+z) + x'z(1+y) = xy +x'z

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Complement of a Function
◼ An interchange of 0's for 1's and 1's for 0's in the value
of F
❑ By DeMorgan's theorem
❑ (A+B+C)' = (A+X)' let B+C = X
= A'X' by theorem 5(a) (DeMorgan's)
= A'(B+C)' substitute B+C = X
= A'(B'C') by theorem 5(a) (DeMorgan's)
= A'B'C' by theorem 4(b) (associative)
◼ Generalizations: a function is obtained by interchanging
AND and OR operators and complementing each literal.
❑ (A+B+C+D+ ... +F)' = A'B'C'D'... F'
❑ (ABCD ... F)' = A'+ B'+C'+D' ... +F'

Abid Hasan, Lecturer, BSc in EEE (RUET)

Examples
◼ Example 2.2
❑ F1' = (x'yz' + x'y'z)' = (x'yz')' (x'y'z)' = (x+y'+z) (x+y+z')
❑ F2' = [x(y'z'+yz)]' = x' + (y'z'+yz)' = x' + (y'z')' (yz)‘
= x' + (y+z) (y'+z')
= x' + yz‘+y'z
◼ Example 2.3: a simpler procedure
❑ Take the dual of the function and complement each literal
1. F1 = x'yz' + x'y'z.
The dual of F1 is (x'+y+z') (x'+y'+z).
Complement each literal: (x+y'+z)(x+y+z') = F1'
2. F2 = x(y' z' + yz).
The dual of F2 is x+(y'+z') (y+z).
Complement each literal: x'+(y+z)(y' +z') = F2'

Abid Hasan, Lecturer, BSc in EEE (RUET)

 2.6 Canonical and Standard Forms
Minterms and Maxterms
◼ A minterm (standard product): an AND term consists of
all literals in their normal form or in their complement
form.
❑ For example, two binary variables x and y,
❑ xy, xy', x'y, x'y'
❑ It is also called a standard product.
❑ n variables can be combined to form 2n minterms.
◼ A maxterm (standard sums): an OR term
❑ It is also called a standard sum.
❑ 2n maxterms.

Abid Hasan, Lecturer, BSc in EEE (RUET)

Minterms and Maxterms
🞕 Each maxterm is the complement of its corresponding
minterm, and vice versa.

Abid Hasan, Lecturer, BSc in EEE (RUET)

Minterms and Maxterms
◼ An Boolean function can be expressed by
❑ A truth table
❑ Sum of minterms
❑ f1 = x'y'z + xy'z' + xyz = m1 + m4 +m7 (Minterms)
❑ f2 = x'yz+ xy'z + xyz'+xyz = m3 + m5 +m6 + m7 (Minterms)

Abid Hasan, Lecturer, BSc in EEE (RUET)

Minterms and Maxterms (SOP & POS)
◼ The complement of a Boolean function
❑ The minterms that produce a 0
❑ f1' = m0 + m2 +m3 + m5 + m6 = x'y'z'+x'yz'+x'yz+xy'z+xyz'
❑ f1 = (f1')'
= (x+y+z)(x+y'+z) (x+y'+z') (x'+y+z')(x'+y'+z) = M0 M2 M3 M5
M6
❑ f2 = (x+y+z)(x+y+z')(x+y'+z)(x'+y+z)=M0M1M2M4
◼ Any Boolean function can be expressed as
❑ A sum of minterms (“sum” meaning the ORing of terms).
❑ A product of maxterms (“product” meaning the ANDing of
terms).
❑ Both boolean functions are said to be in Canonical form.

Abid Hasan, Lecturer, BSc in EEE (RUET)

Sum of Minterms or SOP
◼ Sum of minterms: there are 2n minterms and 22n
combinations of function with n Boolean variables.
◼ Example 2.4: express F = A+BC' as a sum of minterms.
❑ F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') +
AB'(C+C') + (A+A')B'C = ABC+ABC'+AB'C+AB'C'+A'B'C
❑ F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m1 + m4 +m5 + m6 + m7
❑ F(A, B, C) = (1, 4, 5, 6, 7)
❑ or, built the truth table first

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Product of Maxterms or POS
◼ Product of maxterms: using distributive law to expand.
❑ x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') =
(x+y+z)(x+y+z')(x+y'+z)
◼ Example 2.5: express F = xy + x'z as a product of
maxterms.
❑ F = xy + x'z = (xy + x')(xy +z) = (x+x')(y+x')(x+z)(y+z) =
(x'+y)(x+z)(y+z)
❑ x'+y = x' + y + zz' = (x'+y+z)(x'+y+z')
❑ F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M0M2M4M5
❑ F(x, y, z) = (0, 2, 4, 5)

Abid Hasan, Lecturer, BSc in EEE (RUET)

◼ Example
❑ F = xy + xz
❑ F(x, y, z) = (1, 3, 6, 7)
❑ F(x, y, z) =  (0, 2, 4, 6)

Abid Hasan, Lecturer, BSc in EEE (RUET)

Standard Forms
◼ Canonical forms are very seldom the ones with the
least number of literals.
◼ Standard forms: the terms that form the function may
obtain one, two, or any number of literals.
❑ Sum of products: F1 = y' + xy+ x'yz'
❑ Product of sums: F2 = x(y'+z)(x'+y+z')
❑ F3 = A'B'CD+ABC'D'

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Implementation
◼ Two-level implementation

F1 = y' + xy+ x'yz' F2 = x(y'+z)(x'+y+z')

◼ Multi-level implementation

Abid Hasan, Lecturer, BSc in EEE (RUET)

Boolean Expressions

Abid Hasan, Lecturer, BSc in EEE (RUET)

 2.8 Digital Logic Gates
◼ Boolean expression: AND, OR and NOT operations
◼ Constructing gates of other logic operations
❑ The feasibility and economy;
❑ The possibility of extending gate's inputs;
❑ The basic properties of the binary operations (commutative and
associative);
❑ The ability of the gate to implement Boolean functions.

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Standard Gates
◼ Consider the 16 functions in Table 2.8 (slide 33)
❑ Two are equal to a constant (F0 and F15).
❑ Four are repeated twice (F4, F5, F10 and F11).
❑ Inhibition (F2) and implication (F13) are not commutative or
associative.
❑ The other eight: complement (F12), transfer (F3), AND (F1), OR
(F7), NAND (F14), NOR (F8), XOR (F6), and equivalence (XNOR)
(F9) are used as standard gates.
❑ Complement: inverter.
❑ Transfer: buffer (increasing drive strength).
❑ Equivalence: XNOR.

Abid Hasan, Lecturer, BSc in EEE (RUET)

Summary of Logic Gates

Abid Hasan, Lecturer, BSc in EEE (RUET)

Summary of Logic Gates

Figure 2.5 Digital logic gates

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Multiple Inputs
◼ Extension to multiple inputs
❑ A gate can be extended to multiple inputs.
❑ If its binary operation is commutative and associative.
❑ AND and OR are commutative and associative.
❑ OR
▪ x+y = y+x
▪ (x+y)+z = x+(y+z) = x+y+z
❑ AND
▪ xy = yx
▪ (x y)z = x(y z) = x y z

Abid Hasan, Lecturer, BSc in EEE (RUET)

Multiple Inputs
❑ NAND and NOR are commutative but not associative → they
are not extendable.

Figure 2.6 Demonstrating the nonassociativity of the NOR operator;

(x ↓ y) ↓ z ≠ x ↓(y ↓ z)
Abid Hasan, Lecturer, BSc in EEE (RUET)
Multiple Inputs
❑ Multiple NOR = a complement of OR gate, Multiple NAND = a
complement of AND.
❑ The cascaded NAND operations = sum of products.
❑ The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascated NOR and NAND gates

Abid Hasan, Lecturer, BSc in EEE (RUET)
Multiple Inputs
❑ The XOR and XNOR gates are commutative and associative.
❑ Multiple-input XOR gates are uncommon?
❑ XOR is an odd function: it is equal to 1 if the inputs variables
have an odd number of 1's.

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Universal gate : NAND & NOR
NAND gate to NOT, AND & OR gate
1) NAND to NOT

A A

2) NAND to AND
A
B AB

3) NAND to OR

A
A+B

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Universal gate : NAND & NOR
NOR gate to NOT, AND & OR gate
1) NOR to NOT

A A

2) NOR to OR
A
B A+B

3) NOR to AND

A
AB

Abid Hasan, Lecturer, BSc in EEE (RUET)

Positive and Negative Logic
◼ Positive and Negative Logic
❑ Two signal values <=> two logic
values
❑ Positive logic: H=1; L=0
❑ Negative logic: H=0; L=1
◼ Consider a TTL gate
❑ A positive logic AND gate
❑ A negative logic OR gate
❑ The positive logic is used in this
book

Figure 2.9 Signal assignment and logic polarity

Abid Hasan, Lecturer, BSc in EEE (RUET)
Positive and Negative Logic

Abid Hasan, Lecturer, BSc in EEE (RUET)

 2.9 Integrated Circuits
Level of Integration
◼ An IC (a chip)
◼ Examples:
❑ Small-scale Integration (SSI): < 10 gates
❑ Medium-scale Integration (MSI): 10 ~ 100 gates
❑ Large-scale Integration (LSI): 100 ~ xk gates
❑ Very Large-scale Integration (VLSI): > xk gates
◼ VLSI
❑ Small size (compact size)
❑ Low cost
❑ Low power consumption
❑ High reliability
❑ High speed

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Digital Logic Families
◼ Digital logic families: circuit technology
❑ TTL: transistor-transistor logic (dying?)
❑ ECL: emitter-coupled logic (high speed, high power
consumption)
❑ MOS: metal-oxide semiconductor (NMOS, high density)
❑ CMOS: complementary MOS (low power)
❑ BiCMOS: high speed, high density

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Digital Logic Families
◼ The characteristics of digital logic families
❑ Fan-out: the number of standard loads that the output of a
typical gate can drive.
❑ Power dissipation.
❑ Propagation delay: the average transition delay time for the
signal to propagate from input to output.
❑ Noise margin: the minimum of external noise voltage that
caused an undesirable change in the circuit output.

Abid Hasan, Lecturer, BSc in EEE (RUET)

 Questions
Remember:
1) Define Algebra
2) List the rules you have studied in Boolean Algebra
3) Define Universal gate
4) Define Standard form or Canonical form
5) Find the characteristics equation of NAND, NOR gate

Understand:
1) X-OR gate is used as odd 1 detector. Explain it by deriving truth table
2) X-NOR gate is used as even 1 detector. Explain it by deriving truth table
3) Classify gates you have studied
4) Show that, A+A`B = A+B

Apply:
1) Construct the circuit diagram of OR,AND,NAND,NOR gate
2) F(A,B,C)= m (2,4,5,6,7). Apply Boolean algebra to form minimize form
3) F(C,B,A)= M (0,2,4). Apply Boolean algebra to form Maximize form

Abid Hasan, Lecturer, BSc in EEE (RUET)

Analyze:
1) F=(A+B+C).(A+B`+C).(A+B`+C`). Analyze what are the gates used to
form the output.
2) Compare the process to build AND gate using NAND & NOR gate
3) Analyze the De Morgan’s Law using truth table
4) An led is to be lit by using two inputs. When both inputs are 0, led is on
otherwise led is off. Analyze which gate can be used to implement this.
Draw the circuit diagram and truth table of that gate.
5) An led is to be lit by using two inputs. When both inputs are 1, led is on
otherwise led is off. Analyze which gate can be used to implement this.
Draw the circuit diagram and truth table of that gate.
6) Apply Boolean algebra to find the reduced expression of output Y, F,G

Abid Hasan, Lecturer, BSc in EEE (RUET)

Evaluate:
1) Evaluate the minimized form of the function,
F=(A+B+C).(A+B`+C).(A+B`+C`).
2) F=(AB+AB`C+AB`C`) can be implemented by one gate only.
Justify the statement.

3) Evaluate the output F1 and F2 and minimize it

4) Determine the number of gates used in the Canonical and
minimize form of F1 and F2.

Abid Hasan, Lecturer, BSc in EEE (RUET)

Create:
1) Design the logic circuit from the Boolean expression of
F=(A+B+C).(A+B`+C).(A+B`+C`).
2) Create the logic circuit from the Boolean expression of
F=(AB+AB`C+AB`C`)
3) Construct X-OR gate using NAND gate only.
4) Construct X-NOR gate using NOR gate only.
5) Construct AND gate using NOR gate only.
6) Construct OR gate using NAND gate only.
7) Design the logic circuit from the Boolean expression of
F= {((A. B`C).(A+B+C`)) + ((B+A`+C).(A+BC`))}

Abid Hasan, Lecturer, BSc in EEE (RUET)