5144 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO.

5, MAY 2020

Review of Power Electronics Components at

Cryogenic Temperatures
Handong Gui , Student Member, IEEE, Ruirui Chen , Student Member, IEEE,
Jiahao Niu , Student Member, IEEE, Zheyu Zhang , Senior Member, IEEE, Leon M. Tolbert , Fellow, IEEE,
Fei (Fred) Wang, Fellow, IEEE, Benjamin J. Blalock, Senior Member, IEEE,
Daniel Costinett , Senior Member, IEEE, and Benjamin B. Choi

Abstract—In order to apply power electronics systems to electronics systems supply power to electric equipment or
applications such as superconducting systems under cryogenic machines. Conventionally, the power electronics systems are
temperatures, it is necessary to investigate the characteristics of
placed inside some thermal insulation and the temperature is
different parts in the power electronics system. This article reviews
the influence of cryogenic temperature on power semiconductor maintained at room temperature (∼300 K) [1]–[4]. However,
devices including Si and wide bandgap switches, integrated the extra thermal insulation and temperature regulation increase
circuits, passive components, interconnection and dielectric the complexity, weight, volume and cost. Thus, it would be
materials, and some typical cryogenic converter systems. Also, beneficial if the power electronics systems can also operate at
the basic theories and principles are given to explain the trends cryogenic temperatures.
for different aspects of cryogenically cooled converters. Based
on the review, Si active power devices, bulk Complementary Second, research has already shown that some semiconductor
metal-oxide-semiconductor (CMOS) based integrated circuits, devices have improved performance at low temperatures such as
nanocrystalline and amorphous magnetic cores, NP0 ceramic lower on-resistance and faster switching speed [1]–[3], [5]–[7],
and film capacitors, thin/metal film and wirewound resistors are which means that making power electronics systems work at
the components suitable for cryogenic operation. Pb-rich PbSn cryogenic temperatures can contribute to lower power dissipa-
solder or In solder, classic printed circuit boards material, most
insulation papers and epoxy encapsulant are good interconnection tion and smaller volume and weight.
and dielectric parts for cryogenic temperatures. Generally speaking, the temperature can be called cryogenic
Index Terms—Cryogenic converter, integrated circuit, when it is lower than 123 K. The low temperature environment
interconnection and dielectric material, power semiconductor can be created with the help of liquefied natural gas (111 K),
device, passive components. liquid nitrogen (77 K) or liquid helium (4 K). Compared to
power electronics systems at room temperature (∼300 K), the
I. INTRODUCTION
requirements at such cryogenic temperatures are similar, which
N GENERAL, there are two main motivations to use mainly includes high efficiency, high reliability and high power
I cryogenically-cooled power electronics systems [1], [2].
First, some special applications such as spacecraft based elec-
density. However, due to the significant temperature change,
both the static and dynamic characteristics of the parts in power
tronic systems or superconducting machines require cryogenic electronics systems can change significantly.
temperatures for their operation. In such applications, power A typical power converter mainly consists of the following:
1) power semiconductor devices, which include diodes and
Manuscript received February 21, 2019; revised May 9, 2019, July 11, 2019, active switches such as power MOSFETs;
and September 6, 2019; accepted September 14, 2019. Date of publication Octo- 2) integrated circuits, which include analog parts and circuits
ber 1, 2019; date of current version February 11, 2020. This work was supported in the control or gate drives;
by the Boeing Company and NASA. This work made use of the Engineering
Research Center Shared Facilities supported by the Engineering Research Center 3) passive components, which include transformers, induc-
Program of the National Science Foundation (NSF) and U.S. Department of tors, capacitors and resistors in power or control circuits;
Energy under NSF Award Number EEC-1041877, and the CURENT Industry 4) interconnection and dielectric materials, which include
Partnership Program. Recommended for publication by Associate Editor K.
Ngo. (Corresponding author: Handong Gui.) solder, printed circuit board (PCB) and insulation mate-
H. Gui, R. Chen, J. Niu, L. M. Tolbert, F. Wang, B. J. Blalock, and D. rials providing electrical or mechanical support for the
Costinett are with the Department of Electrical Engineering and Computer converter.
Science, The University of Tennessee, Knoxville, TN 37996 USA (e-mail:
[email protected]; [email protected]; [email protected]; tolbert@utk. It is essential to understand the properties of all the aspects
edu; [email protected]; [email protected]; [email protected]). mentioned above at cryogenic temperatures so that one can select
Z. Zhang is with Zucker Family Graduate Education Center, Clemson proper parts for the design.
University Restoration Institute, North Charleston, SC 29405 USA (e-mail:
[email protected]). Some converters have been tested at cryogenic temperatures,
B. B. Choi is with NASA Glenn Research Center, Cleveland, OH 44135 USA and some of the characteristics of the aforementioned parts are
(e-mail: [email protected]). reported [1]–[4], [8]–[16]. Performance of power semiconductor
Color versions of one or more of the figures in this article are available online
at http://ieeexplore.ieee.org. devices are shown in [1]–[4], [10], and [13], but they mainly
Digital Object Identifier 10.1109/TPEL.2019.2944781 focus on Si diodes and MOSFETs. Properties of integrated circuits

0885-8993 © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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 GUI et al.: REVIEW OF POWER ELECTRONICS COMPONENTS AT CRYOGENIC TEMPERATURES 5145

Fig. 1. Normalized forward voltage of Si P–N diodes. Fig. 2. Normalized breakdown voltage of Si P–N diodes.

are presented in [2]–[4], [8], and [9], while the characteristics negative temperature coefficient because the knee voltage is
of some passive components are analyzed in [1]–[4], [11]. dominant as shown in Fig. 1. However, when the current is
However, most of these papers are more like testing reports large enough, the on-resistance becomes dominant, and the
without much theoretical analysis, and none of the existing forward voltage drop has positive temperature coefficient until
literature covers all of the four different types of components the temperature is below 100 K.
mentioned earlier. Fig. 2 shows the normalized breakdown voltage of Si P–N
This article makes a comprehensive investigation of the ex- diodes. The breakdown voltage declines because the mean
isting literature on different parts in power electronics systems free path of the carrier increases at low temperature, which
operating at cryogenic temperatures. Section II analyzes the contributes to higher impact ionization efficiency. So, more
characteristics of power semiconductor devices. Section III electron-hole pairs with high energy are created to launch
presents the behavior of integrated circuits. Section IV shows impact ionization, and the avalanche is enhanced.
the features of passive components. Section V demonstrates the In terms of the switching performance of Si P–N diode at
properties of interconnection and dielectric materials. Section VI cryogenic temperatures, it is found that both the peak reverse
provides a brief conclusion. current and the recovery time reduce due to the reduced carrier
lifetime [6], [7].
II. POWER SEMICONDUCTOR DEVICES B. Si and SiC Schottky Diode
Generally, the characterization of semiconductor devices at Unlike the P–N diode, Si and SiC Schottky diodes do not have
cryogenic temperature follows the rules and procedures at room a reverse recovery issue, which makes them more suitable for
temperature except that the device under test is located in a high switching frequency circuits. The temperature dependent
cryogenic chamber or vacuum station. The applied gate drives forward voltage drop of Si and SiC Schottky diodes is similar to
and conditioning circuits are identical to the testing at room that of a Si P–N diode [2], [5], [6]. However, the on-resistance
temperature, so that the result can be fairly compared with the of SiC Schottky diodes increases more rapidly than Si Schottky
room temperature testing. diodes when the temperature is lower than 100 K due to larger
influence by carrier freeze-out in SiC devices [2].
A. Si P-N Diode The breakdown voltage of Si and SiC Schottky diodes is
The Si P-N diode is one of the very first semiconductor devices stable or increases slightly at lower temperatures because of
developed for power circuits, and its performance at cryogenic the reduced space charge generation caused by lower intrinsic
temperatures has been investigated by several research groups carrier concentration [2], [6].
[2], [3], [5]–[7], [17].
Fig. 1 plots the forward voltage of Si P-N diodes at different C. Si MOSFET
temperatures. The plotted value is normalized to that at room Extensive testing and analysis have been conducted for Si
temperature. The forward voltage of a diode consists of the knee power MOSFETs at cryogenic temperatures [6], [7], [19]–[27].
voltage and the voltage drop across the on-resistance. The knee Fig. 3 demonstrates the normalized on-resistance of Si MOSFETs
voltage increases when the temperature decreases because of versus temperature. The on-resistance decreases significantly
the drop in intrinsic carrier concentration at low temperature. from room temperature to about 100 K due to the increased
Meanwhile, the on-resistance decreases when temperature drops carrier mobility. However, the on-resistance increases as tem-
from room temperature to around 100 K due to the increase of perature drops below 100 K because of carrier freeze-out. For
carrier mobility. the same reason, the transconductance increases with decreasing
However, when temperature further decreases, the resistance temperature until around 100 K. The threshold voltage increases
increases because of the impact from carrier freeze-out [18]. at low temperature because of the reduction of intrinsic carrier
Thus, the net effect can cause P–N diodes to exhibit different concentration. The body diode of the Si MOSFET is a Si P–N
temperature coefficients depending on the current amplitude. diode, so its behavior follows that of a Si P–N diode as analyzed
Generally, within the current rating, the forward voltage shows earlier.
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 5146 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 5, MAY 2020

Fig. 3. Normalized on-resistance of Si MOSFETs. Fig. 5. Normalized threshold voltage of SiC MOSFETs.

Fig. 4. Normalized breakdown voltage of Si MOSFETs. Fig. 6. Normalized on-resistance of SiC MOSFETs.

Fig. 4 gives the drain-source breakdown voltage of Si

MOSFETs, and it reduces as the temperature drops. This is Fig. 6 shows the on-resistance of SiC MOSFETs at different
mainly due to the increase in the mean free path of carriers and temperatures. It is explained in [31] that the total on-resistance
higher impact ionization. Rtotal consists of two parts: the channel resistance Rch and the
Due to the increased inversion layer mobility and its resultant residual resistance Rs . Rs includes the drift region, junction gate
higher transconductance, the switching speed can be faster and field-effect transistor (JFET), substrate and contact resistances,
the switching loss can be reduced with lower temperature [26]. and is much larger than Rch at high temperature. Rs drops with
decreasing temperature due to higher carrier mobility similar
D. SiC MOSFET to a Si MOSFET. However, Rch has a negative coefficient and
becomes dominant at low temperature, which makes the total
Wide bandgap devices are getting more and more popular on-resistance increase rapidly. This is also caused by the increase
because of their high thermal conductivity, high carrier mobility of the interface state density since large amounts of electrons are
and saturated electron velocity compared to conventional Si trapped and few free electrons are available for conduction of the
devices. Among them, the silicon carbide (SiC) MOSFET is a inversion layer. In addition, it is suggested by [32] that carrier
strong competitor with the Si insulated gate bipolar transistor freeze-out is also a contributor for the increase of on-resistance.
(IGBT) in similar voltage and power applications. At room The drain-source breakdown voltage of a SiC MOSFET keeps
temperature, SiC MOSFETs provide faster switching speed, lower relatively constant for a wide temperature range because the
switching loss and higher operating temperature. However, the impact ionization efficiency does not increase [28]. It is reported
existing research shows that SiC MOSFETs have relatively poor that the switching speed of SiC MOSFETs does not improve or
performance under cryogenic temperatures [28]–[35]. even gets worse at cryogenic temperatures [28], [30].
Fig. 5 illustrates the change of threshold voltage of SiC
MOSFETs at different temperatures. Compared to the result by
the conventional temperature dependent equation to calculate E. Gallium Nitride High Electron Mobility Transistor
threshold voltage, the tested result appears to increase much (GaN HEMT)
more dramatically with the decrease of temperature. This phe- In addition to SiC MOSFETs, GaN (HEMT) is another wide
nomenon is related to the number of occupied interface traps. bandgap power device with appealing features at room tempera-
When the temperature decreases, the number of occupied inter- ture. Due to the different device structure compared to a MOSFET,
face traps increases rapidly, which results in the higher threshold GaN HEMT shows different characteristics under cryogenic
voltage [31]. temperatures [35]–[53].

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 GUI et al.: REVIEW OF POWER ELECTRONICS COMPONENTS AT CRYOGENIC TEMPERATURES 5147

it is not caused by impact ionization. The potential reason for

the vertical breakdown is that, electrons are injected from the
substrate and trapped in the buffer. With the increase of voltage
bias, the trapped carriers are ionized and more free electrons are
generated. The relatively constant breakdown voltage of GaN
HEMTs at cryogenic temperatures is verified in [38].
The threshold voltage of normally off p-GaN HEMTs should
have positive temperature coefficient at low temperatures be-
cause the increase in intrinsic carrier concentration and ioniza-
tion in the p-GaN layer and GaN buffer. This matches with the
trend of devices from GaN Systems and Panasonic [38], [50].
However, Vth of GaN field-effect transistor (FET) from Efficient
Fig. 7. Normalized on-resistance of GaN HEMTs. Power Conversion Corp. (EPC) shows negative coefficient as
reported in [37], whose reason is not reported.
The current collapse phenomenon (kink effect) due to the
trapped electrons in the surface states is a potential issue for GaN
HEMTs. Several papers have analyzed the kink effect at cryo-
genic temperatures [39], [42], [44], [47], [49]. It is found that
the kink effect is more severe when the temperature decreases
since lower temperature enhances the surface traps. However, it
should be noted that the existing literature focuses on depletion
mode GaN HEMTs with relatively small voltage and current
rating instead of enhancement mode power GaN HEMTs. So, it
is still not clear what the current collapse issue of power GaN
Fig. 8. Vertical breakdown behavior of GaN HEMT [48]. (a) Forward-biased. HEMTs is at low temperature.
(b) Reverse-biased.

F. Si Insulated Gate Bipolar transistor (IGBT)

Fig. 7 shows the on-resistance of GaN HEMTs at different Though SiC MOSFETs are attracting more and more attention,
temperatures. It is observed that the on-resistance keeps de- Si IGBT is still widely used in medium to high power appli-
creasing with temperature. The on-resistance of the GaN HEMT cations due to its low cost and high reliability and availability.
Rtotal mainly includes contact resistance of drain and source IGBTs combine the advantages of MOSFETs and bipolar junction
electrodes Rc , source to gate and gate to drain resistance RSG transistor (BJTs) so they have lower voltage drop compared to
and RGD as well as the two-dimensional electron gas (2-DEG) MOSFETs and lower power for the gate drive compared to BJTs.
channel resistance Rch . Among them, Rch is the dominant part Since the aforementioned review has shown that SiC MOSFETs
and is determined by the electron mobility in 2-DEG [41]. Due to are not good candidates for cryogenic application, it is of great
the weak influence of Coulomb scattering, the electron mobility importance if Si IGBTs can show superior performance at low
keeps increasing until the temperature reduces to around 40 K. temperature.
Moreover, there is no sign of carrier freeze-out in GaN HEMTs The main drawback of IGBTs at room temperature is the
due to the characteristics of 2-DEG at cryogenic temperatures. current tailing caused by the removal of excess carriers stored
Therefore, the transconductance also increases with the decrease in the N- drift region. Consequently, the turn-OFF time of IGBTs
of temperature due to the increase of electron mobility. is significantly increased, and the switching frequency of the
The breakdown mechanism of GaN HEMTs is different from converter is limited. The switching performance of IGBTs at
that of MOSFETs and is more complicated because of its lateral cryogenic temperatures has been analyzed [5]–[7], [34], [54],
structure [45], [46], [52]. Several mechanisms can contribute to [55]. As shown in Fig. 9, the normalized turn-OFF time of IGBTs
the breakdown of GaN HEMTs: source to drain punch-through, is plotted for different temperatures. The turn-off time can reduce
leakage through gate Schottky junction, vertical leakage of by 80% as temperature drops from 287 to 50 K, which means
substrate, and impact ionization between source and drain [46]. that the switching speed and loss of an IGBT at cryogenic tem-
Not much research has been conducted in analyzing the break- peratures are much improved compared to room temperature.
down of GaN HEMTs at cryogenic temperatures. However, the The decrease of the tailing time with lower temperature is due
temperature dependent trend shows that vertical leakage of the to the reduction of an IGBT’s inherent PNP transistor gain.
substrate is the dominant factor that impacts the breakdown Because the lifetime of minority carriers in IGBTs decreases at
behavior. Fig. 8 in [52] shows the forward and reverse biased low temperature, the gain of inherent PNP transistor β reduces
breakdown behavior of a GaN HEMT. It can be seen that and leads to faster decay of collector current.
although the leakage current during the increase of voltage The trend of static characteristics of IGBTs is similar to
changes with temperature, the breakdown voltage keeps almost that of a Si MOSFET. When the temperature drops, the forward
constant from 423 K to room temperature, which indicates that breakdown voltage decreases due to higher impact ionization

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 5148 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 5, MAY 2020

Fig. 9. Normalized turn-OFF time of Si IGBTs.

Fig. 10. Comparison of diodes’ performance at cryogenic temperatures with
their individual performance at room temperature.
efficiency; the threshold voltage increases due to the reduction
of intrinsic carrier concentration; the transconductance increases
and the forward voltage drop decreases due to the increase of
carrier mobility.

G. SiGe Diode and HBT

The use of germanium (Ge) has been considered since the
freeze-out temperature of dopants in Ge is much lower than in
Si, and also the carrier mobility in Ge is higher than that in Si at
low temperature [7].
Power semiconductor devices based on SiGe have been devel-
oped by GPD Optoelectronics Corp in cooperation with Auburn
University, motivated by the NASA deep space exploration
program [56], [57]. A 50 V/5 A SiGe heterojunction bipolar
transistor was designed and fabricated, which was examined
along with a SiGe diode in a 100 W, 24 V/48 V, 100 kHz boost Fig. 11. Comparison of switches’ performance at cryogenic temperatures with
power converter at low temperature. The dc current gain does their individual performance at room temperature.
not drop and the switching performance improves at cryogenic
temperatures, which makes the SiGe heterojunction bipolar But it does not mean that at cryogenic temperatures, a Si IGBT
transistor (HBT) a promising candidate for cryogenic power can switch faster than a Si MOSFET. With the plotted comparison,
converters. it can be concluded that Si diodes, Si MOSFETs, GaN HEMTs
However, some contradictory results are reported by the and Si IGBTs can be adopted in cryogenic applications requiring
University of Akron and NASA with the same SiGe HBT in [58]. lower loss, while SiC diodes and MOSFETs have poor conduction
The testing shows that the dc current gain drops significantly performance, but are more suitable for the cases requiring stable
when the temperature is lower than 200 K. Because there is no drain-source breakdown voltage.
detailed description of the testing setup, applied device structure,
and measurement methods, it is not clear why this result occurs.
III. INTEGRATED CIRCUITS
Before SiGe power devices can be utilized in real converters,
much more device development and testing are needed. A. Si BJT-Based
Several papers have shown that Si BJTs perform poorly
H. Summary under low temperature [59]–[63], which means that integrated
Figs. 10 and 11 compare the performance of diodes and circuits based on BJTs are not suitable for cryogenic temperature
active switches at cryogenic temperatures with their individual operation.
performance at room temperature. The specific performance at Fig. 12 in [60] illustrates the dc current gain β of a typical
room temperature of each device is normalized to 1. A higher NPN BJT. It is clear that β drops significantly with the decrease
value at cryogenic temperatures means higher voltage, higher of temperature. This is mainly because the bandgap in emitter
resistance, or longer switching time. Note that the value of the region drops at low temperature, which results in severe decrease
point indicates the relative increase or decrease in the charac- of emitter injection efficiency. Another contributor is the reduc-
teristic of one device at cryogenic temperatures compared to tion of base transport factor caused by the reduction of carrier
its own characteristic at room temperature. For instance, the lifetime.
Si IGBT has larger switching time improvement at cryogenic As for other characteristics, the base-collector breakdown
temperatures than the Si MOSFET, so the IGBT has a lower point. voltage decreases with decreasing temperature due to the typical

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 GUI et al.: REVIEW OF POWER ELECTRONICS COMPONENTS AT CRYOGENIC TEMPERATURES 5149

Fig. 12. DC current gain of BJT [60]. Fig. 13. Transconductance degradation of CMOS analog circuit [69].

P–N diode behavior. The collector-emitter breakdown voltage

increases due to the reduced current gain. The switching speed to conventional CMOS-based integrated circuits. Similar to bulk
increases because of the increase of diffusion coefficient and CMOS technology, the speed of the SOI device improves at
decrease of carrier lifetime. However, the advantage is not low temperature. However, SOI devices suffer from kink effect
enough to compensate the decreased current gain. at low temperature especially for partially depleted SOI [68],
[71]–[73]. This phenomenon is one of the main floating body
B. Bulk CMOS Based effects. Due to the higher impact ionization efficiency at low
temperature, carriers are generated but they are not able to flow
Previous discussion indicates that power MOSFETs have im- through the silicon substrate and part of them are trapped to form
proved performance at low temperature. For bulk Complemen- a forward bias of the body region, which reduces the threshold
tary metal-oxide-semiconductor (CMOS)-based integrated cir- voltage and consequently increases the channel current. The kink
cuit, the main improvement is the switching speed [64]–[67]. effect decreases the voltage gain, increases loss, induces low
Due to the increase of carrier mobility and saturation velocity frequency noise, and reduces lifetime of the device. This issue
at low temperature, the transconductance of both n-channel can be suppressed by using fully depleted SOI.
and p-channel MOSFETs increases. The unity gain frequency
of bulk CMOS increases as temperature drops [68]. Therefore,
D. SiGe HBT-Based
bulk CMOS-based integrated circuits are more suitable for high
frequency operation at cryogenic temperatures. As mentioned above, SiGe HBT devices are expected to
The absolute value of the threshold voltage of both n-channel have better performance at cryogenic temperatures. Compared
and p-channel MOSFETs increase as temperature decreases be- to power devices, there are more reports of SiGe technology
cause of the increased surface potential caused by decreased in analog circuits [59], [74]–[78]. It has been shown that SiGe
intrinsic carrier concentration. HBTs show significant increase in current gain with the decrease
Despite the benefit of faster switching speed brought by low of temperature.
temperature, reliability issues, such as gate degradation caused
by hot carriers should be paid special attention to [66]–[70]. With E. Summary
increased carrier mobility and mean free path, the probability for
It is concluded from the above review that bulk CMOS
carriers to gain enough energy to enter and get trapped in the
technology is promising for low temperature operation due to
gate oxide increases. Therefore, interface states are easier to
the higher switching speed capability, while the Si BJT is not
be formed at low temperature, which is the source of transcon-
suitable at cryogenic temperatures because of the significant
ductance degradation and threshold voltage shift. However, this
degradation of current gain. Though SOI CMOS based and
phenomenon does not damage the device directly, but it limits
SiGe HBT-based technology also show some benefit at low
the long-term reliability and lifetime. Fig. 13 from [69] shows
temperature, they are not likely to be used in power converters
the transconductance degradation of a CMOS analog circuit
due to the limited availability and cost issues since bulk CMOS
at different temperatures after the same operating time. The
operates acceptably.
degradation increases when the temperature drops. The potential
solution to mitigate the impact of hot carrier effect is to reduce
the gate voltage at cryogenic temperatures so that the electric IV. PASSIVE COMPONENTS
field is decreased, and the possibility for carriers to gain enough A. Inductors and Transformers
energy to flow into the gate oxide is reduced.
An inductor or transformer in a power converter mainly
includes two parts: core and winding. Research has been con-
C. SOI CMOS-Based
ducted for different kinds of high frequency core material includ-
Silicon on insulator (SOI) technology can provide faster ing powder, ferrite, nanocrystalline, and amorphous [79]–[91].
speed, lower power dissipation, and smaller package compared The comparison is given in Table I. Among them, ferrite core

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 5150 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 5, MAY 2020

TABLE I
COMPARISON OF DIFFERENT CORE MATERIALS AT CRYOGENIC TEMPERATURES WITH ROOM TEMPERATURE

↑↑: increase significantly ↑: increase slightly –: keep constant ↓: decrease slightly ↓↓: decrease significantly

shows the worst performance, which has significant decrease in

permeability and increase in loss, making it not suitable for cryo-
genic applications. Different materials in powder cores show
different characteristics. The permeability of molypermalloy
(MP) and high flux core keeps constant while Kool Mμ loses
40% of its permeability at 77 K. The loss of high flux and Kool
Mμ cores is relatively stable at low temperature while the loss of
MP core increases by 40%. The amorphous and nanocrystalline
cores have similar or even higher permeability and saturation
flux density at cryogenic temperatures though the magnetic loss
increases.
For the winding loss calculation, the anomalous skin effect is
worth paying attention to [92]–[97]. According to the classical Fig. 14. Surface resistance with classical and anomalous skin effect of
skin effect theory, the skin depth δ and the resistance at skin RRR = 2000 copper at different frequency.
depth Rs is expressed as

2
δ= based on classical and anomalous skin effect at 100 kHz, 1 MHz
μ0 ωσ
 (1) and 10 MHz, respectively. It is observed that at low temperature
μ0 ω
Rs = where the mean free path of the electron is larger than skin
2σ depth, the anomalous skin effect theory provides higher resis-
where μ0 is the permeability of free space, ω is the angular tance than classical theory. With higher frequency, the distance
frequency of current, and σ is the dc conductivity. between the result of anomalous theory and classical theory gets
It can be seen that the surface resistance is inversely pro- larger. Therefore, designers cannot depend only on classical skin
portional to the square root of the dc conductivity σ. Since σ effect theory to calculate winding loss since the anomalous skin
increases significantly at cryogenic temperatures, the resistance effect can increase the ac winding resistance at low temperature
is expected to decrease. The classical theory is based on the and high frequency.
current density equation
B. Capacitors
J = σ E
 (2)
Capacitors made from different materials operating at cryo-
where J is the current density and E is the electric field. However, genic temperatures have been investigated by several papers
this equation is only valid when the skin depth is much longer [2]–[4], [98]–[103]. Due to the difference in dielectric constant
than the mean free path of the electrons, which means that [98], capacitors can show different temperature dependent char-
an electron does not experience electric field change before acteristics in capacitance and dissipation factor. Table II shows
it collides. Meanwhile, at low temperature and high frequency the change of capacitance and dissipation factors with temper-
applications, the mean free path of the electrons becomes even ature. It is concluded that NP0, polypropylene, polyphenylene
higher than the skin depth. In such case, the classical skin effect sulfide (PPS), and mica perform well at cryogenic temperatures.
theory is not valid and the anomalous skin effect occurs. For applications requiring high capacitance value, tantalum is
With anomalous skin effect, the relationship between surface preferred although its dissipation factor significantly increases
resistance and angular frequency of current is derived from [95] while an electrolytic capacitor loses most of its capacitance at
  23   2  13 low temperature.
l 3μ0 2
Rs = ω3 (3)
σ 16π C. Resistors
where l/σ is a constant depending on material. For copper, it Resistors with different materials are compared at cryogenic
equals to 6.8 × 10−16 Ω·m2 . Thus, the surface resistance is temperatures in [2] and [3], and the results are shown in Table III.
independent of dc conductivity with the impact of anomalous Thin film, metal film, and wirewound are good candidates for
skin effect. Fig. 14 shows the calculated surface resistance of resistors while carbon and ceramic composition are poor at
the copper with residual resistivity ratio (RRR) equal to 2000 cryogenic temperatures.
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 GUI et al.: REVIEW OF POWER ELECTRONICS COMPONENTS AT CRYOGENIC TEMPERATURES 5151

TABLE II
COMPARISON OF DIFFERENT CAPACITORS AT CRYOGENIC TEMPERATURES WITH ROOM TEMPERATURE

↑↑: increase significantly ↑: increase slightly –: keep constant ↓: decrease slightly ↓↓: decrease significantly

TABLE III
COMPARISON OF DIFFERENT RESISTORS AT CRYOGENIC TEMPERATURES WITH ROOM TEMPERATURE

↑↑: increase significantly ↑: increase slightly –: keep constant

V. INTERCONNECTION AND DIELECTRIC MATERIALS TABLE IV

BREAKDOWN ELECTRIC FIELD OF DIELECTRIC MATERIALS AT
A. Solder CRYOGENIC TEMPERATURES

Solders provide both mechanical and electrical connection

between dies, packages, and PCBs. Solder alloys are subject
to cyclic stress resulting from mechanical or thermal cycling.
The thermal expansion mismatch between the die or package
and the substrate or PCB can cause the solder joints to deform
and fatigue when cycled from room temperature to cryogenic
temperatures.
Soft solder alloys are most widely used in power electronics
applications since they have the advantage of lower melting tem- than 10 000 cycles at the pressure of 266 MPa, which is far
perature during assembly. However, they increase in strength and beyond the normal operation environment. So the mechanical
decrease in ductility with decreased temperature [104]–[107]. property of PCB material is strong enough to work for cryogenic
The most common soft solder is PbSn alloy, and it is able to applications.
operate at cryogenic temperatures and maintains its ductility if it The other concern is about the dielectric performance. Based
has high Pb content. However, as Sn content increases up to more on [115] and [116], the flashover breakdown voltage in liquid
than 40%, the alloy becomes brittle at cryogenic temperatures. nitrogen is higher than that in transformer oil at room tempera-
PbSn alloy containing Sb can mitigate this issue, but it is still ture. In conclusion, the mechanical and electrical performance
not recommended to use Sn-rich solder for low temperature. of PCBs do not decline significantly at cryogenic temperatures.
Compared to standard PbSn alloy, pure indium or indium al-
loys have shown to be much better at cryogenic temperatures due
to the greater ductility and longer lifetime [105], [107]–[110]. C. Dielectric Paper
So indium solder is the best candidate in soft solders if not Table IV shows the breakdown electric field of some com-
considering the availability and cost. monly used dielectric paper materials at cryogenic temperatures
In addition to soft solders, hard solders which are also called [116]–[121]. In general, most dielectric papers have improved
brazes, such as AuSn, AuGe, and AuSi alloys, have higher dielectric performance at low temperatures, and they can be
melting temperature and do not undergo stress but transmit more implemented in cryogenic applications.
stress to die or package. Therefore, the device is more likely to
crack during thermal cycling. However, it is found that AuSn
can work well at cryogenic temperatures [111]. D. Encapsulants
Encapsulants are special dielectric materials that are widely
used in power device packaging and busbar fabrication. The
B. Printed Circuit Boards most common material for typical encapsulant is silicone gel-
PCBs provide mechanical support, electrical connection as based and epoxy-based. However, silicone gel cannot survive
well as dielectric material in the circuit. They are usually made at cryogenic temperatures [122]. It is found that partial dis-
from glass fiber reinforced epoxy and can fatigue during ther- charge occurs when the temperature is lower than 215 K and
mal cycling due to thermal expansion mismatch. Based on the can significantly reduce the breakdown voltage of the silicone
existing research [112]–[114], the fatigue occurs after more gel. Moreover, the change of the breakdown voltage cannot be

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 5152 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 5, MAY 2020

TABLE V Si MOSFET has smaller on-resistance and faster switching

CONVERTERS IN THE EXISTING LITERATURE
speed; however, the breakdown voltage decreases. SiC
MOSFET shows poor performance at low temperature. GaN
HEMT has improved on-resistance, switching speed and
stable breakdown voltage. Si IGBT shows improved for-
ward voltage drop and switching speed but lower break-
down voltage.
2) For integrated circuits, Si BJT has poor performance while
bulk CMOS, SOI CMOS, and SiGe HBT work well at
low temperatures. Considering the requirement of normal
power electronics systems, bulk CMOS is the best candi-
recovered even once the temperature returns to room tempera- date considering availability and cost.
ture. Therefore, most commercially available power modules 3) In terms of passive components, ferrite core has poor per-
utilizing silicone gel-based encapsulants cannot be used for formance at cryogenic temperatures while powder, amor-
cryogenic applications. On the other hand, many epoxies can phous and nanocrystalline cores can work at low tempera-
work at cryogenic temperatures [123]. The only issue is that ture although the loss increases to some extent. Anomalous
epoxies tend to be more brittle as temperature drops. Thus, skin effect should be taken into consideration when calcu-
epoxies with lower moduli should be selected for operation at lating the winding loss. NP0 is the most suitable material
cryogenic temperatures. for ceramic capacitors, while most film capacitors can
work well at cryogenic temperatures. Both electrolytic and
VI. CRYOGENIC CONVERTER SYSTEMS tantalum capacitors have worse performance. Metal film,
thin film, and wirewound are candidates for resistors.
Not many converters developed for cryogenic operation have
4) For interconnection and dielectric materials, Pb-rich PbSn
been reported [2], [3], [11]–[16]. In general, the converters are
or In alloys are preferred solders. Classical PCB is good
tested inside a cryogenic chamber or box. The topologies, power
enough for both mechanical and dielectric support. Most
rating, applied devices, and the switching frequencies are given
dielectric paper materials can work at cryogenic temper-
in Table V.
atures. Epoxy-based encapsulant is preferred. However,
The purpose of building these converters is mainly to verify
commercially available power modules with silicone gel
the function and feasibility of the concept to run power convert-
encapsulant fail at cryogenic temperatures.
ers at cryogenic temperatures, so the power ratings are normally
5) Existing cryogenic converter systems are mostly designed
low. Bridge type topologies are popular because most of them
for low power and low voltage applications, and based on
are for motor drives. Considering the device performance and
Si MOSFETs. The switching speed of the power devices is
availability, Si MOSFETs are mostly used, and the switching
normally less than 100 kHz.
frequency is usually lower than 100 kHz. There is no reference
From the review, cryogenic temperature can cause significant
about using Si IGBTs or SiC MOSFETs to build and run converters
change in properties of different materials, which results in the
for high power applications at cryogenic temperatures.
variation of the converter efficiency and reliability compared
It should be noted that, this article focuses on the properties
with room temperature case. Thus, designers need to carefully
of individual parts in power converter systems. However, inter-
select materials for cryogenic applications, and this article can
actions such as the coefficient of thermal expansion among the
serve as initial guidance for designers to follow in building power
materials, components and systems are also essential and require
electronics systems.
special attention and calculation when developing cryogenic
power converters.
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DC and AC breakdown characteristic of dielectric insulating materials in Knoxville, TN, USA, in 2008, 2011, and 2015, re-
liquid nitrogen,” IEEE Trans. Appl. Supercond., vol. 22, no. 3, Jun. 2012, spectively, all in electrical engineering.
Art. no. 7701504. He is the Warren H. Owen – Duke Energy Assistant
[122] T. Vu, J.-L. Auge, and O. Lesaint, “Low temperature partial discharge Professor of engineering with Clemson University,
properties of silicone gels used to encapsulate power semiconductors,” Clemson, SC, USA. From 2015 to 2018, he was a
in Proc. IEEE Conf. Elect. Insul. Dielect. Phenom., 2009, pp. 421–424. Research Assistant Professor with the Department of
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line]. Available: http://www.epotek.com the University of Tennessee. From 2018 to 2019, he joined General Electric
Research as the Lead Power Electronics Engineer at Niskayuna, NY, USA. He
has authored or coauthored more than 80 papers in the most prestigious journals
and conference proceedings, filed more than 10 patent applications with one
licensed, authored one book and one book chapter, and presented four IEEE
Handong Gui (S’14) received the B.S. and M.S. tutorial seminars. His research interests include wide band-gap based power
degrees in electrical engineering from the Nanjing electronics, modularity and scalability technology, medium voltage power elec-
University of Aeronautics and Astronautics, Nanjing, tronics, advanced manufacturing and cooling technology (e.g., cryogenic cool-
China, in 2013 and 2016, respectively. He is currently ing) applied in power electronics, and highly efficient, ultra-dense, cost-effective
working toward the Ph.D. degree with the University power conversion systems, for electric propulsion, electrified transportation,
of Tennessee, Knoxville, TN, USA. renewables, energy storage, and grid applications.
His research interests include wide band-gap de- Dr. Zhang is currently an Associate Editor for the IEEE TRANSACTIONS ON
vices and applications, multilevel converters, and POWER ELECTRONICS and IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS.
electrified transportations. He was the recipient of two prize paper awards from the IEEE Industry Appli-
cations Society and IEEE Power Electronics Society.

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 5156 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 5, MAY 2020

Leon M. Tolbert (S’88–M’91–SM’98–F’13) re- Benjamin J. Blalock (S’86–M’97–SM’06) received

ceived the bachelor’s, M.S., and Ph.D. degrees in the B.S. degree from the University of Tennessee,
electrical engineering from the Georgia Institute of Knoxville, TN, USA, in 1991 and the M.S. and Ph.D.
Technology, Atlanta, GA, USA, in 1989, 1991, and degrees from the Georgia Institute of Technology,
1999, respectively. Atlanta, GA, USA, in 1993 and 1996, respectively,
From 1991 to 1999, he was with the Oak Ridge all in electrical engineering.
National Laboratory, Oak Ridge, TN, USA. He was an He is the Blalock-Kennedy-Pierce Professor of
Assistant Professor with the Department of Electrical analog electronics with the Department of Electrical
and Computer Engineering, University of Tennessee, Engineering and Computer Science, The University
Knoxville, TN, USA, in 1999. He is currently the Min of Tennessee, where he directs the Integrated Circuits
H. Kao Professor in the Min H. Kao Department of and Systems Laboratory. He has coauthored more
Electrical Engineering and Computer Science, University of Tennessee. He is than 200 refereed papers. His research focus at UT includes analog/mixed-signal
also a Founding Member of the NSF/DOE Engineering Research Center, Center integrated circuit design for extreme environments (both wide temperature
for Ultra-Wide-Area Resilient Electric Energy Transmission Networks, UTK. and radiation) across multiple semiconductor technologies, ultra-low power
He is also a part-time Senior Research Engineer with the Power Electronics and analog signal processing, multichannel monolithic instrumentation systems,
Electric Machinery Research Center, Oak Ridge National Laboratory. mixed-signal/mixed-voltage circuit design for systems-on-a-chip, and gate drive
Dr. Tolbert is a Registered Professional Engineer in the state of Tennessee. integrated circuits for wide bandgap (SiC and GaN) power electronics.
He was the recipient of the 2001 IEEE Industry Applications Society Out-
standing Young Member Award, and six prize paper awards from the IEEE
Industry Applications Society and IEEE Power Electronics Society. From 2007
to 2013, he was an Associate Editor for the IEEE TRANSACTIONS ON POWER
ELECTRONICS. He was elected to serve as a Member-At-Large to the IEEE Daniel Costinett (S’10–M’13–SM’18) received the
Power Electronics Society Advisory Committee for 2010–2012, the Chair of Ph.D. degree in electrical engineering from the Uni-
the PELS Membership Committee from 2011-2012, and a member of the PELS versity of Colorado, Boulder, CO, USA, in 2013.
Nominations Committee from 2012-2014. He was the Paper Review Chair for He is currently an Associate Professor with the
the Industry Power Converter Committee of the IEEE Industry Applications Department of Electrical Engineering and Com-
Society from 2014 to 2017. puter Science, the University of Tennessee, Knoxville
(UTK), Knoxville, TN, USA. Prior to joining UTK,
he was an Instructor at Utah State University, in
2012. His research interests include resonant and soft
switching power converter design, high efficiency
wired and wireless power supplies, on-chip power
conversion, medical devices, and electric vehicles.
Dr. Costinett is currently the Co-Director of education and diversity for
Fei (Fred) Wang (S’85–M’91–SM’99–F’10) re- the National Science Foundation/Department of Energy Research Center for
ceived the B.S. degree from Xi’an Jiaotong Univer- Ultra-wide-area Resilient Electric Energy Transmission Networks. He is also
sity, Xi’an, China, and the M.S. and Ph.D. degrees a Joint Faculty with the Power Electronics and Electric Machinery Research
from the University of Southern California, Los An- Group, Oak Ridge National Laboratory. He was a recipient of the National
geles, in 1982, 1985, and 1990, respectively, all in Science Foundation CAREER Award in 2017. He is currently an Associate
electrical engineering. Editor for the IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER
From 1990 to 1992, he was a Research Scientist ELECTRONICS, and IEEE TRANSACTIONS ON POWER ELECTRONICS.
with the Electric Power Lab, University of Southern
California. He joined the GE Power Systems Engi-
neering Department, Schenectady, NY, USA, as an
Application Engineer in 1992. From 1994 to 2000, Benjamin B. Choi received the B.S., M.S., and Ph.D.
he was a Senior Product Development Engineer with GE Industrial Systems, degrees from the University of Illinois, Champaign,
Salem, VA, USA. During 2000–2001, he was the Manager of Electronic and IL, USA, in 1984, 1986, and 1990, respectively.
Photonic Systems Technology Lab, GE Global Research Center, Schenectady, Since joining NASA GRC in 1990, he has been
NY ,USA, and Shanghai, China. In 2001, he joined the Center for Power working on structural dynamics system modeling,
Electronics Systems with Virginia Tech, Blacksburg, VA, USA, as a Research analysis and control, especially in vibration control
Associate Professor and became an Associate Professor in 2004. From 2003 using magnetic bearing system and artificial intelli-
to 2009, he was the CPES Technical Director. Since 2009, he has been with gence technology for nearly 12 years. Since then, he
The University of Tennessee and Oak Ridge National Lab, Knoxville, TN, started looking at the development of a bearingless
USA, as a Professor and the Condra Chair of Excellence in power electronics. motor technology for the electric propulsion system
He is a Founding Member and the Technical Director of the multiuniversity for future aircraft and NASA missions. He has also
NSF/DOE Engineering Research Center for Ultra-wide-area Resilient Electric extended his research view into suppressing blade resonance using piezoelectric
Energy Transmission Networks led by The University of Tennessee. His research materials or shape memory alloy. During the last ten years, he has been involved
interests include power electronics and power systems. in the propulsion electric grid simulator for future turboelectric distributed
Dr. Wang is a fellow of the U.S. National Academy of Inventors. propulsion aircraft.

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