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MIC Unit 02 A

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0% found this document useful (0 votes)
19 views2 pages

MIC Unit 02 A

notes

Uploaded by

kheldarpranav03
Copyright
© © All Rights Reserved
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Dr Devesh D Nawgaje

Associate Professor, SSGMCE Shegaon

Address Space Partitioning:

 The Intel 8085 uses a 16-bit wide address bus for addressing memories and I/O devices
 Using 16-bit wide address bus it can access 216 = 64 K bytes of memory and I/O devices
 The 64K addresses are to be assigned to memories and I/O devices for their addressing
 There are two schemes for the allocation of addresses to memories and input/output
devices:
1. Memory mapped I/O scheme
2. I/O mapped memory I/O scheme

Memory mapped I/O scheme:

• In this scheme, there is only one address space


• Address space is defined as the set of all possible addresses that a microprocessor can
generate
• Some addresses are assigned to memories and some addresses to I/O devices
• An I/O device is also treated as memory location and one address is assigned to it
• The addresses of I/O device are different from the addresses which have been assigned to
memories
• The addresses which have not been assigned to memories can be assigned to I/O devices
• One address is assigned to each I/O device
• All the data transfer instructions of the microprocessor can be used for both memory as
well as I/O devices
• For Example: MOV A, M will be valid for data transfer from the memory location or I/O
device, whose address in H-L pair
• If the H-L pair contain the address of a memory location, data will be transferred from the
memory location to accumulator
• If the H-L pair contain the address of an I/O device, data will be transferred from the I/O
device to accumulator
• The memory mapped I/O scheme is suitable for a small system

I/O mapped I/O scheme:

• In this scheme, the address assigned to memory locations can also be assigned to a I/O
devices
• The same address may be assigned to a memory location or to an I/O device
• The microprocessor must issue a signal to distinguish whether the address on the address
bus for a memory location or I/O device
Dr Devesh D Nawgaje
Associate Professor, SSGMCE Shegaon

• The Intel 8085 issues IO/𝑀 signal for this purpose


• Two extra instructions IN and OUT are used to address I/O devices
• The IN instruction is used to read data from an input device
• The OUT instruction is used to send data to an output device
• This scheme is suitable for a large system

(Fig: Memory and IO Interfacing)

IO mapped IO vs. Memory Mapped IO

Memory Mapped IO IO mapped IO


IO is treated as memory. IO is treated IO.
16-bit addressing. 8- bit addressing.
More Decoder Hardware. Less Decoder Hardware.
Can address 216=64k locations. Can address 28=256 locations.
Less memory is available. Whole memory address space is available.

Memory Instructions are used. Special Instructions are used like IN, OUT.
Memory control signals are used. Special control signals are used.
Arithmetic and logic operations can be Arithmetic and logic operations cannot be
performed on data. performed on data.
Data transfer b/w register and IO. Data transfer b/w accumulator and IO.

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