Note on Noise Margin

Prepared by Dr. Shahriyar Masud Rizvi

Problem#1 Compute

Compute VIL and VIH for an inverter being driven by another inverter that provides VOH = 3V
and VOL = 0.1 V. Here, VDD = 3.3 V and VSS = 0V. The gain factors are βN = βP.

Solution:

INV1 provides either VOH or VOL. INV2 can accept a Vin as high as VIL as an acceptable LOW
input and Vin as low as VIH as an acceptable HIGH input.

©Shahriyar M. Rizvi, AIUB, 2024 Page 1 of 5

Consider the case Vin = VIL for the INV2.
Since VIL is the maximum allowable LOW-input to the INV2, INV2 would still produce the
strong Logic-1 (HIGH) state in its output. So, for INV2, VOUT = VDD = 3.3V. Note that using
KVL, one can state VSDP = VDD – VOUT. So, in this case VSDP = 3.3 - VOUT. Also, VSGP = VDD
– VIN. So, VSGP = 3.3 - VIN.

When Vin falls to LOW state from a previous HIGH state, the transition starts at Region B. In
Region B, NMOS is in saturation and PMOS is in linear region.

So, IDSN-SAT = ISDP-LIN

( − ) = (2( −| |) −( ) )
2 2
( − ) = (2( − −| |)( − )−( − )
2 2
( − ) = (2( − −| |)( − )−( − ) )

Here, βN = βP, VIN = VIL.

( − ) = (2( − −| |)( − )−( − ) )……(1)

©Shahriyar M. Rizvi, AIUB, 2024 Page 2 of 5

 ( − ) = (2( − −| |)( − )−( − ) )……(1)

Considering, VDD = 3.3V, βN = βP, VTHN = 0.6V, VTHP = -0.7V.

( − 0.6) = 2(3.3 − − | − 0.7|)(3.3 − ) − (3.3 − )

( − 0.6) = 2(2.6 − )(3.3 − ) − (3.3 − )

( − 0.6) = (5.2 − 2 )(3.3 − ) − (3.3 − ) … … . . (2)

VIL is computed by locating where the partial derivative of VOUT with respect to VIN ( ) is
equal to -1.

Applying partial derivative of VOUT with respect to VIN in Equation 1,

-1
2( − )(1 − 0)
= 2( − −| | ) 0− + 2( − )(0 − 1 − 0)

− 2( − )(0 − )

-1

2( − ) = 2( − −| |) − 2( − ) − 2( − )

2( − ) = 2( − −| |− + − + )

2( − ) = 2(− − −| |+2 )

( − ) = (− − −| |+2 )

2 =( +2 +| |− )

| |
=

Considering, VDD = 3.3V, VTHN = 0.6V, VTHP = -0.7V.

3.3 + 2 + 0.7 − 0.6

=
2

= + 1.7

©Shahriyar M. Rizvi, AIUB, 2024 Page 3 of 5

Equation 2 is,

( − 0.6) = (5.2 − 2 )(3.3 − ) − (3.3 − ) … … . . (2)

Substituting VOUT in Equation 2,

( − 0.6) = (5.2 − 2 )(3.3 − ( + 1.7)) − (3.3 − ( + 1.7))

− 1.2 + 0.36 = (5.2 − 2 )(1.6 − ) − (1.6 − )

− 1.2 + 0.36 = 8.32 − 5.2 − 3.2 +2 − (2.56 − 3.2 + )

= 1.35

NML = |VOL - VIL|= |0.1 – 1.35| = 1.25V

Consider the case Vin = VIH for the INV2.

Since VIH is the minimum allowable HIGH-input to the INV2, INV2 would still produce the
strong Logic-0 (HIGH) state in its output. So, for INV2, VOUT = VSS = 0V. Note that using
KVL, one can state, VSGP = VDD - VIN = 3.3 - VIN.

When Vin rises to HIGH state from a previous LOW state, the transition starts at Region D. In
Region D, NMOS is in linear region and PMOS is in saturation.

So, IDSN-LIN = ISDP-SAT

(2( − ) − )= ( −| |)
2 2
(2( − ) − )= ( − −| |)
2 2
2( − ) − = ( − −| |)

Here, βN = βP, VIN = VIH.

2( − ) − =( − −| |) … … (3)

Considering, VDD = 3.3V, VTHN = 0.6V, VTHP = -0.7V.

2( − 0.6) − = (3.3 − − 0.7)

2( − 0.6) − = (2.6 − ) … … (4)

©Shahriyar M. Rizvi, AIUB, 2024 Page 4 of 5

Equation 3 is,
2( − ) − =( − −| |) … … (3)

VIH is computed by locating where the partial derivative of VOUT with respect to VIN ( ) is
equal to -1.

Applying partial derivative of VOUT with respect to VIN in Equation 3,

-1

2( − ) +2 (1 − 0) − 2 ( )
= 2( − −| |)(0 − 1 − 0)

-1

−2( − )+2 +2 = −2( − −| |)

4 =4 −2 + 2| |−2

| |
=

= − 1.6

Equation 4 is,
2( − 0.6) − = (2.6 − ) … … (4)

Substituting VOUT in Equation 4,

2( − 0.6)( − 1.6) − ( − 1.6) = (2.6 − )

2 − 3.2 − 1.2 + 1.92 = 6.76 − 5.2 +

+ 0.8 − 4.84 = 0

= −2.63, 1.83

VIH cannot be negative, So, VIH = 1.83

NMH = VOH - VIH = 3 – 1.83 = 1.17V

©Shahriyar M. Rizvi, AIUB, 2024 Page 5 of 5