University of Central Punjab

Faculty of Information Technology

Spring 2022

A. Course Description

Course Code CSCS3543

Course Title Computer Organization and Assembly Language (Theory)
Credit Hours 4(3+1)
Assessment Instruments with • Theory (3 credit hr.)
Weights (quizzes, midterms, final, Final Exam 40%
assignments, presentation, lab
work, etc.) Mid Term exam 20%
Assignments (4) 20%
Quizzes (6) 15%
Class Participation 05%
Theory Total 100%

• Lab (1 credit hr.)

Final Lab Exam 40%
Lab Midterm 20%
Graded Labs 35%
Class participation 05%
Lab Total 100%

Course Instructors
Course Coordinator Dr. Adnan Ghafoor
Office Hours TBA
Plagiarism Policy All the parties involved in first cheating case in Midterm or Final
term will be awarded ‘F’ for the course.
Current Catalog Description The objective of this course is to understand the organization of
microprocessor for instance Intel x86 in terms of assembly language
instruction. This course primarily focuses on the detailed analysis and
working of microprocessor.
Textbook (Notes) Assembly language, Design and Interfacing 4th edition, Mazidi &
Mazidi

Reference Books  Assembly Language Intel based Computers, 4th Edition, by
KIP, R, IRVINE
 Intel Microprocessors, 8th edition, by Barry B. Brey
 Art of Assembly,
Teaching-Learning Methodology  More emphasis will be on coding assignments and practical
lab sessions. Regular and online quizzes will be held to help
students improving their understanding. Extra tutorial session
will be conducted to increase problem solving kills.
Course Goals Upon successful completion of this course, students will be able:

 To develop the understanding, working and organization of

microprocessor.

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  Develop a habit to write both memory and time optimized
code using assembly language.

Topics Covered in the Course, Attached

with Number of Lectures on Each
Topic
Lab Projects Yes
Theory & Lab Exam
Class Time Spent on (in credit Theory Problem Solution Labs
hours) Analysis Design
1 1 1 1

Lecture Book Reference Assessme

Week
# Contents (Sections) nt
Introduction to the Course Irvine: 2.1.1
Introduction to 8086 processor Art of Assembly: 3.1
Address and Data buses and their size Brey: 2.1
1
Control bus (Read Write and Memory/IO
signals) Mazidi: 0.2
Processor-Memory-I/O Model
1 Irvine: 2.2.2
Basic Computer Architecture Art of Assembly: 4.1
General purpose registers Brey: 2.1
2 Segment registers Mazidi: 1.2
Index registers
Purpose of these registers

Programing Model of X86 Irvine: 14.1.5

Assembler Directives (.model, .stack, .data,
.code, .exit), Mazidi: 1.4
Basic program structure, Mazidi: 2.1
3
Data movement among registers using
(MOV instruction), Irvine: 14.2.2
Writing first Program

2
Register addressing mode Irvine: 12.3.6
Immediate addressing mode Art of Assembly: 4.6
Direct addressing mode Brey: 3.1
Indirect addressing mode Art of Assembly: 4.7
4
Logical to Physical Address Conversion Mazidi: 1.6
Examples with MOV instruction

3 5 ALU instructions Art of Assembly: 6.5 A1

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 Flag register Mazidi: 3.1 Q1
Programming practice questions
Data types Art of Assembly: 5.3
6 Variable declaration and initialization Mazidi: 2.5
ALU operations on variables
Arrays & Loops Art of Assembly: 5.6.1
7 Base plus index addressing mode Brey: 6.1
4 Base relative plus index addressing mode
Jump & Branch instructions Art of Assembly: 10.1
8
Irvine: 6.9.4
Bit Manipulation Art of Assembly: 6.6
9 Shift: Arithmetic and Logical Shift Mazidi: 3.5
Rotations
5 Bit Masking Irvine:
Selective Set Mazidi: 3.6
10
Selective Clear Art of Assembly: 9.6
Selective Complement Brey:
Stack
11 Introduction to Stack
Saving and restoring variable in stack
Subroutines A2
6
CALL and RET statements Q2
12 Simple subroutines Art of Assembly: 8.7
Parameter Passing through Stack Brey: 6.3
Return value
Subroutines
13 Parameter passing through stack

7 Multiplication & Division Art of Assembly: 6.5.6

MUL and DIV Instructions Art of Assembly: 6.5.7
14
Programming exercise Mazidi: 3.2
Mazidi: 6.9
Adjustment
Instructions: AAA, AAD, AAM
15
8 Programming exercise

16 MID TERM
17 MID TERM PAPER REVIEW
Video Memory Art of Assembly: 23.1
9
18 Accessing video memory directly
Familiarize with ASCII and attribute
Display Memory
10 19 Screen Calculation and Printing
Programming exercise

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 String Instructions
Introduce basic string instructions Mazidi: 6.2
20
LES and LDS instruction Art of Assmbly: 6.3.3
Programming exercise
Software Interrupts Irvine: 14.1.4 Q3
Basic introduction of interrupts
21
BIOS and DOS interrupts for printing on
screen and reading keys Mazidi: 4.1
11
Software Interrupts Mazidi: 14.1
Explain the concept of IVT (IVT)
22
Writing ISRs
Writing ISR for Interrupt 0x65
Exceptions (Handling) Art of Assembly: 17.3
23 Divide by Zero
Overflow
12 Hardware Interrupts Art of Assembly: 17.4 A3
Programmable Interrupt Controller Mazidi: 14.3
24
IRQs

Interacting with I/O Irvine: 2.4.4 Q4

IN & Out Instructions Brey: 11.1
25
Application: Sending data to virtual printer Art of Assembly: 17.4.7
Programming exercise
13
X86 programming Notes
Introduction to x86 programming
26
32-bit registers

Inline assembly language programming in

visual studio A4
27
32-bit addressing modes
14
32-bit programming exercise
28

Exploiting Hardware features: Multi-Media

eXtension (MMX) Brey: 14.5 Q5
29
MMX registers
15
Exploiting data-level parallelism
MMX
30
MMX exercise
31 Revision
16
32 Revision

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