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WK1 Study Session 1.2

CISC

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moses ike
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0% found this document useful (0 votes)
22 views5 pages

WK1 Study Session 1.2

CISC

Uploaded by

moses ike
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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STUDY SESSION 1.

2
ARCHITECTURAL DEVELOPMENT AND STYLE
Section and Subsection Headings
Introduction
1.0 Learning Outcome
2.0 Main Content
2.1 Computer Architecture & Styles
2.2 RISCs & CISCs Architecture
2.3 Instruction Set Architecture (ISA) Design Issues
3.0 Summary and Conclusion
4.0 Self-Assessment Questions
5.0 Additional Activities (Videos, Animations & out of Class Activities)
6.0 Reference/Further Reading

Introduction
This study session is designed to give you a depth knowledge on the computer architectural
development, key features of CISC & RISC architecture as well as the design issues of instruction
set architecture will be discussed in this study session.
1.0 Specific Learning Outcomes
At the end of study session Students should be able to:
i. Understand and discuss on the architectural development & styles
ii. Distinguish between CISCs & RISCs Architecture
iii. List the design issues of ISA

2.0 Main Content


2.1 Computer Architecture & Styles
The task the computer designer faces is a complex one. He has to consider and determine what
attributes are important for a new computer, then design a computer to maximize performance
while staying within cost, power, and availability constraints. This task has many aspects,
including instruction set design, functional organization, logic design, and implementation. The
implementation may encompass integrated circuit design, packaging, power, and cooling.
Optimizing the design requires familiarity with a very wide range of technologies, from compilers
and operating systems to logic design and packaging.
Computer architects have always been striving to increase the performance of their architectures.
One philosophy was that by doing more in a single instruction, one can use a smaller number of
instructions to perform the same job. The immediate consequence of this is the need for a
less memory read/write operations and an eventual speedup of operations.
It was also argued that increasing the complexity of instructions and the number of addressing
modes have the theoretical advantage of reducing the “semantic gap” between the instructions in
a high-level language and those in the low level (machine) language. Machines following this
philosophy have been referred to as complex instructions set computers (CISCs). Examples of
CISC machines include: The Intel Pentium, the Motorola MC68000, and the IBM & Macintosh
PowerPC
A number of studies from the mid-70s and early 80s also identified that in typical programs, more
than 80% of the instructions executed are those using assignment statements, conditional
branching and procedure calls. Simple assignment statements constitute almost 50% of those
operations. These findings caused a different philosophy to emerge. This philosophy promotes the
optimization of architectures by speeding up those operations that are most frequently used while
reducing the instruction complexities and the number of addressing modes. Machines following
this philosophy have been referred to as Reduced Instructions Set Computers (RISCs). Examples
of RISCs include the Sun SPARC and MIPS machines.
The two philosophies in architecture design have led to the unresolved controversy which
architecture style is "best". It should however be mentioned that studies have indicated that RISC
architectures would indeed lead to faster execution of programs.
2.1 Features of RISCs & CISCs Architecture
RISCs Stands for Reduced Instruction Set Computers. Its underlying idea is to reduce the number
and complexity of instructions. New RISC computers may have some instruction that are quite
complex. Some of its features are:
i. One instruction per clock period
ii. All instructions have the same size
iii. CPU accesses memory only for Load and Store operations
iv. Simple and few addressing modes
CISCs Stands for Complex Instruction Set Computers. Because of its complex addressing modes,
operand fetch from memory is delayed thus serve as a disadvantage. Some of its features are:
i. More work per instruction
ii. Wide variety of addressing modes
iii. Variable instruction lengths and execution times per instruction
iv. CISC machines attempt to reduce the “semantic gap”

2.2 Instruction Set Architecture (ISA) Design Issues


ISA serves as an interface between software and hardware. It Provides a mechanism by which
the software tells the hardware what should be done.
High level language code : C, C++, Java, Fortran,
compiler
Assembly language code: architecture specific statements
assembler
Machine language code: architecture specific bit patterns
Software
instruction set
Hardware

Instruction set design issues include:


i. Where are operands stored? registers, memory, stack, accumulator
ii. How many explicit operands are there? 0, 1, 2, or 3
iii. How is the operand location specified? register, immediate, indirect, …
iv. What type & size of operands are supported? byte, int, float, double, string, vector
v. What operations are supported? add, sub, mul, move, compare . . .
In-text Question
1. List the features of CISC architecture

Answer
i. More work per instruction
ii. Wide variety of addressing modes
iii. Variable instruction lengths and execution times per instruction
iv. CISC machines attempt to reduce the “semantic gap”

1.0 Summary and Conclusion


Computer architecture is concerned with balancing the performance, efficiency, cost, and
reliability of a computer system. The case of instruction set architecture can be used to illustrate
the balance of these competing factors. More complex instruction sets enable programmers to write
more space efficient programs, since a single instruction can encode some higher-level abstraction
(such as the x86 Loop instruction). RISCs Stands for Reduced Instruction Set Computers. Its
underlying idea is to reduce the number and complexity of instructions. New RISC computers may
have some instruction that are quite complex. CISCs Stands for Complex Instruction Set
Computers. Because of its complex addressing modes, operand fetch from memory is delayed thus
serve as a disadvantage.
4.0 Self-Assessment Questions
1. Give a brief discussion on RISC & CISC architectural styles and their impact on machine
performance
2. Outline the features of CISCs & RISCs
3. Outline the design issues of ISA

5.0 Additional Activities (Videos, Animations & out of Class Activities)

http://www.svecw.edu.in/Docs%5CITIIBTechIISemLecCOA.pdf
http://www.ece.northwestern.edu/~kcoloma/ece361/lectures/Lec01-introduction.pdf
6.0 Reference/Further Reading
http://egov.uok.edu.in/elearningug/tutorials/5786_2_2016_161115130838.pdf
G. J. Myers, Advances in Computer Architecture, John Wiley, New York, 1982
Fundamentals of Computer Organization and Architecture by Mostafa Abd-El-Barr & Hesham
El-Rewini (A John Wiley & Sons, INC Publication)
https://en.wikipedia.org/wiki/Computer_architecture#:~:text=In%20computer%20engineering%
2C%20computer%20architecture,but%20not%20a%20particular%20implementation.

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