Instruction Set Architecture – Memory Locations and

Addresses
▪ The memory is organized a group of n bits and it can be stored or retrieved in a single,
basic operation.
▪ Each group of n bits is referred to as a word of information, and n is called the word length.
▪ Modern computers have word lengths that typically range from 16 to 64 bits.
▪ If the word length of a computer is 32 bits, a single word can store a 32-bit 2’s-
complement number or four ASCII characters, each occupying 8 bits.

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 Instruction Set Architecture – Memory Locations and
Addresses
▪ A unit of 8 bits is called a byte. Machine instructions may require one or more words for
their representation.
▪ Accessing the memory to store or retrieve a single item of information, either a word or a
byte, requires addresses for each item location.
▪ It is customary to use numbers from 0 through 2k −1, for some suitable value of k, as the
addresses of successive locations in the memory.

▪ The 2 k addresses constitute the address space of the computer, and the memory can
have up to 2 k addressable locations.
▪ A 32-bit address creates an address space of 232 or 4G (4 giga) locations, where 1G is
230. Other notational conventions that are commonly used are K (kilo) for the number
210 (1,024), and T (tera) for the number 240.

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 Instruction Set Architecture – Memory Locations and
Addresses
BYTE ADDRESSABILITY
▪ There are three basic information quantities: the bit, byte, and word.
▪ A byte is always 8 bits, but the word length typically ranges from 16 to 64 bits.
▪ Memory locations assignments refers to successive byte locations in memory.
▪ Byte locations have addresses 0, 1, 2, . . . . Thus, if the word length of the machine is
32 bits, successive words are located at addresses 0, 4, 8, . . . , with each word
consisting of four bytes.
▪ There are two ways that byte addresses can be assigned across words called as
big-endian and little-endian assignments.

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 Instruction Set Architecture – Memory Locations and
Addresses
BYTE ADDRESSABILITY

Both little-endian and

big-endian assignments
are used in commercial
machines.

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 Instructions and Instruction Sequencing
▪ The tasks carried out by a computer program consist of a sequence of small steps such as,
✓ adding two numbers
✓ testing for a particular condition
✓ reading a character from the keyboard
✓ sending a character to be displayed on a display screen.
▪ A computer must have instructions capable of performing four types of operations:
✓ Data transfers between the memory and the processor registers
✓ Arithmetic and logic operations on data
✓ Program sequencing and control
✓ I/O transfers
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 Instructions and Instruction Sequencing
REGISTER TRANSFER NOTATION (RTN)
▪ To transfer data from one location to another in a computer, data transfer instructions are
used. Locations that are involved in such transfers are,
►Memory locations ► Processor registers ►Registers in the I/O subsystem.
▪ To identify a location a symbolic name instead of its hardware binary address is used.
▪ Forex: names for the addresses of memory locations - LOC, PLACE, A, VAR2;
processor register names - R0, R5; and I/O register names - DATAIN, OUTSTATUS.
▪ The contents of a location are denoted by placing square brackets around the name of the
location. R1 ← [LOC]
▪ Thus, the expression means that the contents of memory location LOC are transferred into
processor register R1.

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 Instructions and Instruction Sequencing
REGISTER TRANSFER NOTATION (RTN)
▪ Ex-2: An operation that adds the contents of registers R1 and R2, and then places their sum
into register R3. This action is indicated as
▪ R3 ← [R1] + [R2]
▪ This is known as Register Transfer Notation (RTN).
▪ Note that the right-hand side of an RTN expression always denotes a value, and the
▪ left-hand side is the name of a location where the value is to be placed, overwriting the old
contents of that location.
ASSEMBLY LANGUAGE NOTATION: To represent a machine instructions and
programs, we use the assembly language notation or an assembly language format.
Examples: MOV LOC, R1 ADD R1, R2, R3
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 Instructions and Instruction Sequencing
BASIC INSTRUCTION FORMATS
The code written in high-level language will be compiled and converted to machine language.
The transfers of the instructions take place by fetching the data from different memory
locations and transferring the result into the memory or processor registers.
The four types of basic instruction formats are:
▪ Three Address Instructions
▪ Two Address Instructions
▪ One Address Instructions and
▪ Zero Address Instructions

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 Instructions and Instruction Sequencing
(i) Three address Instructions
▪ Let us consider an instruction contains the memory addresses of the three operands—A, B,
and C. This three-address instruction can be represented symbolically as
Add A, B, C
Operands A and B are called the source operands, C is called the destination operand, and
Add is the operation to be performed on the operands. A general instruction of this type has
the format
Operation Source1, Source2, Destination

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 Instructions and Instruction Sequencing
(ii) Two address Instructions
▪ An alternative approach to perform the same task, with each instruction having only one or
two operands. They are called two-address instructions. The general format:

Operation Source, Destination

▪ An Add instruction of this type is

Add A, B

the operation B←[A] + [B]. When the sum is calculated, the result is sent to the memory and
stored in location B, replacing the original contents of this location. This means that operand
B is both a source and a destination.

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 Instructions and Instruction Sequencing
(ii) Two address Instructions
▪ A single two-address instruction cannot be used to solve our original problem, which is to
add the contents of locations A and B, without destroying either of them, and to place the
sum in location C.
▪ The problem can be solved by using another two address instruction that copies the
contents of one memory location into another. Such an instruction is
Move B, C
▪ which performs the operation C←[B], leaving the contents of location B unchanged.

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 Instructions and Instruction Sequencing
(iii) One address Instructions
▪ Machine instructions that specify only one memory operand. When a second operand is
needed, as in the case of an Add instruction, it is understood implicitly to be in a unique
location, accumulator.
▪ A processor register, usually called the accumulator, is used for this purpose. Thus, the
one-address instruction
Add A // Adds the data of mem-loc A to
the ACC and places the result in ACC
The following are the examples of one-address instructions
Load A // copies data from mem-loc A into ACC
Store A // stores data of ACC into mem-loc A

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 Instructions and Instruction Sequencing
(iii) One address Instructions
▪ Using only one-address instructions, the operation C←[A]+[B] can be performed by
executing the sequence of instructions
Load A //copy from mem-loc A into ACC
Add B // ACC = ACC + mem-loc A
Store C // C = ACC

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 Instructions and Instruction Sequencing
(iv) Zero address Instructions
▪ It is also possible to use instructions in which the locations of all operands are defined
implicitly.
▪ Such instructions are found in machines that store operands in a structure called a
pushdown stack.
▪ In this case, the instructions are called zero-address instructions.

Push A // Data A is moved from memory into Stack

Push B // Data B is moved from memory into Stack
Add // Pops out B, A and adds A+B and pushes result into Stack
Pop X // Pops out the result and stores into mem-loc X

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