COA__SYLLABUS
COA__SYLLABUS
MODULE-1:
Functional blocks of a computer: CPU, memory, input-output subsystems, control unit.
Instruction set architecture of a CPU – registers, instruction execution cycle, RTL interpretation
of instructions, addressing modes, instruction set. Case study – instruction sets of some common
CPUs.
Data representation: signed number representation, fixed and floating point representations,
character representation. Computer arithmetic – integer addition and subtraction, ripple carry
adder, carry look-ahead adder, etc. multiplication – shift-and add, Booth multiplier, carry save
multiplier, etc. Division restoring and non-restoring techniques, floating point arithmetic.
MODULE-2:
Introduction to x86 architecture.
CPU control unit design: hardwired and micro-programmed design approaches, Case study –
design of a simple hypothetical CPU.
Memory system design: semiconductor memory technologies, memory organization.
Peripheral devices and their characteristics: Input-output subsystems, I/O device interface,
I/O transfers – program controlled, interrupt driven and DMA, privileged and non-privileged
instructions, software interrupts and exceptions. Programs and processes – role of interrupts in
process state transitions, I/O device interfaces – SCII, USB
MODULE-3:
Pipelining: Basic concepts of pipelining, throughput and speedup, pipeline hazards.
Parallel Processors: Introduction to parallel processors, Concurrent access to memory and cache
coherency.
MODULE-4:
Memory organization: Memory interleaving, concept of hierarchical memory organization, cache
memory, cache size Vs block size, mapping functions, replacement algorithms, write policies.
Course Outcomes:
After completion of this course, the students will be able to perform the following:
1. Draw the functional block diagram of single bus architecture of a computer and describe
the function of the instruction execution cycle, RTL interpretation of instructions,
addressing modes, instruction set.
2. Write assembly language program for specified microprocessors using different data
representations.
3. Design the ALU, Control Unit and CPU of a computer system.
4. Design a memory module and analyze its operation by interfacing with a given CPU
organization and instruction
5. Given a CPU organization, assess its performance, and apply design techniques to
enhance performance using pipelining, parallelism and RISC methodology.
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