Indonesian Journal of Electrical Engineering and Computer Science

Vol. 21, No. 3, March 2021, pp. 1309~1316

ISSN: 2502-4752, DOI: 10.11591/ijeecs.v21.i3.pp1309-1316  1309

Improved hybrid algorithm based on GA and local search

method for asymmetrical 9-level inverter

Rim Feyrouz Abdelgoui1, Rachid Taleb2, Abderrahim Bentaallah3, Fayçal Chabni4

1,3
Electrical Engineering Department, Djillali Liabes University, Sidi Bel Abbes, Algeria
Intelligent Control and Electrical Power Systems Laboratory (ICEPS)
2,4
Electrical Engineering Department, Hassiba Benbouali University, Chlef, Algeria
Laboratoire Génie Electrique et Energies Renouvelables (LGEER)

Article Info ABSTRACT

Article history: Selective harmonic elimination has emerged as an in-depth research method
to replace traditional PWM technology. This study demonstrates the selective
Received Aug 14, 2020 harmonic elimination by using a hybrid Genetic algorithm GA and local
Revised Sep 7, 2020 search (GA-LS) method of a uniform asymmetric multilevel inverter called
Accepted Sep 27, 2020 USAMI That removes the higher-order harmonics defined while maintaining
the fundamental voltage needed. This new technology can be implemented at
any USAMI level. For example, in this article, we plan to use USAMI at 9
Keywords: levels and find the optimal switching angle to remove the 5 th, 7th, and 11th
harmonics.
Method (LS)
Multilevel inverter
SHE
THD
USAM This is an open access article under the CC BY-SA license.

Corresponding Author:
Rim Feyrouz Abdelgoui
Electrical Engineering Department
Djillali Liabes University, Sidi Bel Abbes, Algeria
Intelligent Control and Electrical Power Systems Laboratory (ICEPS)
Email: [email protected]

1. INTRODUCTION
The main application of the multilevel inverter topology is generally electric traction and drive
locomotives of 3KV, electric boat variable speed drives, and transmission systems. The use of multilevel
converters in industrial equipment is inspired by energy benefits and has now been widely demonstrated:
energy is significantly reduced. the current harmonic distortion rate is also decreased and the power factor is
improved. Cascaded H-bridge multi-level inverters CHB utilize H-bridge cells linked in series with separate
DC voltage source attached to each of the H-bridge cells. There are two available kinds of CHB multi-level
inverters from the point of view of the value of the DC voltage sources: symmetrical and asymmetrical
topology.
Several topologies have been tested and presented with multilevel inverters which contain neutral-
point-clamped inverters [1, 2], imbricated cells, also flying capacitor inverters [2, 3], and linked cell sequence
inverters, also referred to as cascaded inverters [4]. Nevertheless, due to the nature of higher number levels,
the are some benefits to the topology that utilizes series-attached cell inverters, such as the lower level of
voltage (dU / dt) generating fewer mutual-mode voltage through machine windings [2, 5]. Also, this structure
is easy and allows it quickly extendable with his modular model for every number of the required output
voltage. Figure 1(b) shows a basic model of this configuration including k partial cells described by Figure

Journal homepage: http://ijeecs.iaescore.com

1310  ISSN: 2502-4752

1(a). A dc-voltage source supplied the jth single-phase inverter Udj (j=1 ... k). The relation among k
representing the number of inverters connected in series per phase and N describing the total of output
voltage levels provided through this configuration is defined by N = 2k + 1, if each partial inverter has
similar voltages [2].
In many of the known structures of multilevel converters [6], the total of power equipment requested
relies upon the output voltage level required [7]. Nevertheless, the rise in the converter circuit is a result of
the number of increased power semiconductors, control complexity, and costs. A uniform step asymmetrical
multilevel inverters could be employed to provide an enormous number of output levels with no rise in the
size of converters [8-10]. Making sure that the Total Harmonic Distortion is within reasonable limits of the
output voltage waveform is the main question in constructing an efficient multilevel inverter. In order to
maintain a small THD [11], selective harmonic elimination has been rigorously analyzed. A series of non-
linear transcendental equations are generated by the output voltage waveform computation utilizing Fourier
theory.
if exists an answer to these equations, it offers the necessary switching angles for some fundamental
element and the chosen harmonic profile. Iterative approaches have been used to resolve these collections of
equations, such as the Newton-Raphson method [12]. This approach relies on derivatives and can lead to
local optimum, also only a careful selection of the initial parameters assures convergence [13]. Other method
is provided in [14], which is based on transforming the transcendental equation to polynomial equations,
where the resulting method is applied to calculate the angles of switching to remove different harmonics.
However, this method seems unimportant because the level of the polynomial of the mathematical design
increase when the total of inverter levels rises. This is likely to result in numerical complexity and also a
major computational burden.

(a) (b)

Figure 1. (a) A series-connected topology of multilevel inverters with k partial cells,

(b) Partial structure of cells

Genetic Algorithm abbreviated by GA is a very effective algorithm that might resolve nearly all
optimization issues, imitates the natural evolution mechanism, and is mostly used to attain the optimal
solutions [10, 14]. In order to obtain the perfect local search in GA, the hybrid algorithm (GA-LS) was
created. It is a mixture of GA [15, 16] and Local Search. To evaluate the optimal switching angles, this
combination was implemented for the 9-level USAMI.

2. DESIGN OF USAMI
As possible, multilevel inverters generate many identical voltages levels to the reference signal at
the ac terminal. Us1, Us2, ... UsN represent N voltage levels which composed a conventional sine exit voltage
waveform. The step of the output voltage is characterized through the difference among two successive
voltages, if this step ∆U among all voltage levels is identical, this inverter is called « Uniform Step multilevel
inverter » [17]. This constant step is equivalent to the lowest dc-voltage, Ud1 [2], in this situation. It is
possible to describe this by:

|𝑈𝑠𝑙 − 𝑈𝑠(𝑙−1) | = ∆𝑈 = 𝑈𝑑1 , 𝑙 = 2 𝐾 𝑁 (1)

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Indonesian J Elec Eng & Comp Sci ISSN: 2502-4752  1311

The converter is known as the non-uniform phase AMI or varying AMI if this isn’t the situation. To
feed the partial cells (inverters) which compose his topology via dc voltage sources under the following
requirements:

𝑈𝑑1 ≤ 𝑈𝑑2 ≤ 𝑈𝑑3 ≤ ⋯ ≤ 𝑈𝑑𝑘

{ 𝑗−1 (2)
𝑈𝑑𝑗 ≤ 1 + 2 ∑𝑙=1 𝑈𝑑𝑙

Here k is the total of partial cells in each phase. N could be concluded from j = 1…k.
𝑈𝑑𝑗
𝑁 = 1 + 2 ∑𝑘𝑗=1 𝑈 (3)
𝑑1

This relation essentially changed the total of levels that the multilevel geometry produces. In fact,
the N value relies on the cell count per phase plus the dc voltages provided [2].
In (3) approve a variety of anserws. For example,for the three partalials inverters to achieve a output
of 13 levels, there can be two potential combinations of voltages levels Ud1 1, 1, Ud2 1, 2 and Ud3
4,3 but to generate a 15-level global output , there are three possible combinations Ud1 1, 1,1, Ud2 1,
2,3 and Ud3 5,4,3. Figure 3 exhibit the alternative output voltages of the 9-level inverter's three partial
cells indicated Up1, Up2 and Up3 with k= 3. Dc-voltages of cells are given by Ud1 = 1p.u., Ud2 =1p.u. and Ud3
= 2p.u.It isbetter to use the following combinations: Up1  -1, 0, 1, Up2  -1, 0, 1 and Up3  -2, 0, 2.
The outcomes is a produced 9-level output voltage : Us  -4, -3, -2, -1, 0, 1, 2, 3, 4 .
Various commutation sequences can produce output voltage levels. There are four alternative
commutation sequences, for example Up1  -1, 0, 1,1, Up2  1, 0, -1,1 and Up3  2, 2, 2,0 leading in
Us  2p.u .To optimize the switching process of the inverter [2], these redundant combinations can be picked.
Such distinct possibilities provided by the partial inverter output voltage and the redundancies among them in
delivering the identical output voltage level could be treated as permutations that can be used to doing
optimization of the use of USAMI. Multi-level inverter's standard output voltage waveform as shown in
Figure 2.

Figure 2. Multi-level inverter's standard output voltage Figure 3. Each partial inverter 's possible output
waveform voltages to generate N=9 levels with k = 3 cells
per phase(Ud1  1p.u., Ud2  1p.u. and Ud3 
2p.u.)

3. MODULATION CONTROL
In general, both the conventional theory of PWM control and the SVPWM (space vector PWM)
approach applied to the control of symmetrical multilevel inverter modulation [18, 19], which can be used to
control USAMI. Due to the high switching frequencies of these methods, it causes extra losses. Thus, the
low-switching frequency command techniques, for instance, selective harmonic elimination, show important
solutions [20-22].
The SHE is focused on the voltage 𝑈𝑠 produced by the Fourier analysis of output of the uniform step
asymmetrical multilevel inverter as shown in Figure 2. 𝑈𝑠 is symmetric in half and a quarter of a period. As a

Improved hybrid algorithm based on GA andlocal search method for… (Rim Feyrouz Abdelgoui)
1312  ISSN: 2502-4752

consequence, all the harmonic elements are null. Therefore, for the 𝑈𝑠 voltage, the Fourier series expansion
is [23]:
4𝑈𝑑1
𝑈𝑠 = ∑∞
𝑛=1 𝑈𝑛 sin(𝑛𝜔𝑡) , with 𝑈𝑛 = ∑𝑝𝑖=1 cos(𝑛𝜃𝑖 ) (4)
𝑛𝜋

Where: Un defines largeness of the harmonic term of rank n, p represents is the total of switching angles per
quarter waveform given by p= (N - 1)/2 and 𝜃𝑖 describes the 𝑖𝑡ℎ switching angle [2, 22].
The number of switching angles shown in (4) is determined by maintaining the amplitude of the
fundamental term and rescinding the p-1 element. Virtually, 𝜃1 , 𝜃2 , 𝜃3 𝑎𝑛𝑑 𝜃4 are necessary for deleting
harmonics with non-multiple of 3, therefore 5, 7 and 11and odd rank). In the situation of the USAMI 3-Phase
9-level formed of k = 3 partial inverters provided with Ud1, Ud2 and Ud3 which Ud1=1p.u., Ud2=1p.u and
Ud3=2p.u .we can find the switching angles by resolving the correspondent below this [2, 22, 23]:

∑𝑝=4
𝑖=1 cos( 𝜃𝑖 ) = 𝜋𝑟
{ (5)
∑𝑝=4
𝑖=1 cos(𝑛𝜃𝑖 ) = 0 𝑓𝑜𝑟 𝑛 ∈
{5,7, 11}

Which r represents the modulation rate given by r U1/4Ud1 is the. The answer of (5) should as well
meet the requirement of:

0 < 𝜃1 < 𝜃2 < 𝜃3 < 𝜃4 < 𝜋⁄2 (6)

For the method of optimization, which is chosen to measure the efficacity of removing the chosen
harmonics rank through holding the fundamental element at a predefined value, an objective function is then
required. Consequently, This objective function is represented as [22, 3]:

𝑝=4 2
𝐹(𝜃) = 𝐹(𝜃1 𝛬𝜃4 ) = (∑𝑖=1 cos(𝜃𝑖 ) − 𝜋𝑟) + ∑𝑖=5,7,11 𝑈𝑖2 (7)

By optimizing (7) according to the constraint (6) and, as a result, It achieves the necessary harmonic
profile. The non-linearity of (5) is the key difficulty because many iterative methods are confronted with
difficulties of convergence and other approaches are complicated like elimination utilizing resulting [10] and
Walsh function [24]. Therefore, hybrid GA with local search methods (GA-LS) is a simple approach and
worth considering.

4. PROPOSED HYBRID ALGORITHM (GA-LS)

To solve the problem of local search in GA, A hybrid algorithm for genetic optimization has been
established. The hybrid GA is a combination of local search (LS) and the Algorithm of Genetic Optimization
[2, 15, 24]. In this research, using hybrid genetic algorithms with local search methods (GA-LS), the
MATLAB toolbox was used to decide the optimal switching angles. By using a composite function that
operates after the end of the GA, the value of the given objective function is reduced. The final point defined
by the GA is utilized as an initial point for the hybrid function. Fmincon, which is a local search tool, is
favored in this study as a hybrid function, and it is often utilized to calculate the minimum value of the
suggested cost function. The flow chart is proven in Figure 4 for the hybrid algorithm for SHE .
To find the optimal angles(𝜃1 , 𝜃2 , 𝜃3 , 𝜃4), for 9-level USAMI, this process was utilized to remove
the 5th, 7th, and 11th harmonics. The outcome is shown in Figure 5 in which one can see the existence of two
possible angle solutions for 0.70 ≤ r ≤ 0.76. On the other hand, no solution is approved by the system for r <
0.629, 0.64 < r < 0.7 and 0.897 < r < 0.921. With all other r values, the method seems to have the only
answer
For two potential angle solutions, it is a straightforward way to choose the one that gives the
smallest THD achieved from (8) to have a particular solution 𝜃𝑖 . The THD that corresponds to the solutions
shown in Figure 5 is displayed in Figure 6 [25].

1 p=4 2
√∑∞
n=5,7,.. ( ∑i=1 cos(n 𝜃𝑖 ))
THD = n ⁄ (8)
∑p=4
i=1 cos(𝜃𝑖 )

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Indonesian J Elec Eng & Comp Sci ISSN: 2502-4752  1313

Figure 4. GA-LS's flowchart for SHE

90 14
Thata1
Switching angles (deg)

80 Thata2 13
Thata3
Thata4 12
70
11
THD (%)

60
10
50
9
40
8
30
7
20 6

10 5
0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1
modulation rate, r modulation rate, r

Figure 5. All switching angles versus r for a 9-level Figure 6. THD versus r for all switching angles
USAMI

A comparison is provided in Table 1 among the traditional GA and the hybrid algorithm (GA-LS)
suggested for the computing time and the identical THD. The developed algorithm, which clearly illustrates
the superiority of the technology implemented in terms of computational burden and performance waveform
efficiency, is both extremely quick and optimum than traditional GA.

Table 1. Comparison among traditional GA and the GA-LS algorithm proposed

Technique THD % Computational time [s]
GA 7.22 12.45
GA-LS 2.17 1.13

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1314  ISSN: 2502-4752

5. TEST RESULTS
Simulations were performed in this section to test the GA-LS method presented in Section 4.
utilizing Matlab-Simulink. Uniform Step Asymmetrical Multilevel Inverter 9-level supplied by three voltage
sources Ud1 = 1p.u., Ud2 = 1p.u. and Ud3 = 2p.u. (Ud1 = 250V, Ud2 = 250V and Ud3 =500V). connected to
Induction motor that follwing data: Rs =0.228Ω(Stator resistance), Rr = 0.332Ω(Rotor resistance), Ls
=0.0084H(Stator inductance), Lr=0.0082H(Rotor inductance), Lm = 0.0078H(mutual inductance) ,P =
3(number of pole pairs), J = 20kg.m2(Rotor initia), Pn = 1MW(Rated power), Kf = 0.008Nm.s.rad-1 (viscous
friction cofficient).
In this experience, we use r=0.75 to generate a fundamental voltage of U1 which U1 =4
rUd1=3p.u(i.e.,U1=750 V) and f=50hz. As revealed in Figure 5, it can be noted that there are two possible
solutions for r=0.75 that can reduce THD (i.e.6.98%) is adopted as shown in Figure 6. Figure 7 displayed the
output voltages Up1, Up2, and Up3 of each partial inverter, and Ua the phase a voltage
The harmonic composition of Ua is determined by the utilization of the Fast Fourier Transform
(FFT) as defined in Figure 8. This figure demonstrates that, as expected, there are no 5th,7th, and 11th
harmonics in the signal. It is not necessary to eliminate the 3rd,6rd, and 9th, etc in each phase, because the line
voltage is automatically annulled. Measure and confirm that the THD line voltage is 6.91% which is positive
compared to the expected value of 6.89% as illustrated in Figure 6.
Figure 9 indicates the phase “a “of current ia conformable to Ua.. Figure 10 gives the harmonic
content of the current, we should note that the harmonic tenor of Ua is bigger than ia. This is the consequence
of the filtration provided by the motor inductance. The new THD is 1.08%.

1
Up1 ( p.u.)

-1

1
Up2 ( p.u.)

-1

2
Up3 ( p.u.)

-2

4
Ua ( p.u.) = Up1 + Up2 + Up3

-1

-2

-3

-4
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02

time (s)

Figure 7. Each partial inverter's output voltages (r=0.75)

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Indonesian J Elec Eng & Comp Sci ISSN: 2502-4752  1315

1.5
3
1
Amplitude (p.u.)

ias (KA)
0.5
2

1 -0.5
5th 7th 11th
-1

0
0 5 10 15 20 25 0 0.5 1 1.5
harmonic ranks time (s)

Figure 8. Ua’s Harmonic Output Figure 9. Phase a of current that corresponds to Ua

0.5

0.4
Amplitude (KA)

0.3

0.2

0.1

0
0 5 10 15 20 25

harmonic ranks

Figure 10. harmonic 's output of the phase a current ia

6. CONCLUSION
This paper suggests a hybrid algorithm (GA-LS) for the optimum angle of switching to remove
some harmonic order for the 9-levels USAMI. The results show that in the USAMI 9-level harmonics of 5th,
7th and 11th order are effectively removed. The proposed technique is comparable to traditional GA In view of
computing time and resulting THD, Where it shows that the algorithm might be applied effectively to
selective harmonic elimination of USAMI and both the computing-time and THD can be significantly
decreased. For any problem, that needs optimization as part of this approach, GA-LS can be used. It may
too be included in several applications for power electronics.

REFERENCES
[1] S. Ponkumar, S. M. Rivera, F. Kamroon and S. G. Kumar, "Realization of cascaded multilevel inverter," 2017
CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies
(CHILECON), Pucon, 2017, pp. 1-7, doi: 10.1109/CHILECON.2017.8229701.
[2] R. Taleb, M. Helaimi, D. Benyoucef, and Z. Boudjema, "Genetic algorithm application in asymmetrical 9-level
inverter," International Journal of Power Electronics and Drive Systems. vol. 7, no. 2, pp. 521-530, 2016.
[3] G. A. Saccol, J. C. Giacomini, A. L. Batschauer and C. Rech, "Comprehensive Analysis of Single-Phase Full-
Bridge Asymmetrical Flying Capacitor Inverters," in IEEE Transactions on Industry Applications, vol. 55, no. 2,
pp. 1775-1786, March-April 2019, doi: 10.1109/TIA.2018.2883549.
[4] T. D. C. Busarello, A. Mortezaei, H. K. M. Paredes, A. Al-Durra, J. A. Pomilio and M. G. Simões, "Simplified
Small-Signal Model for Output Voltage Control of Asymmetric Cascaded H-Bridge Multilevel Inverter," in IEEE
Transactions on Power Electronics, vol. 33, no. 4, pp. 3509-3519, April 2018, doi: 10.1109/TPEL.2017.2704919.
[5] Arikesh A., A. K. Parvathy, "Modular multilevel inverter for renewable energy applications", International Journal
of Electrical and Computer Engineering, vol. 10, no. 1, pp. 1-14, 2020.
[6] H. Vahedi, A. Dehghanzadeh and K. Al-Haddad, "Static VAr compensator using packed U-cell based multilevel
converter," 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering
(CPE-POWERENG 2018), Doha, pp. 1-5, 2018.
[7] E. Can, H.H. Sayan, "A novel SSPWM controlling inverter running nonlinear device," Electrical Engineering, vol.
100, no. 1, pp. 39-46, 2018.

Improved hybrid algorithm based on GA andlocal search method for… (Rim Feyrouz Abdelgoui)
1316  ISSN: 2502-4752

[8] E. Can, H.H. Sayan, "The increasing harmonic effects of SSPWM multilevel inverter controlling load currents
investigated on modulation index", Tehnički vjesnik, vol. 24, no. 2, pp. 397-404, 2017.
[9] J. S. Jagabar and V. Krishnaswamy, "An assessment of recent multilevel inverter topologies with reduced power
electronics components for renewable applications," Renew. Sustain. Energy Rev., vol. 82, no. 3, pp. 3379-3399,
2018.
[10] F. Chabni, R. Taleb, and M. Helaimi, "Optimum SHEPWM for a new 21-level inverter topology using numerical
optimization methods: experimental comparative study," JVC/Journal Vib. Control, vol. 24, no. 23, pp. 5556-5569,
2018.
[11] M. Srndovic, A. Zhetessov, T. Alizadeh, Y. L. Familiant, G. Grandi and A. Ruderman, "Simultaneous Selective
Harmonic Elimination and THD Minimization for a Single-Phase Multilevel Inverter With Staircase Modulation,"
in IEEE Transactions on Industry Applications, vol. 54, no. 2, pp. 1532-1541, March-April 2018, doi:
10.1109/TIA.2017.2775178.
[12] M. Al-Hitmi, S. Ahmad, A. Iqbal, S. Padmanaban, and I. Ashraf, "Selective harmonic elimination in awide
modulation range using modified Newton-raphson and pattern generation methods for a multilevel inverter"
Energies, vol. 11, no. 2, pp. 1-16, 2018.
[13] S. Ahmad, I. Ashraf, A. Iqbal and M. A. A. Fatimi, "SHE PWM for multilevel inverter using modified NR and
pattern generation for wide range of solutions," 2018 IEEE 12th International Conference on Compatibility, Power
Electronics and Power Engineering (CPE-POWERENG 2018), Doha, 2018, pp. 1-6, doi:
10.1109/CPE.2018.8372498.
[14] E. Can, "Fault Determination and Analysis of Complex Switching Structure at Multilevel Inverter," Tehnički
vjesnik, vol. 26, no. 2, pp. 398-404, 2019.
[15] K.Saleh, N.Hantouli, "A photovoltaic integrated unified power quality conditioner with a 27-level
inverter",Telecommunication, Computing, Electronics and Control, vol. 17, no. 6, pp. 3232-3248, December 2019.
[16] Y. Zhou, F. He, and Y. Qiu, "Optimization of parallel iterated local search algorithms on graphics processing unit "
J. Supercomput., vol. 72, no. 6, pp. 2394-2416, 2016.
[17] J. Ramesh Rahul, K.Annamalai, "Multistring seven-level quasi Z-source based asymmetrical inverter", Indonesian
Journal of Electrical Engineering and Computer Science, vol. 15, no. 1, pp. 88-94, July 2019.
[18] E. Can, "Novel high multilevel inverters investigated on simulation," Electrical Engineering, vol. 99, no. 2, pp.
633-638, 2017.
[19] M. V. Rajkumar and T. Nadu, "Modeling and Simulation of Asymmetric Cascaded Multilevel Inverter with
Reduced Switches using Multicarrier PWM Control," International Journal of Advanced Research in Electrical,
Electronics and Instrumentation Engineering, vol. 5, no. 10, pp. 8064-8071, October 2016.
[20] M. S. A. Dahidah, G. Konstantinou, and V. G. Agelidis, "A Review of Multilevel Selective Harmonic Elimination
PWM: Formulations, Solving Algorithms, Implementation and Applications, " IEEE Trans. Power Electron., vol.
30, no. 8, pp. 4091-4106, 2015.
[21] N. Vinoth et al., "Simulated Annealing Based Selective Harmonic Elimination for Multi-level Inverter " Energy
Procedia, vol. 117, pp. 855-861, 2017.
[22] M. Rasheed, R. Omar, M. Sulaiman, W.Abd Halim, "A modified cascaded h-bridge multilevel inverter based on
particle swarm optimisation (PSO) technique", Indonesian Journal of Electrical Engineering and Computer
Science, vol. 16, no. 1, pp. 41-51, 2019.
[23] E. H. Aboadla, S. Khan, al, " A novel optimization harmonic elimination technique for cascaded multilevel
inverter", Bulletin of Electrical Engineering and Informatics, vol. 8, no. 2, pp. 405-413, 2019.
[24] E. Deniz, O. Aydogmus, and Z. Aydogmus, "Implementation of ANN-based Selective Harmonic Elimination PWM
using Hybrid Genetic Algorithm-based optimization," Meas. J. Int. Meas. Confed., vol. 85, pp. 32-42, 2016.
[25] M. Rasheed, R. Omar, M. Sulaiman, W.Abd Halim, "A modified cascaded h-bridge multilevel inverter based on
particle swarm optimisation (PSO) technique", Indonesian Journal of Electrical Engineering and Computer
Science, vol. 16, no. 1, pp. 41-51, 2019.

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