Module 1: Principles of Combinational Logic
Definition of Combinational Logic
• Combinational logic circuits are built using basic gates (AND, OR, NOT, NAND, NOR, XOR,
XNOR).
• These circuits perform specific functions by combining the gates in a certain way.
• Key point: The output depends only on the present input values, not on past inputs.
• Examples of useful combinational logic functions include:
• • Arithmetic circuits: adders, subtractors, multipliers, dividers
• • Data handling circuits: encoders, decoders, multiplexers, demultiplexers
• • Display and control circuits: display drivers, keyboard encoders
• If a circuit has feedback from output to input, it becomes sequential, not combinational.
• Combinational circuits contain no memory, while sequential circuits use memory devices (like
flip-flops).
• General representation: y = f(a), where 'a' is the set of input variables and 'y' is the set of
outputs.
General Logic Design Sequence
• The design of a combinational circuit generally follows these steps:
• 1. State the problem clearly in words (verbal description).
• 2. Identify the number of input and output variables required.
• 3. Construct a truth table that defines how outputs relate to all possible input combinations.
• 4. Derive Boolean switching expressions from the truth table.
• 5. Simplify the Boolean expressions using techniques like Karnaugh Maps (K-Maps) or
algorithmic methods such as Quine-McCluskey.
• 6. Implement the simplified Boolean expressions using basic gates to create the final schematic
diagram.
Truth Table Representation
• Truth tables are used to define how output values depend on different combinations of inputs.
• Each row of the truth table corresponds to one possible input state.
• Examples of design problems:
• • Compare two 2-bit binary numbers: Outputs can indicate (i) numbers differ by 2 or more, (ii)
numbers are identical, (iii) first number exceeds second.
• • Check if the sum of two 2-bit numbers is odd: Requires 4 inputs and 1 output.
• • Design a circuit for the 9’s complement of a BCD digit (e.g., 1→8, 2→7, etc.).
• • Convert a BCD input to its Excess-3 code (important in digital displays).
Important Definitions
• Literal: A Boolean variable or its complement (e.g., X, X').
• Product term: Logical AND of literals (e.g., XY, X'YZ).
• Sum term: Logical OR of literals (e.g., X+Y, X+Y+Z).
• Sum of Products (SOP): OR of multiple product terms (e.g., X'Y + XY + YZ).
• Product of Sums (POS): AND of multiple sum terms (e.g., (X+Y)(X'+Z)).
• Minterm: A product term containing all input variables exactly once, either complemented or
uncomplemented.
• Maxterm: A sum term containing all input variables exactly once, either complemented or
uncomplemented.
Canonical Forms
• Canonical forms standardize Boolean expressions so that every term includes all input
variables.
• Canonical Minterm (Σ notation): Expression written as the sum of minterms for which the
function evaluates to 1.
• Canonical Maxterm (Π notation): Expression written as the product of maxterms for which the
function evaluates to 0.
Conversions
• SOP → Canonical SOP: If a product term is missing a variable, multiply it with (variable +
complement). Example: XY → XY(Z+Z') = XYZ + XY Z'.
• POS → Canonical POS: If a sum term is missing a variable, add it along with its complement.
Example: (X+Y) → (X+Y+Z)(X+Y+Z').
Karnaugh Maps (K-Maps)
• K-Maps are graphical tools to simplify Boolean expressions quickly and systematically.
• They are especially useful for up to 4 variables (beyond which MEV or tabular methods are
preferred).
• Each cell in a K-Map represents a minterm (for SOP) or a maxterm (for POS).
• Rules for grouping:
• • Group sizes must be powers of 2 (1, 2, 4, 8, 16).
• • Groups should be as large as possible for maximum simplification.
• • Groups may wrap around edges (treating K-Map like a torus).
• • Each group eliminates one or more variables depending on size.
• Types:
• • 1-variable map (2 cells)
• • 2-variable map (4 cells)
• • 3-variable map (8 cells, can be visualized as folding a cylinder)
• • 4-variable map (16 cells, treated as a cube or wrapped surface)
Grouping in K-Maps
• Process of grouping adjacent 1’s to simplify expressions:
• • 2-cell group → eliminates 1 variable
• • 4-cell group → eliminates 2 variables
• • 8-cell group → eliminates 3 variables
• • 16-cell group → eliminates all variables (function = 1)
• Prime implicants: Groups that cannot be combined further.
• Essential prime implicants: Prime implicants that cover minterms not covered by any other
group.
Problems
• Worked examples in the module include:
• • Finding prime implicants and essential prime implicants for 3- and 4-variable functions.
• • Minimizing incomplete Boolean functions with 'don’t care' conditions using K-Maps.
• • Reducing expressions to minimal SOP/POS forms.
Map Entered Variables (MEV) Technique
• When the number of variables exceeds 4, K-Maps become complex.
• The MEV technique uses smaller maps (like 2-variable maps) but allows cells to contain
variables (or their complements).
• This allows handling higher-variable functions in a simpler way.
• Procedure:
• • Treat some variables as 'map entered variables'.
• • Fill K-Map cells with variables, 0, 1, or don’t cares.
• • Group as usual, considering MEV variables as part of expressions.
• • Final simplified function is derived by combining map variables with MEV variables.
Question Bank
• Covers exam-style problems including:
• • Definitions and applications of combinational vs sequential circuits.
• • Canonical SOP and POS conversions.
• • K-Map simplifications (with and without don’t cares).
• • Designing circuits for 2’s complement, majority logic, etc.
• • Implementations using only NAND or NOR gates.
• • Problems on MEV technique for >4 variables.
