Chapter4 (Lect 41-44 Micro Operations)
Chapter4 (Lect 41-44 Micro Operations)
R3 ←R1+R2+1
cpe 252: Computer Organization 3
4-4 Arithmetic Microoperations cont.
• One’s Complement Microoperation:
R2 ←R2
• Two’s Complement Microoperation:
R2 ←R2+1
• Increment Microoperation:
R2 ←R2+1
• Decrement Microoperation:
R2 ←R2-1
cpe 252: Computer Organization 4
Half Adder/Full Adder
Half Adder x y c s x
0 0 0 0 c = xy s = xy’ + x’y c
=x y y
0 1 0 1
1 0 0 1 s
1 1 1 0
Full Adder
y y
x y cn-1 cn s
0 0 0 0 0 0 0 0 1
0 0 1 0 1 0 1 c 1 0 cn-1
n-1
0 1 0 0 1 x 1 1 x 0 1
0 1 1 1 0 0 1 1 0
1 0 0 0 1 cn s
1 0 1 1 0
1 1 0 1 0 cn = xy + xcn-1+ ycn-1
1 1 1 1 1 = xy + (x y)cn-1
x s = x’y’cn-1+x’yc’n-1+xy’c’n-1+xycn-1
y S = x y cn-1 = (x y) cn-1
cn-1
cn
cpe 252: Computer Organization 5
4-4 Arithmetic Microoperations
Binary Adder
B3 A3 B2 A2 B1 A1 B0 A0
C3 C2 C1
FA FA FA FA C0
C4 S3 S2 S1 S0
C3 C2 C1 C0
FA FA FA FA
C4 S3 S2 S1 S0
4-bit adder-subtractor
1000
C3 1, if overflow
=V
C4 0, if no overflow
x y x y x y x y
HA HA HA HA
C S C S C S C S
C4 S3 S2 S1 S0
3 2 1 0 S 1 S0 3 2 1 0 S 1 S0 3 2 1 0 S 1 S0 3 2 1 0 S 1 S0
Y3 X3 Y2 X2 Y1 X1 Y0 X0
C3 C2 C1
FA FA FA FA Cin
Cout D3 D2 D1 D0
• Gate:
• Gate:
• Gate:
• Gate:
• Gate:
• Gate:
1 0 E=AB AND
1 Ei
1 1 E=A Complem
ent
Shift Left
**Note that the bit ri is the bit at position (i) of the register
? rn-1 r3 r2 r1 r0 0
rn-1 r3 r2 r1 r0
rn-1 r3 r2 r1 r0
?
? rn-1 r3 r2 r1 r0 0
Sign
Arithmetic Shift Left
Bit
Vs = Rn-1 Rn-2
Rn-1 1 overflow
Vs =
Rn-2 0 no overflow
Select
H3 H2 H1 H0
One stage of Di
arithmetic
circuit (Fig.A)
Select
One stage of Fi
ALU Ci+1 0 4×1
1 MUX
One stage of Ei 2
logic circuit
Bi (Fig.B) 3
Ai
shr
Ai+1
shl
Ai-1