Assembler Concepts II

Copyright © 2014 by David Woolbright.

Variable Number of Parameters
• Subprograms can be written to handle a variable
number of parameters
• Typical link:
LINK EP=SUB,PARAM=(X,Y,Z),VL=1
• The VL=1 causes a 1 bit to be placed in the 32 nd
bit of the last parameter address
DC A(Z+X’80000000’)
 31 Bit Addresses
• 31 bit addresses are stored in 32 bit
fullwords
• The high-order bit can be 1 or 0 without
affecting the address
10000000111111110000000011111111
00000000111111110000000011111111
The first fullword is negative and the second
is positive
Variable Number of Parameters
• The one bit effectively makes the last
address a negative two’s complement
integer
• We can use this to detect the last
parameter when passing a variable
number of parameters.
Variable Number of Parameters
• Assume we are passing one or more
fullwords:
LINK EP=SUB,PARAM=(X,Y,Z),VL=1
R1
A(X)
A(Y)
X
Positve A(Z)
Y
Negative
Z
 Program #1
• Write a subprogram called VARPARM that is
passed a variable number of parameters. Each
parameter is a fullword. The subprogram should
print each integer parameter on a separate line.
• Use these definitions in a main program:
W DC F’1000’
X DC F’2000’
Y DC F’3000’
Z DC F’4000’
 Program #1
• Write a main program called VARRUN
which dynamically links (one time) to
VARPARM and braches over to it four
times.
• The first time pass W
• The second time pass W and Z
• The third time pass X,Y, and Z
• The fourth time pass W,X,Y and Z
 Working With Bits
• Let 1 be true and 0 be false
• Truth table for OR
P Q P OR Q
0 0 0
0 1 1
1 0 1
1 1 1
 Working With Bits
• Let 1 be true and 0 be false
• Truth table for EXCLUSIVE OR
P Q P EXCLUSIVE OR Q
0 0 0
0 1 1
1 0 1
1 1 0
 Working With Bits
• Let 1 be true and 0 be false
• Truth table for AND
P Q P AND Q
0 0 0
0 1 0
1 0 0
1 1 1
 Bit Instructions

• Types of bit operations in assembler

TYPE OR EXCLUSIVE OR AND
RX O X N
RR OR XR NR
SI OI XI NI
SS1 OC XC NC
 Bit Operations
• For all operations, think of operand 1 as
the target field, and operand 2 as the
“mask”
• Operations compare bits in the mask to
bits in the target and modify the target
based on the operation and bit contents
 Bit Operations
• All operations set the condition code
• CC = 0 if all target bits are 0.
Test with BZ or BNZ
• CC = 1 if any target bit is set to 1
Test with BM or BNM
 AND Operation
• Assume:
DS 0F
MASK DC B’11110000111100001111000011111000’
TARGET DC B’10101010101010101010101010101010’

L R7,MASK
L R8,TARGET
NR R8,R7
 AND Operation (RR)
• Assume:
DS 0F
MASK DC B’11110000111100001111000011111000’
TARGET DC B’10101010101010101010101010101010’
R8: B’10100000101000001010000010101000’
L R7,MASK
L R8,TARGET
NR R8,R7
 OR Operation (RX)
• Assume:
DS 0F
MASK DC B’11110000111100001111000011111000’
TARGET DC B’10101010101010101010101010101010’

L R8,TARGET
O R8,MASK
 OR Operation (RX)
• Assume:
DS 0F
MASK DC B’11110000111100001111000011111000’
TARGET DC B’10101010101010101010101010101010’
R8: B’11111010111110101111101011111010’
L R8,TARGET
O R8,MASK
 XOR Operation (SS1)
• Assume:
MASK DC B’1111000011110000’
TARGET DC B’1010101010101010’

XC TARGET,MASK
 XOR Operation (SS1)
• Assume:
MASK DC B’1111000011110000’
TARGET DC B’1010101010101010’
TARGET: B’0101101001011010’
XC TARGET,MASK
 AND Operation (SI)
• Assume:
TARGET DC B’10101010’

NI TARGET,B’11110000’
 AND Operation (SI)
• Assume:
TARGET DC B’10101010’
TARGET: B’10100000’
NI TARGET,B’11110000’
 Where’s NOT?
• A NOT operation would look like this:

P NOT P
0 1
1 0
 Use Exclusive Or for NOT
• Exclusive Or-ing binary 1’s against a field flips the bits,
and effectively produces a NOT
• Example:
Assume R8 (Before): X’F0F0F0F0’
X R8,ONES
…
DS 0F
ONES DC X’FFFFFFFF’
 Use Exclusive Or for NOT
• Exclusive Or-ing binary 1’s against a field flips the bits,
and effectively produces a NOT
• Example:
Assume R8 (Before): X’F0F0F0F0’
X R8,ONES
…
DS 0F
ONES DC X’FFFFFFFF’
R8 (After): X’0F0F0F0F’
 Uses For Bit Operations
• Clearing a field to all 0’s
XC TARGET,TARGET
• Setting certain bits to 0
XC TARGET,=B’10101010’
• Setting a field to all 1’s
OC TARGET,=B’11111111’
 Uses For Bit Operations
• Exchanging two registers
5:1100 7:1010
XR R5,R7 5:0110 7:1010
XR R7,R5 5:0110 7:1100
XR R5,R7 5:1010 7:1100
 Uses For Bit Operations
• Test CUSTCODE to see if any of its first
four bits are set to 1

MVC TEST,CUSTCODE
NI TEST,=B’11110000’
BNZ ABITON
 Uses For Bit Operations
• Make sign bit positive after unpacking
UNPK FLDA,FLDAPK
OI FLDASGN,X’F0’
…
FLDAPK DS PL3 12345C

FLDA DS CL6
F1F2F3F4C5
ORG FLDA+5
FLDASGN DS ZL1
 TM -Test Under Mask
• SI
• Used to test selected bits in a single byte
• Bits corresponding to ones in the mask are
tested
• Sets the condition code:
CC = 0 All tested bits 0, Test with BZ,BNZ
CC = 1 Tested bits mixed, Test with BM, BNM
CC = 3 All tested bits 1, Test with BO, BNO
 Example TM
TM CODE,B’00001100’
BO ALLONES
…
ALLONES EQU *
…
CODE DC P’2’ 00101100 2C
 Shifting Bits in a Register
• Two types of shifts:
– Single – the shift only affects one register
R7

– Double – the shift affects an even/odd

register pair
Pair treated as
one large
R6 R7 register
 Shifting Bits in a Register
• Two other types of shifts:
– Logical – bits move left or right and are
replaced by 0’s
– Algebraic
– bits that move left are replaced on the
right by 0’s
- bits that more right are replace on the
left by an appropriate sign (0 – positive, 1 –
negative)
 Bit Shifting Operations
• SRA – Shift Right Algebraic
• SLA – Shift Left Algebraic
• SRL – Shift Right Logical
• SLL – Shift Left Logical
• SRDA – Shift Right Double Algebraic
• SLDA – Shift Left Double Algebraic
• SRDL – Shift Right Double Logical
• SLDL – Shift Left Double Logical
 Example Shifts: SRL

R5 Before: 11111111000000001111111100000000

SRL R5,4

00001111111100000000111111110000
R5 After:
 Example Shifts: SLL

R5 Before: 11111111000000001111111100000000

SLL R5,4

11110000000011111111000000000000
R5 After:
 Example Shifts: SRA

R5 Before: 11111111000000001111111100000000

SRA R5,4

11111111111100000000111111110000
R5 After:
 Example Shifts: SLA

R5 Before: 11111111000000001111111100000000

SLA R5,4

11110000000011111111000000000000
R5 After:
 Example Shifts: SRDA
R4 (Before) R5 (Before)
11111111000000001111111100000000 11111111111100000000111111110000

SRDA R4,4

R4 (After) R5 (After)

11111111111100000000111111110000 00001111111111110000000011111111
 Notes on SLA and SLDA
• If one or more bits unlike the sign bit are
shifted out of the sign bit, an overflow
occurs, and condition code 3 is set.
• If the fixed-point-overflow mask bit is one,
a program interruption for fixed-point
overflow occurs. The mask bit can be set
with SPM (more about this later)
 Notes Algebraic Shifts
• For SLA and SLDA a left shift of one bit
position is equivalent to multiplying the
number by 2.
• For SRA and SRDA a right shift of one bit
position is equivalent to dividing the
number by 2.
Notes Algebraic and Logical Shifts
• Algebraic shifts set the Condition Code:
0 Result zero; no overflow
1 Result less than zero; no overflow
2 Result greater than zero; no overflow
3 Overflow
• Logical shifts do not set the condition code
and do not cause overflows
 PSW Program Mask
• Bits 20-23 in the PSW are the Program
Mask Program Mask Bit Program Exception
20 Fixed-point overflow
21 Decimal overflow
22 HFP exponent underflow
23 HFP significance

• Mask bit is 1 - exception results in an

interruption.
• Mask bit is 0 - no interruption occurs.
 Set Program Mask - SPM
• RR (But only uses operand 1)
• Used to set the condition code and the program
mask of the current PSW
0 … 31

• 32 bit registers: Bits 2 and 3 of R 1 replace the

condition code.
 Set Program Mask - SPM
0 … 31

• 32 bit registers: Bits 4 - 7 of R 1 replace the

program mask.
• All other bits are ignored.
 SPM Example
L R5,=X’08000000’ SET FPT
OVRFLOW
SPM R5
L R7,=X’F0000000’
SLA R7,5
BO RETURN
…
RETURN EQU *

Program SPM in your pds contains this code

Program #2 (An experiment, really)
• Create a program that has two decimal
overflows (add 1 when a packed field has
it largest decimal value).
• Handle the first overflow with BO and print
a message indicating you saw the
overflow
• Use SPM to cause an interrupt on the
second decimal overflow
Working With Large Data
Fields
 Insert Character
• RX
• Copies a single byte from memory (first
byte) into the rightmost byte of a register
Before: R5 After: R5
IC R5,X 00 11 22 33 00 11 22 aa

aa bb cc aa bb cc
X X
 Store Character
• RX
• Copies a single byte from the rightmost
byte of a register into memory
Before: R5 After: R5
STC R5,X 00 11 22 33 00 11 22 33

aa bb cc 33 bb cc
X X
 Indexing with IC or STC
IC R5,X
LA R6,3
IC R5,X(R6)
…
X DC C’ABCDEFG’
 Indexing
IC R5,X
LA R6,3
IC R5,X(R6)
…
X DC C’ABCDEFG’
 Indexing
IC R5,X
LA R6,3
IC R5,X(R6)
…
X DC C’ABCDEFG’
 Indexing
IC R5,X
LA R6,3
IC R5,X(R6)
…
X DC C’ABCDEFG’
 Program #3
Programming Assignment #3
Create a program that contains the following table:

FWRDS DC 0F
DC X'00FF00FF'
DC X'ABCDEF01'
DC X'FFFFFFFF'
DC X'00000000'
DC X'AAAAAAAA'
DC X'33333333'
DC X'12345678'
FWRDSEND EQU *
FWRDLEN EQU FWRDSEND-FWRDS
NOWRDS DC A(FWRDLEN/4)

Use indexing to load each fullword into a register one at a time. For each fullword, print it out as it would appear in binary. For example,
X'00FF00FF' would appear as:
00000000111111110000000011111111
There are many ways that this might be done. Use this as a chance to review the register shift operations, the Boolean register operations
(and, or, and exclusive or), TM, and even the register arithmetic operations. This is meant to be a chance to learn more about registers and
bits, and to force you to use indexing. If you are stumped, I can provide more details on how I would do it. Since this is a register exercise,
don't convert the binary register values to packed decimal - let's do the heavy lifting in the registers - however you choose to tackle it. Of
course, everything doesn't' occur there - we still have to build a print line in memory. Special marks if you can print in hex and binary like this:
00FF00FF 00000000111111110000000011111111
 Insert Characters Under Mask
• RS
• Copies a consecutive bytes from memory (1-4
bytes) into the bytes of a register based on a
binary mask.
• ICM R5,B’1010’,X
Before: R5 After: R5
00 11 22 33 aa 11 bb 33

aa bb cc aa bb cc
X X
 Insert Characters Under Mask
• ICM is sometimes used to load a word or
halfword (carefully) into a register from a
memory location that isn’t aligned on a halfword
or fullword boundary

R7 10 a9 35 42

ICM R7,B’1111’,XWORD
XWORD 11 aa bb cc
 Insert Characters Under Mask
• ICM is sometimes used to load a word or
halfword (carefully) into a register from a
memory location that isn’t aligned on a halfword
or fullword boundary

R7 10 a9 35 42

ICM R7,B’0011’,XWORD
XWORD 11 aa bb cc
 ICM Is Not Equivalent to LH
• ICM doesn’t sign extend like LH.
• LH changes every byte in the register
ICM R7,B’0011’,XWORD

R7 10 a9 35 42

XWORD 11 aa bb cc
 Store Characters Under Mask
• RS
• Copies bytes of a register based on a binary
mask into consecutive bytes of memory (1-4
bytes) .
• STCM R5,B’1010’,X
Before: R5 After: R5
00 11 22 33 00 11 22 33

aa bb cc 00 22 cc
X X
 ICM and STCM
• Indexing cannot be used with these
instructions because they are type RS and
not RX
• The instruction stores the binary mask in
place of storing the index register
MVCL – Move Characters Long
• Used to move data in storage provided the source and
target don’t overlap
• Uses four registers, two even/odd pairs
• Op 1 even register contains the target address
• Op 1 odd register contains the length of Op 1 (24 bits for
length)
• Op 2 even register contains the source address
• Op 2 odd register contains the length of Op 2 (24 bits for
length)
• Op 2 contains a pad byte in the first 8 bits
MVCL – Move Characters Long
Case 1: L1 > L2
Before execution:
R4 R5 R6 R7
A(A) 1000 A(B) x’40’ 500

After execution:
R4 R5 R6 R7
A(A) + 1000 0 A(B) + 500 x’40’ 0

Padding occurs with 500 blanks (x’40’)

MVCL – Move Characters Long
Case 1: L1 < L2
Before execution:
R4 R5 R6 R7
A(A) 500 A(B) x’40’ 1000

After execution:
R4 R5 R6 R7
A(A) + 500 0 A(B) + 500 x’40’ 500

No padding occurs
MVCL – Move Characters Long
Case 1: L1 = L2
Before execution:
R4 R5 R6 R7
A(A) 1000 A(B) x’40’ 1000

After execution:
R4 R5 R6 R7
A(A) + 1000 0 A(B) + 1000 x’40’ 0

No padding occurs
MVCL – Move Characters Long
• MVCL does not permit sending and
receiving fields to overlap
• MVCL sets the condition code:
– CC = equal Fields equal in size
– CC = low Size of field 1 < size of field 2
– CC = high Size of field 1 > size of field 2
– CC = overflow Fields overlapped
– Test with BE, BL,BH, BO
 MVCL Sample Code
LA R4,FIELDA POINT AT TARGET FIELD WITH EVEN REG
L R5,LENGTHA PUT LENGTH OF TARGET IN ODD REG
LA R6,FIELDB POINT AT SOURCE FIELD WITH EVEN REG
L R7,LENGTHB PUT LENGTH OF SOURCE IN ODD REG
ICM R7,B’1000’,BLANK INSERT BLANK PAD CHAR IN ODD REG
MVCL R4,R6
…
FIELDA DC CL2000’ ’
BDATA DC 1000CL1’X’
ORG BDATA
FIELDB DS CL1000
LENGTHA DC A(L’FIELDA) CREATE ADDR CON AS LENGTH
LENGTHB DC A(L’FIELDB) CREATE ADDR CON AS A LENGTH
BLANK DC C’ ’
Blanking an Area with MVCL
LA R8,TARGET
L R9,TARLEN
LA R4,SOURCE SOURCE DOESN’T
PARTICIPATE
LA R5,0 SET LENGTH OF SOURCE TO 0
ICM R5,B’1000’,BLANK SET PAD TO A BLANK
MVCL R8,R4 COPY BLANKS
 CLCL - Compare Long
• Long fields can be compared using CLCL
• Just like MVCL, the setup involves two
even/odd pairs for the source and target
fields
• As long as the compared bytes are equal,
CLCL adds 1 to the addresses in the even
registers and decrements the odd
registers by 1
 CLCL - Compare Long
• Unequal bytes causes the operation to
terminate with the address of the unequal
bytes in the even registers and the
condition code is set (equal, low, high,
overflow)
• The pad character can be supplied for
unequal sized fields and each pad
character participates in the comparison
 Using Multiple Base Registers
• An “ideal” program will have a single base
register
• Few programs are “ideal”
• Many programs require multiple base registers
• Providing multiple base registers is a two step
process
1. The registers are declared in a USING
2. Each register must be loaded with it’s base address
 Using Multiple Base Registers
• There are as many ways to load base
registers as there are programmers.
Here’s a simple approach to load 3
registers:
BASR 12,0
USING *,12,11,10
LA R10,2048
LA R11,2048(R10,R12)
LA R10,2048(R10,R11)
 Exercise #4
• Create a program that contains three 2000
byte fields. Define the fields like this:
FIELDA 0DS CL2000
DC 2000C’A’
FIELDB 0DS CL2000
DC 1000C’A’
DC 1000C’B’
FIELDC DC CL2000’ ’
 Exercise #4
• Move FieldB to FieldC.
• Print out FieldA, FieldB and FieldC in a series of
100 byte lines (use DSECTs)
• Compare FieldA to FieldC and print a message
indicating which one is larger.
• You may find this helpful:
ALEN DC A(L’FIELDA)
BLEN DC A(L’FIELDB)
CLEN DC A(L’FIELDC)
Working With Variable Length
Data
 Execute (EX)
• RX
• Used to execute a single instruction (usually an
MVC) that is “out of line”.
• If Operand 1 is register 0, the target instruction
is executed “as is”.
• If Operand 1 is not register 0, the rightmost byte
of the register is temporarily OR-ed with the
second byte of the target instruction during
execution.
 Execute
R6 00 00 5F 04
OR

…
EX R6,TARGET D2 00 C0 04 C0 18
…
DS …
TARGET MVC X(0),Y
 Execute
• When coding the target instruction, be
sure to specify an explicit length of zero so
the second byte of the machine code is
x’00’.
• Place the target instruction in a place
where it will never be executed except as
the target of an EX instruction. Most
programmers put the target instructions
among their DS’s and DC’s.
 Execute
• While the target instruction can be any
instruction except another EX instruction,
you should limit the target instructions to
MVC’s.
 Parm Data
• Here is some JCL that passes a parm
//COND00A EXEC PGM=JCLCONC1,
// PARM=‘THE MESSAGE'
• Here is the data structure the parm
creates
Reg 1 A(ADR LIST)
Halfword length plus
message length
A(Parm)

13 THE MESSAGE
 Processing the Parm Data
PARMSECT DSECT
LEN DS H
PARMDATA DS CL256
USING PARMSECT,R8
L R8,0(R0,R1) R8 PTS AT PARM
LH R9,LEN GRAB THE PARM LEN
BCTR R9,R0 SUB 1 FOR LENGTH
EX R9,MOVE MOVE THE DATA
…
MOVE MVC PARMOUT(0),PARMDATA
Notes on Processing Parm Data
• The target MVC is coded like this
MOVE MVC PARMOUT(0),PARMDATA
• An explicit length of zero allows the “OR”
operation of EX to “copy” a length into the target
instruction temporarily
• Rightmost byte of R9 is “OR-ed” into the second
byte of the target instruction (the length)
• EX R9,MOVE executes the MVC out of line
 Exercise #5
• Write a program that prints the parm data
it is passed through JCL
• Run the program three times with these
JCL EXEC statements:
//COND00A EXEC PGM=JCLCONC1,PARM=‘THE'
//COND00B EXEC PGM=JCLCONC1,PARM=‘THE MESSAGE‘
//COND00C EXEC
PGM=JCLCONC1,PARM=‘ABCDEFGHIJKLMNOPQRSTUVWXYZ'
 Variable Length Records
• Variable length records are described in the
DCB with RECFM=VB or RECFM=V
• When the record is read, it arrives with a Record
Descriptor Word (RDW) at the beginning.
• The RDW consists of two halfwords, the first
contains the length of the record including the
RDW and the second is unused

2 2 16
20 THIS IS THE DATA
RDW
 Reading VB or V Records
• The input buffer you define has to be large
enough to accommodate the largest record + the
RDW
• It could be defined like this:
DS 0F ALIGNMENT
MYREC DS 0CL124
RDW DS 0F
RECLEN DS H
DS H
DATA DS CL120
 Reading VB or V Records
• After reading the record, load the RECLEN
into a register
• Subtract 4 from the register to account for
the RDW
• Subtract 1 from the register to account for
an object code length
• Use EX to execute an MVC to an output
area
 Processing V or VB Records
LH R8,RECLEN
S R8,=F’5’
EX R8,TARGET
PUT MYFILE,RECOUT
…
TARGET MVC RECOUT(0),DATA
 Writing V or VB Records
• Move the data to your output buffer. We
can reuse MYREC.
• Determine the number of bytes in the
logical record.
• Add four for the RDW. Store the record
length + 4 in RECLEN
• PUT the record
 Exercise #6
• Read the file KC02486.PROGRAM6.DATA
which has records in the following format:
• Cols 1-2 Length in Character format
• Cols 3-80 Data
• Write a program with reads the file as 80
byte records and writes out a V or VB file
using the length of each record to
determine how much data to write
 Exercise #7
• Read the file VB file you produced in
Exercise 6.
• Print each record using the length that is
delivered in the RDW
 Translate
• There is a special instruction for translating
strings of characters called Translate (TR)
• Using TR you can easily convert a string or file
from one format to another. For example ASCII
to EBCDIC or lowercase letters to uppercase
letters.
• One of the difficulties of using TR is that it
requires you to build a table of values that
indicate by their position how the translation will
proceed
 Translate
• In many cases you are interested in only
changing a few of the values. For
example, you may only want to change the
26 lowercase letters to uppercase.
• In these cases, there is an easy way to
build the required table.
 Translate
• SS1
• The first operand is the memory location that
contains the data to be translated.
• The second operand is the translate table that
tells how the translation will occur
• Each byte in the string we are translating is used
as a displacement into the table. The
corresponding table byte replaces the byte we
are translating.
• Translation occurs from left to right in operand 1
 Translate
TR X,MYTABLE
X (Before) X (After)
03 02 01 C4 C3 C2

C1 C2 C3 C4 C5

MYTABLE
 Translate
• Since the string you are translating might
contain any of 256 possible patterns, most TR
tables have 256 bytes.
• Here is a table that translates every byte to
itself:
MYTABLE DC 256AL1(*-MYTABLE)
0001020304050607080900A0B0C0D0E0F10…
• Starting with this as a basis, you can ORG back
into the table to change the values you are really
interested in modifying..
 Translate
• Here is a table that translates digits to
blanks:
MYTABLE DC 256AL1(* - MYTABLE)
ORG MYTABLE+C’0’
DC CL10’ ‘
ORG
 Translate
• Here is a table that translates $, & and # to
+:
MYTABLE DC 256AL1(* - MYTABLE)
ORG MYTABLE+C’$’
DC CL1’+’
ORG MYTABLE+C’&’
DC CL1’+’
ORG MYTABLE+C’#”
DC CL’+’
ORG
 Translate and Test
• TRT is somewhat misnamed as the
translation does not occur automatically.
• Instead, TRT is used to find character
bytes that we are searching for. For
example, TRT could be used to find a
comma in a record, or the first blank.
• Like TR, TRT requires the programmer to
build a TRT table
 Translate and Test
• TRT tables are related to TR tables, but
the semantics of the statement is different.
• Like TR the byte we are translating is used
as a displacement into a table. If the table
byte we find is X’00’, translation
continues,otherwise translation terminates
• Finding any non-X’00’ byte stops the
translation and test.
 TRT
• TRT sets the condition code to indicate the
results of the operation:
• ( Zero ) All function bytes encountered
were X’00’.
• ( Minus ) A nonzero function byte was
found before the end of operand 1
• ( Positive ) A nonzero function byte was
found at the end of the operand 1
 TRT Scan for $ or ?
MYTABLE DC 256AL1(0)
ORG MYTABLE+C’$’ Scan for $
DC X’FF’
ORG MYTABLE+C’?’ Scan for ?
DC X’FF’
ORG
…
TRT MYSTRING,MYTABLE
BZ NOTFND
 TRT Sets Regs 1 and 2
If the TRT process finds a non X’00’ table byte
(function byte)
• Reg 1 will contain the address of the byte from
the string that was used to find a non-zero
function byte
• Reg 2 will contain the function byte in the
rightmost byte of the register.
• Coding this will move the function byte to the
string:
STC R2,0(R1)
 Testing Numerics with TRT
MYTABLE DC 256X’FF’
ORG MYTABLE+X’F0’
DC 10X’00’ 10 DIGITS OCCUR IN ORDER
ORG

• Suppose we want to test a field called “AFIELD”

to see if it is numeric in the sense described
above. This can be accomplished as follows.
TRT AFIELD,MYTABLE
BZ ALLNUMS
B NOTNUMS
 Exercise #8
• Write a program that reads and prints a file
called BCST.PROGRAM8.DATA which
contains records with upper and lowercase
letters (other characters, too).
• For each record, translate uppercase
letters to lowercase, and lowercase letters
to uppercase before printing the record. All
other characters translate to themselves.
 Exercise #9
• Read and print file
BCST.SICCC01.PDSLIB(EXER12)
• Each record contains a last name, a
comma, first name, #.
• Print each name as first name, space, last
name.
• This will require working with variable
length data and some address arithmetic
in the registers.