I/O devices (Peripherals)
• Examples: switches, LED, LCD, printers, keyboard, keypad
• Interface chips
• are needed to resolve the speed problem
• synchronizes data transfer between CPU and I/O device
• Connection of Interface and CPU
• Data pins are connected to CPU data bus
• I/O port pins are connected to I/O device
• CPU may be connected to multiple interface
• IO ports are simplest interface
I/O Interfacing
• Dedicated instructions for IO operations (Isolated I/O)
• same instruction for memory and IO (memory-mapped I/O)
• MCS-51 (8051) is memory mapped
Synchronization of CPU and interface chip
• To make sure that there are valid data in the interface
• two ways
• Polling method: Read status bit - Simple method
• Interrupt driven method: interface interrupts the CPU when it has new data -
CPU executes the ISR
Synchronization of CPU and interface chip
• Output synchronization: two ways of doing this
1.Polling method
• interface chip uses a status bit to indicate that the data register is empty
• CPU keeps checking status bit until it is set, and then writes data into interface chip
2.Interrupt driven method: interface chip interrupts the CPU when it data
register is empty. CPU executes the ISR
Synchronization of CPU and interface chip
• Methods used to synchronize data transfer between interface chip and I/O devices:
1. Brute force method: interface chip returns voltage levels in its input ports to CPU and makes data
written by CPU directly available on its output ports
• All 8051 port can perform brute force I/O
2. Strobe method:
• During input, the I/O device activates a strobe signal when data are stable. Interface chip latches the data
• For output, interface chip places output data on output port. when data is stable, it activates a strobe signal.
I/O device latches the data
3. Handshake method: two handshake signals are needed
• One is asserted by interface chip and the other by I/O device
8051 - Switch On I/O Ports
• Case-1:
• Gives a logic 0 on switch close
• Current is 0.5ma on switch close
• Case-2:
• Gives a logic 1 on switch close
• High current on switch close
• Case-3:
• Can damage port if 0 is output
Interfacing a Keypad
16 keys arranged as a 4X4 matrix
• Place a 0 on R0 port
F E D C
• Read C port R1
B A 9 8 R2
R3
• If there is a 0 bit then the button at the 7 6 5 4
R4
column/row intersection has been
3 2 1 0
pressed.
C1
C2
• Otherwise, try next row C3
C4
• Repeat constantly
Interfacing a Keypad
scan: mov P1,#EFH
jnb P1.0,db_0
scan1: jnb P1.1,db_1
scan2: jnb P1.2,db_2 F E D C 8051
scan3: jnb P1.3,db_3 P1.7
B A 9 8 P1.6
scan4: mov P1,#DFH P1.5
jnb P1.0,db_4 P1.4
7 6 5 4
…..
….. 3 2 1 0
…..
P1.3
P1.2
P1.1
P1.0
Interfacing a Keypad
db_0: lcall wt_10ms
jb P1.0, scan1
mov A, #0
ljmp get_code
db_1: lcall wt_10ms
jb P1.1, scan2
mov A, #1
ljmp get_code
…..
…
…..
get_code: mov DPTR, #key_tab
movc A, @A+DPTR
ljmp scan
key_tab: db ‘0123456789ABCDEF’
END
Simple output devices
• Case-1
• LED is ON if output=zero
• Most LEDs drop 1.7 volts and need about
10ma
• Current is (5-1.7)/470
• Case-2
• Too much current
• Failure of Port or LED
• Case-3
• Not enough drive (1ma)
• LED is too dim
The 7-Segment Display
• 7 LEDs arranged to form the number 8.
• By turning on and off (LEDs), different combinations can be produced.
• useful for displaying the digits 0 through 9, and some characters.
f b
g
e c
d
The 7-segment Display (Cont.)
• 7-segment displays come in 2 configurations:
Common Anode Common Cathode
Connect anode to the output Connect cathode to the output
• Therefore, the common anode variety would be better for our
interfacing needs.
Interfacing a 7-segment display
• A resistor will be needed to control the current
• This leaves two possibilities:
• Case 2 would be more appropriate
• Case 1 will produce different brightness depending on the number of LEDs turned on.
Use of current buffer
Interfacing to a DIP switch and 7-segment
display
Output a ‘1’ to ON a segment
We can use 74244 to common cathode 7_seg
BCD to 7_Seg lookup table
BCD pgfedcba hex
7_seg
mov a,p3 0000 001111 11 3f
anl a,0fh 0001 00110000 30
get_code: mov DPTR, #7s_tab 0010 0101101 1 5b
movc A, @A+DPRT 0011 010011 11 4f
mov p1,a 0100 011001 10 66
0101 01101101 6d
7s_tab: db 3fh,30h,5bh,4fh,66h 0110 01111101 7d
db 0111 00000111 07
6dh,7dh,07h,7fh,6fh 1000 01111111 7f
END 1001 01101111 6f
a a a a a a a a
f b f b b f b f f b f b f b
g g g g g g g
e c e e c c c e c c e c c
d d d d d d d
LCD Interfacing
• Liquid Crystal Displays (LCDs)
• cheap and easy way to display text
• Various configurations (1 line by 20 X char up to 8 lines X 80)
• Integrated controller
• The display has two register
• command register
• data register
• By RS you can select register
• Data lines (DB7-DB0) used to transfer data and commands
Alphanumeric LCD Interfacing
• Pinout
• 8 data pins D7:D0
• RS: Data or Command
Register Select
• R/W: Read or Write
• E: Enable (Latch data)
Microcontrolle
r
• RS – Register Select E communications
• RS = 0 Command Register R/W bus
• RS = 1 Data Register RS
• R/W = 0 Write , R/W = 1 Read DB7–DB0
• E – Enable 8
LCD
• Used to latch the data present on the data pins. controller
LCD Module
• D0 – D7
• Bi-directional data/command pins.
• Alphanumeric characters are sent in ASCII format.
LCD Commands
• The LCD’s internal controller can accept several commands and modify the
display accordingly. Such as:
• Clear screen
• Return home
• Decrement/Increment cursor
• After writing to the LCD, it takes some time for it to complete its internal
operations. During this time, it will not accept any new commands or data.
• We need to insert time delay between any two commands or data sent to LCD
Pin Description
Command Codes
LCD Addressing
LCD Timing
Interfacing LCD with 8051
8051
LM015
P3.4
RW
P3.5 E
P3.3 RS
P1.7-P1.0 D7-D0
Interfacing LCD with 8051
mov A, command
call cmd
delay
mov A, another_cmd
call cmd
delay
mov A, #’A’
call data
delay
mov A, #’B’
call data
delay
….
Command and Data Write Routines
data:mov P1, A ;A is ascii data
setb P3.3 ;RS=1 data
clr P3.4 ;RW=0 for write
setb P3.5 ;H->L pulse on E
clr P3.5
ret
cmd:mov P1,A ;A has the cmd word
clr P3.3 ;RS=0 for cmd
clr P3.4 ;RW=0 for write
setb P3.5 ;H->L pulse on E
clr P3.5
Example
8255 Usage: Simple Example
• 8255 memory mapped to 8051 at address C000H base
• A = C000H, B = C001H, C = C002H, CR = C003H
• Control word for all ports as outputs in mode0
• CR : 1000 0000b = 80H
test: mov A, #80H ; control word
mov DPTR, #C003H ; address of CR
movx @DPTR, A ; write control word
mov A, #55h ; will try to write 55 and AA
; alternatively
repeat:mov DPTR,#C000H ; address of PA
movx @DPTR, A ; write 55H to PA
inc DPTR ; now DPTR points to PB
movx @DPTR, A ; write 55H to PB
inc DPTR ; now DPTR points to PC
movx @DPTR, A ; write 55H to PC
cpl A ; toggle A (55AA, AA55)
