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Control Logic Design

The document outlines the development of a design algorithm for hard-wired control, focusing on the addition and subtraction of binary numbers in sign-magnitude form. It details the five steps of the design process, including problem statement, equipment configuration, algorithm derivation, data processor specification, and control logic design. Additionally, it discusses the implementation of a microprogram controller for these operations and the use of programmable logic arrays (PLA) in control circuits.

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xihuatl074
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0% found this document useful (0 votes)
13 views34 pages

Control Logic Design

The document outlines the development of a design algorithm for hard-wired control, focusing on the addition and subtraction of binary numbers in sign-magnitude form. It details the five steps of the design process, including problem statement, equipment configuration, algorithm derivation, data processor specification, and control logic design. Additionally, it discusses the implementation of a microprogram controller for these operations and the use of programmable logic arrays (PLA) in control circuits.

Uploaded by

xihuatl074
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 34

Dept.

of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)

Five consecutive steps of the design:


1. Statement of the problem
2. Equipment configuration
3. Derivation of the algorithm
4. Specify data processor
5. Design control logic

1
Dept. of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)

1. Statement of the problem


Addition and subtraction of two binary numbers represented in sign
magnitude form.

2. Equipment configuration

n-1 bit

2
Dept. of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)


3. Derivation of the algorithm
For signed A and B eight different conditions: ( ± A ) ± ( ± B )
Subtraction is signed changed addition
Need to implement four conditions : ( ± A ) + ( ± B )

Having same sign


(+ A) + (+ B) = + (A + B) (- A) + (- B) = - (A + B)
Add the magnitude and sign is same.

Having different sign


if A=>B if A<B
(+ A) + (- B) = + (A - B) = - (B - A)
(- A) + (+ B) = - (A - B) = + (B - A)
Subtract smaller one from the larger one and resulting sign is the sign of the
3
larger one.
Dept. of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)

Having same sign


(+ A) + (+ B) = + (A + B)
(- A) + (- B) = - (A + B)
Add the magnitude and sign is same.

Having different sign


if A=>B if A<B
(+ A) + (- B) = + (A - B) = - (B - A)
(- A) + (+ B) = - (A - B) = + (B - A)
Subtract smaller one from the larger one and
resulting sign is the sign of the larger
one.

4
Dept. of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)


System block diagram

5
ALU and its Function Table
Dept. of CSE, KUET

(from Ch09)

6
Dept. of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)


Control State Diagram

7
Dept. of CSE, KUET

Development of a Design Algorithm (Hard-wired Control)

Design of Hard-wired Control

8
Dept. of CSE, KUET

Design of a Microprogram Controller


for Sign-Magnitude Addition and Subtraction

9
Dept. of CSE, KUET

Contents

 Problem Statement
 Flowchart , State Diagram & Sequence of Microoperations
 Microprogram Controller Design
 Conclusions

10
Dept. of CSE, KUET

Sign-Magnitude Addition and Subtraction

For signed A and B eight different conditions: ( ± A ) ± ( ± B )


Subtraction is signed changed addition
Need to implement four conditions : ( ± A ) + ( ± B )

Having same sign


(+ A) + (+ B) = + (A + B) (- A) + (- B) = - (A + B)
Add the magnitude and sign is same.

Having different sign


if A=>B if A<B
(+ A) + (- B) = + (A - B) = - (B - A)
(- A) + (+ B) = - (A - B) = + (B - A)
Subtract smaller one from the larger one and resulting sign is the sign of the
11
larger one.
Dept. of CSE, KUET
Flowchart, State Diagram & Sequence of Microoperations

Need to Design a Microprogram Controller


12
Dept. of CSE, KUET

Microprogram Control

In a Microprogram Controller
 Control variables are stored in memory, usually ROM.
 After each operation control unit must determine its next address.
 Contain additional bits with bits for microoperations and a special
circuit.

A microinstruction =
bits for initiating microoperations +
bits to determine next address.

Microprogram controller is efficient for large and/or complicated system


13
Dept. of CSE, KUET

Require Capabilities

1. Provision to recognize external


signals (qa or qs).
2. Provision for sequencing
consecutive addresses.
3. Provision for choosing addresses
based on status variables S and E.

14
Block Diagram

qa or qs.
Recognize

Sequencing consecutive
addresses

Ch
ba oosin
se
d o g ad
n S dre
an sse
dE s
15
Dept. of CSE, KUET
Dept. of CSE, KUET

The Microprogram

Load External Address

S=1 E=1

16
Dept. of CSE, KUET

Conclusions

 Sign-magnitude addition & subtraction is explained with four operations.


 A microprogram controller is designed for the operations.
 In the controller, a control instruction is a part of a microinstruction and the
microinstructions are stored in a ROM.

17
Dept. of CSE, KUET

Design of Microprogram Controller

18
Dept. of CSE, KUET

The Microprogram
Controller for Addition and
Subtraction

A general-purpose configuration is require for a wide variety of situations.

19
Dept. of CSE, KUET

A General-Purpose
Microprogram Control Unit

Requirements:
 Have a large control memory
 Include all possible control variables
 Initiate many operations

Why 26 bits word? C -> Carry


Z -> Zero
 16 bits for microinstruction S -> Sign
V -> Overflow
 6 bits for 64 words
 1 bit for external address
 3 bits for 8 status bits

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Dept. of CSE, KUET

Processor Unit

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Dept. of CSE, KUET

Counting the Number of 1’s in a register

Set processor register R2 with


number of 1’s in register R1

If R1=00110101 then
R2 will be 100 (4 in binary )

22
Dept. of CSE, KUET
Microprogram

C -> Carry
Z -> Zero
S -> Sign
V -> Overflow

The microprogram method sometimes referred as firmware


23
Dept. of CSE, KUET

Multiplication of two fixed-point binary numbers

24
Dept. of CSE, KUET

Sign-magnitude Multiplication

Statement of the problem

25
Dept. of CSE, KUET

Sign-magnitude Multiplication

Statement of the problem

26
Dept. of CSE, KUET

Sign-magnitude Multiplication

Equipment Configuration

27
Dept. of CSE, KUET

Sign-magnitude Multiplication
Derivation of Algorithm

AQ <- shr EAQ, E <- 0


means
A <- shr A, Q <- shr Q,
Ak <- E, Qk <- A1 , E <- 0 28
Dept. of CSE, KUET

Sign-magnitude Multiplication
Control Specifications
Derivation of Algorithm

29
Dept. of CSE, KUET

Sign-magnitude Multiplication
Data-Processor Specification
Derivation of Algorithm

30
Data-Processor Dept.
Specification
of CSE, KUET

Sign-magnitude Multiplication

Control Specifications

JK Flip-flop excitation table


Q(t) Q(t+1) J K
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0 31
Dept. of CSE, KUET

Control Circuit for Multiplication with PLA

 Any combinational circuit can be replaced by programmable logic array


(PLA)
 Possible to design of a control circuit with a register connected to a PLA.
Control Circuit with PLA
 The register operates as a sequence register that determines the state of
the control.
 PLA is programmed to provide the control outputs and the next state for
the sequence register.

PLA method should be used if the state table contains many don’t care
entries; otherwise, it may be advantageous to use a ROM instead of a PLA.
32
Dept. of CSE, KUET

Control Circuit for Multiplication with PLA

State Table for PLA

If an input does not influence the next state, it


marked it with don’t care X.

33
Dept. of CSE, KUET

Control Circuit for Multiplication with PLA

State Table for PLA

PLA control may be classified as a microprogram control unit with the PLA replacing the
ROM for the control memory.

State Table to Program Table


X’s in the input columns and 0’s in
the output columns of state table are
changed to dashes in program table.

PLA
Five inputs and Seven outputs.
Seven product terms, one for each
34
row in the state table.

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