LECTURE DELIVERED BY

ENGR. IGBINOBA, KEVWE CHARLES

Ph.D (in view), M.ENG, B.ENG, ND

LECTURER

DEPT. OF ELECT/ELECT ENGRG

COURSE CODE: EEE 525
COURSE TITLE: MECHATRONICS I
 CONTENTS
1.0 Definition of a Microprocessor
1.1 Families of Microprocessors
1.2 Overview of 8085 Microprocessor
1.3 8085 Microprocessor – Functional Units
1.4 Internal Architecture of 8085 Microprocessor.
1.5 8085 System Buses
1.6 8085 Pin Description
1.7 8085 Programming Model
1.8 8085 Addressing Modes
1.9 8085 Instruction Set
1.10 8085 Instruction Format
1.11 8085 Interrupts
1.0 Definition of a Microprocessor
A Microprocessor is a multipurpose,
programmable clock driven register
based electronic device that reads
binary information from a storage
device called a memory, accepts
binary data as input and processes
data according to those instructions
and provides results as outputs.
1.0 Definition of a Microcontroller
It is a compact integrated circuit
designed to govern a specific operation
in an embedded system.

It is a small computer on a single

integrated circuit containing a processor
core, memory, and programmable input
and output peripherals.
Embedded system: An embedded
system is a microprocessor-based
computer hardware system with
software that is designed to
perform a dedicated function,
either as an independent system or
as a part of a large system.
Fig 1.1: Main comparison between microprocessor and microcontroller
 TABLE 1.1: Comparison of Microprocessor and Microcontroller

Microprocessors Microcontrollers

1 It is only a general purpose computer CPU It is a micro computer itself

2 Memory, I/O ports, timers, interrupts are not available All are integrated inside the microcontroller chip
inside the chip

3 This must have many additional digital components to Can function as a micro computer without any additional
perform its operation components.

4 Systems become bulkier and expensive. Make the system simple, economic and compact

5 Not capable for handling Boolean functions Handling Boolean functions

6 Higher accessing time required Low accessing time

7 Very few pins are programmable8 Most of the pins are programmable

8 Very few number of bit handling instructions Many bit handling instructions

9 Widely Used in modern PC and laptops widely in small control systems

 1.1 Families of Microprocessors
There are different families and generation of
microprocessors. The generational list of Intel
processors given below present all of Intel's
processors from the beginning.
1.1.1 The 4-bit processors : Intel 4004.
1.1.2 The 8-bit processors : 8008, 8080, 8085.
1.1.3 The 16-bit processors: 8086, 8088, 80186,
80188, 80286.
1.1.4 32-bit processors: The non-x86
microprocessors e.g. iAPX 432, i960 a.k.a. 80960,
i860 a.k.a. 80860
32-bit processors: Pentium Pro, Pentium II,
Celeron , Pentium III, Pentium II Xeon and
Pentium III Xeon, Celeron , Pentium M, Celeron
M, Intel Core, Dual-Core Xeon LV.

1.1.5 64-bit processors: Intel Core 2, Intel

Pentium Dual-Core, Celeron M
1.2 Overview of 8085 Microprocessor
It is an 8-bit microprocessor designed by Intel in 1977 using
NMOS (Negative-Channel Metal-Oxide Semiconductor)
technology. It uses the Von Neumann architecture. The Von
Neumann is an architecture where the program and data
are stored in the same memory module.
The main features of 8085 microprocessor (µp) are:
• It is an 8 bit Microprocessor.
• It is manufacture using N-MOS technology.
• It has 16-bit address bus and hence can address up to
216 = 65536 byte (64 KB) memory locations through A0
– A15.
• Data bus is a group of 8 lines D0 – D7.
• A 16-bit program counter (PC).
• A 16-bit stack pointer (SP).
• Six general purpose register arranged in pairs:
BC, DE, HL
• It requires a signal +5V power supply and
operates at 3.2 MHZ single phase clock.
• It is Enclosed with 40 pins DIP (Dual in line
package).
1.3 8085 Microprocessor – Functional Units
8085 consists of the following functional units –

1.3.1 Accumulator
The accumulator is an 8-bit register that is part of the
arithmetic/logic unit. The register is used to store 8-bit data and
to perform arithmetic, logical, I/O & LOAD/STORE operations.
The result of an operation is stored in the accumulator. The
accumulator is also identified as register A.

1.3.2 Arithmetic and logic unit

The ALU performs the actual numerical and logic operation such
as ‘add’, ‘subtract’,‘AND’, ‘OR’, etc. It uses data from memory and
from Accumulator to perform arithmetic. The result of its
operation is always stored in the Accumulator.
1.3.3 General purpose register
There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L.
Each register can hold 8-bit data.
These registers can work in pair to hold 16-bit data and their pairing
combination is like B-C, D-E & H-L.

1.3.4 Program counter

It is a 16-bit register in a computer processor that contains the address
(location) of the instruction being executed at the current time. As each
instruction gets fetched, the program counter increases its stored value by 1.
After each instruction is fetched, the program counter points to the next
instruction in the sequence. When the computer restarts or is reset, the
program counter normally reverts to 0.

1.3.5 Stack pointer

A stack pointer is 16-bit register that stores the address of the last program
request in a stack. A stack is a specialized buffer which stores data from the top
down. As new requests come in, they "push down" the older ones. The stack is
always incremented/decremented by 2 during push & pop operations.
1.3.6 Temporary register
It is an 8-bit register, which holds the temporary data of
arithmetic and logical operations.

1.3.7 Flag register: It is an 8-bit register having

five 1-bit flip-flops, which holds either 0 or 1 depending
upon the result stored in the accumulator.
These are the set of 5 flip-flops −
Sign (S)
Zero (Z)
Auxiliary Carry (AC)
Parity (P)
Carry (C)
 Table 1.2: But position in the flag register.

D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY
1.3.8 Instruction register and decoder
It is an 8-bit register that temporary stores the current instruction
of a program. When an instruction is fetched from memory, it is
stored in the Instruction register. Instruction decoder decodes or
interprets the information present in the Instruction register.
Decoded instruction is then passed to the next stage.

1.3.9 Timing and control unit

It provides timing and control signal to the microprocessor to
perform operations.
The following are the timing and control signals, which control
external and internal circuits –
Control Signals: READY, RD’, WR’, ALE
Status Signals: S0, S1, IO/M’
DMA Signals: HOLD, HLDA
RESET Signals: RESET IN, RESET OUT
1.3.10 Interrupt control
As the name suggests, it controls the interrupts during a process. When a
microprocessor is executing a main program and whenever an interrupt
occurs, the microprocessor shifts the control from the main program to
process the incoming request. After the request is completed, the control
goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5,
RST 5.5, TRAP.

1.3.11 Serial Input/output control

It controls the serial data communication by using these two instructions:
SID (Serial input data) and SOD (Serial output data).

1.3.12 Address buffer and address-data buffer

The content stored in the stack pointer and program counter is loaded into
the address buffer and address-data buffer to communicate with the CPU.
The memory and I/O chips are connected to these buses; the CPU can
exchange the desired data with the memory and I/O chips.
1.3.13 Data and Address bus
Data bus is a group of wires or lines that are used to carry
‘data’ ie information, results of arithmetic, etc) in binary form
between the microprocessor and other external units such as
the memory. It is bidirectional. The data bus consists of 8-bits
(8 wires) and has 28 combinations of binary digits with the
largest number 11111111 (255 in decimal).

Address bus is a group of wires or lines that are used to

transfer the addresses of Memory or I/O devices. It is
unidirectional, ie numbers are only sent from the
microprocessor to the memory, not other way. Address bus
consist of 16 wires, therefore 16 bit. This means that
Microprocessor 8085 can transfer maximum 16 bit address
which means it can address 65,536 different memory locations.
1.4 Internal Architecture of 8085 Microprocessor.

Fig.1.2: Internal Architecture of 8085 Microprocessor.

1.5 8085 System Buses
A system bus is a single computer bus that connects the major components of
a computer system, combining the functions of a data bus to carry information,
an address bus to determine where it should be sent, and a control bus to
determine its operation.
Bus is a group of conducting lines that carries data, address and control signals.
Bus are various lines which have specific functions for coordinating and
controlling microcontroller operations. They control whether memory is being
‘written to’ (data stored in memory) or ‘read from’ (data taken out of mem) 1
= Read, 0 = Write. It may also include clock line(s) for timing/synchronising,
‘interrupts’, ‘reset’ etc. Typically microprocessor has 10 control lines.

Fig. 1.2: System Bus

A typical microprocessor communicates with memory and other devices
(input and output) using three busses: Address Bus, Data Bus and
Control Bus.
Address bus: This is used to carry the address to the memory to fetch
either Instruction or Data.
Address bus is a group of wires or lines that are used to transfer the
addresses of Memory or I/O devices. It is unidirectional, ie numbers are
only sent form the microprocessor to the memory, not other way. In
Intel 8085 microprocessor, Address bus consist of 16 wires, therefore 16
bit. This means that Microprocessor 8085 can transfer maximum 16 bit
address which means it can address 65,536 different memory locations.
A 16-bit binary number allows 216 different numbers, or 32000 different
numbers, ie 0000000000000000 up to 1111111111111111. Because
memory consists of boxes, each with a unique address, the size of the
address bus determines the size of memory which can be used. To
communicate with memory, the microprocessor sends an address on the
address bus, eg 0000000000000011 (3 in decimal), to the memory. The
memory then selects box number 3 for reading or writing data.
Data Bus: This is used to carry the data from the memory.
The Data Bus typically consists of 8-bit (8 wires). Therefore,
28 combinations of binary digits. Data bus are used to
transmit "data", ie information, results of arithmetic, etc,
between memory and the microprocessor.
Data bus is bi-directional. Size of the data bus determines
what arithmetic can be done. If only 8 bits wide, then the
largest number is 11111111 (255 in decimal). Therefore,
larger numbers have to be broken down into chunks of
255. This slows the microprocessor. Data Bus also carries
instructions from the memory to the microprocessor. The
size of the bus therefore limits the number of possible
instructions to 256, each specified by a separate number.
Control Bus: They are used to carry the control signal like
READ/WRITE, SELECT, etc.
The Control Bus carries control signals partly unidirectional, partly
bi-directional. Control signals are things like "read or write". This
tells memory that we are either reading from a location specified
on the address bus, or writing to a location specified. It carries
various other signals to control and coordinate the operation of
the system.
Modern day microprocessors, like 80386, 80486 have much larger
busses. Typically 16 or 32 bit busses, which allow larger number
of instructions, more memory location, and faster arithmetic.
In the microprocessor the three busses are external to the chip
(except for the internal data bus). In case of external busses, the
chip connects to the busses via buffers, which are simply an
electronic connection between external bus and the internal data
bus.
1.6 8085 Pin Description
The following describes the function of each pin:

A15 – A8s (Output 3 State)

Address Bus; The most significant 8 bits of the memory address or the 8 bits of the I/0
address, 3 stated during Hold and Halt modes.

AD0 - AD7 (Input/Output 3state)

Multiplexed Address/Data Bus; Lower 8 bits of the memory address (or I/0 addresses)
appear on the bus during the first clock cycle of a machine state. It then becomes the
data bus during the second and third clock cycles. 3 stated during Hold and Halt modes.

ALE (Output)

Address Latch Enable: It occurs during the first clock cycle of a machine state and
enables the address to get latched into the on chip latch of peripherals. The falling edge
of ALE is set to guarantee setup and hold times for the address information. ALE can
also be used to store the status information. ALE is never 3stated.
SO, S1 (Output)

Data Bus Status. Encoded status of the bus cycle:

RD (Output 3state)

READ; indicates the selected memory or 1/0 device is to be read and that the
Data Bus is available for the data transfer.

WR (Output 3state)

WRITE; indicates the data on the Data Bus is to be written into the selected
memory or 1/0 location. Data is set up at the trailing edge of WR. 3stated during
Hold and Halt modes.

READY (Input)
If Ready is high during a read or write cycle, it indicates that the memory or
peripheral is ready to send or receive data. If Ready is low, the CPU will wait for
Ready to go high before completing the read or write cycle.
HOLD (Input)
HOLD; indicates that another Master is requesting the use of the Address and Data Buses.
The CPU, upon receiving the Hold request. will relinquish the use of buses as soon as the
completion of the current machine cycle. Internal processing can continue. The processor
can regain the buses only after the Hold is removed. When the Hold is acknowledged, the
Address, Data, RD, WR, and IO/M lines are 3stated.\

HLDA (Output)

HOLD ACKNOWLEDGE; indicates that the CPU has received the Hold request and that it
will relinquish the buses in the next clock cycle. HLDA goes low after the Hold request is
removed. The CPU takes the buses one half clock cycle after HLDA goes low.

INTR (Input)

INTERRUPT REQUEST; is used as a general purpose interrupt. It is sampled only during the
next to the last clock cycle of the instruction. If it is active, the Program Counter (PC) will
be inhibited from incrementing and an INTA will be issued. During this cycle a RESTART or
CALL instruction can be inserted to jump to the interrupt service routine. The INTR is
enabled and disabled by software. It is disabled by Reset and immediately after an
interrupt is accepted.
INTA (Output)

INTERRUPT ACKNOWLEDGE; is used instead of (and has the same timing as) RD during
the Instruction cycle after an INTR is accepted. It can be used to activate the 8259
Interrupt chip or some other interrupt port.
RST 5.5
RST 6.5 - (Inputs)
RST 7.5

RESTART INTERRUPTS; These three inputs have the same timing as INTR except they
cause an internal RESTART to be automatically inserted.
RST 7.5 ~~ Highest Priority
RST 6.5
RST 5.5 o Lowest Priority
The priority of these interrupts is ordered as shown above. These interrupts have a
higher priority than the INTR.
TRAP (Input)

Trap interrupt is a nonmaskable restart interrupt. It is recognized at the same time as

INTR. It is unaffected by any mask or Interrupt Enable. It has the highest priority of any
RESET IN (Input)

Reset sets the Program Counter to zero and resets the Interrupt Enable and HLDA flipflops.
None of the other flags or registers (except the instruction register) are affected The CPU is
held in the reset condition as long as Reset is applied.

RESET OUT (Output)

Indicates CPlJ is being reset. Can be used as a system RESET. The signal is synchronized to the
processor clock.

X1, X2 (Input)

Crystal or R/C network connections to set the internal clock generator X1 can also be an
external clock input instead of a crystal. The input frequency is divided by 2 to give the
internal operating frequency.

CLK (Output)

Clock Output for use as a system clock when a crystal or R/ C network is used as an input to
the CPU. The period of CLK is twice the X1, X2 input period.
IO/M (Output)

IO/M indicates whether the Read/Write is to memory or l/O Tristated during Hold and
Halt modes.

SID (Input)

Serial input data line The data on this line is loaded into accumulator bit 7 whenever a
RIM instruction is executed.

SOD (output)

Serial output data line. The output SOD is set or reset as specified by the SIM instruction.

Vcc

+5 volt supply.

Vss
Ground Reference.
Fig. 1.3: Pin Diagram of 8085
1.7 8085 Programming Model

Fig. 1.4: 8085 Programming Model

1.7.1 Registers

Registers are temporary storage locations inside the CPU that hold data and
addresses. The register file is the component that contains all the general
purpose registers of the microprocessor. A few CPUs also place special registers
such as the Program Counter (PC) and the status register in the register file.

Registers in an 8085 Microprocessor

The 8085 microprocessor have six general purpose registers and they are B, C,
D, E, H and L. Each register can hold 8-bit data. They can work in pairs such as
B-C, D-E and H-L to store 16-bit data. The H L pair works as a memory pointer.
The programmer can use these registers to store or copy data into the registers
by using data copy instructions.

They are called General Purpose Registers because when a program is

interrupted, its state, ie: the value of the registers such as the program counter,
instruction register or memory address register, are saved into the general
purpose registers, ready for recall when the program is ready to start again.
Different types of register in the 8085 microprocessor
There are various types of Registers in 8085 and are used
for various purpose. Some Mostly used Registers are
Accumulator(AC), Data Register(DR), Address Register(AR),
Program Counter(PC), Memory Data Register (MDR), Index
Register(IR), Memory Buffer Register(MBR).

Function of the Register

CPU registers perform a variety of functions, a primary one
of which is to offer temporary storage for the CPU to
access information stored on the hard drive.
1.7.1(a) Accumulator
The accumulator is an 8-bit register that is part of the arithmetic/logic
unit. The register is used to store 8-bit data and to perform arithmetic,
logical, I/O & LOAD/STORE operations. The result of an operation is
stored in the accumulator. The accumulator is also identified as
register A.

1.7.1(b) Flags Register

Flags register is the status register that contains the current state of
the microprocessor. The flags are used to reflect the data conditions
in the accumulator. The register is 8-bit wide.
The ALU includes five flip-flops, which are SET or RESET after an
operation according to data conditions of the result in the accumulator
and other registers. They are called Zero(Z), Carry (CY), Sign (S), Parity
(P), and Auxiliary Carry (AC) flags.
The most commonly used flags are Zero, Carry, and Sign. The
microprocessor uses these flags to test data conditions.
Zero (Z) Flag: The zero flag is SET to 1 when the result of
an operation is zero; otherwise it is RESET.
Carry (CY) Flag: If an arithmetic operation result in a carry,
the CY flag is SET; otherwise it is RESET.
Sign (S) Flag: The sign flag is SET if bit D7 of the result is
equal to 1; otherwise it is RESET.
Parity (P) Flag: If the result of an operation have EVEN
number of 1’s, the Parity flag is SET and for ODD number
of 1’s, it is RESET.
Auxiliary Carry (AC) Flag: In an arithmetic operation, when
a carry is generated by DIGIT D3 and passed to DIGIT D4,
the “ÄC” flag is SET. The flag is used internally for BCD
(Binary Coded Decimal) operations. There is no JUMP
instruction associated with this flag.
Example 1.1

Assume that before the execution of any instruction, we have A = 65H, B = B2H, H = F9H, L=
50H, CY =1, and the content of memory location F950H is 38H. What is the value of register A and the value
of the different flags after the execution of each of the following:
ADD L (b) ADC B

SOLUTION
(a) ADD L means add the content of register L to the accumulator and replace accumulator with result.

A = 65 H ------------------------ 0110 0101

L = 50 H ------------------------ 0101 0000
A = B5 H ------------------------- 1011 0101

Answers: A = B5H, Z = 0, S = 1, AC = 0, CY = 0, P = 0

(b) ADC B means add the content of register B and carry flag to the accumulator and replace accumulator
with result.
A = 65 H ------------------------ 0110 0101
B = B2 H ------------------------ 1011 0010
CY = 1 ------------------------ 0000 0001
A = 18 H -------------------- [1] 0001 1000

Answers: A = 18H, Z = 0, S = 0, AC = 0, CY = 1, P = 1
1.7.1(c) Program counter
It is a 16-bit register in a computer processor that contains
the address (location) of the instruction being executed at
the current time. As each instruction gets fetched, the
program counter increases its stored value by 1. After each
instruction is fetched, the program counter points to the next
instruction in the sequence. When the computer restarts or is
reset, the program counter normally reverts to 0.

1.7.1(d) Stack pointer

A stack pointer is 16-bit register that stores the address of
the last program request in a stack. A stack is a specialized
buffer which stores data from the top down. As new requests
come in, they "push down" the older ones. The stack is
always incremented/decremented by 2 during push & pop
1.8 8085 Addressing Modes
Addressing modes are various formats that are used in
specifying the operand (operand is the data on which the
operation is to be performed).
It is important to note that in every instruction, the
programmer has to specify three things
(a) Operation to be performed
(b) Address of the source data
(c) Address of the destination result.

The 8085 microcontroller provides five different modes for

addressing data, either in its register or in memory. They
are described below:
DIRECT OR ABSOLUTE ADDRESSING: In this mode, the
data is directly copied from the given address to the
register. For example: LDB 5000K: means the data
at address 5000K is copied to register B.

Data are accepted from outside devices and stored in the

accumulator or data stored in the accumulator are sent to
the outside device.

In direct addressing mode, the data to be operated

is available inside a memory location (address)
and that memory location is directly specified as
an operand.
Example 1.2 (Direct of Absolute addressing)
(a) IN 00H: means accept data from port 00H and store them in the
accumulator.
(b) OUT 01H: means send data from the accumulator to port 01H.
(c) LDB 5000K: means the data at address 5000K is copied to register B.
(d) LDA 2050 (load the contents of memory location into accumulator
A).
(e) LHLD address (load contents of 16-bit memory location into H-L
register pair).
(f) IN 35 (read the data from port whose address is 01).
(g) LDA 2500 H: means load the contents of memory location 2500 H in
the accumulator.
• LDA is the operation (opcode)
• 2500 H is the address of the source.
• Accumulator is the destination.
REGISTER ADDRESSING: In this type of addressing mode, the general
purpose register contains the data on which the operation is to be
performed (operand). The byte (eight bit) contains bits which specify a
register or register pair in which the data is located.

The data to be operated is available inside the register(s) and

register(s) is (are) operands. The data is copied from one register to
another. Therefore the operation is performed within various registers
of the microprocessor.
Example 1.3 (Register addressing)
MOV A, B: means move the contents of register B to A.
MOV is the operation (opcode)
B is the source data.
A is the destination.
ADD B: means add the contents of registers A and B and store the result
in register.
INR A: means increment the contents of register A by one
REGISTER INDIRECT ADDRESSING: In this type of addressing mode,
the address of the data to be operated on (operand) is specified
by a register pair. The instruction indirectly specifies the address of
the data by referring to a register pair for the absolute address.
Note that the high order byte of the address is stored in the
leftmost register of the pair, while the low order byte of the address
is stored in the rightmost register of the pair. The address 3000H,
will be stored in HL register pair as 30 in H and 00 in L.
In other words, the data to be operated is available inside a
memory location and that memory location is indirectly specified
by a register pair.
Example 1.4 (Register Indirect Addressing)
MOV A, M: means move data from memory location specified by H-
L pair to the accumulator.
MOV is the operation (opcode)
M is the memory location specified by H-L register pair.
A is the destination.
IMMEDIATE ADDRESSING: In this mode, the operand is specified
within the instruction itself. The 8 bit data is specified in the
instruction itself as one of its operand.
In immediate addressing mode, the source operand is always data. If
the data is 8-bit, then the instruction will be of 2 bytes, if the data is
of 16-bit then the instruction will be of 3 bytes.
Example 1.5 (Immediate addressing)
(a) MVI K, 20F: means 20F is copied into register K.
(b) MVI B, 45H: means move the data 45H immediately to register B.
(c) LXI H, 3050: means load the H-L pair with the operand 3050H
immediately.
(d) JMP: means jump to the operand address immediately.
(e) MVI A, 05H: means move 05 H in the accumulator.
• MVI is the operation (opcode)
• 05 H is the immediate data (source).
• A is the destination.
IMPLIED/IMPLICIT ADDRESSING MODE: This addressing
mode doesn’t require any operand and the data to be
operated is available in the instruction itself (opcode).
The source of data as well as address of destination of
result is fixed.
Example 1.6 (Implied Addressing)
(a) CMA: means find and stores the 1’s complement of the
contents of accumulator A in A)
(b) RRC: means rotate accumulator A right by one bit.
(c) RLC: means rotate accumulator A left by one bit.
• CMA is the operation (opcode)
• A is the source
• A is the destination.
1.9 8085 Instruction Set
An instruction is a command given to a microprocessor to
perform a specific function on a given data. The entire group of
instructions, called the instruction set, determines what
functions the microprocessor can perform.
The instructions describe here are of Intel 8085. These
instructions are of Intel Corporation. They cannot be used by
other microprocessor manufacturers. The programmer can write
a program in assembly language using these instructions. These
instructions have been classified into the following groups:
• Data Transfer Group.
• Arithmetic Group.
• Logical Group.
• Branch Control Group.
• I/O and Machine Control Group.
1.9.1 Data Transfer Group
Instructions which are used to transfer data from one
register to another register, from memory location to
register, from an input/output device to accumulator come
under this group. Examples are: MOV, MVI, LXI, LDA, STA
etc
This group of instructions copy data from a location called
a source to another location called a destination, without
modifying the contents of the source. The term data
transfer is used for this copying function. However, the
term transfer is misleading; it creates the impression that
the contents of the source are destroyed when data is
transferred; in fact, the contents are retained without any
modification. The various types of data transfer (copy) are
listed below together with examples of each type:
Table 1.4: Types of data transfer
Types Examples
1. Between Registers. 1. Copy the contents of the register B into register D.

2. Specific data byte to a register or a memory location. 2. Load register B with the data byte 32H.

3. Between a memory location and a register. 3. From a memory location 2000H to register B.
4. Between an I/O device and the accumulator. 4.From an input keyboard to the accumulator.

Table 1.5: Data Transfer Instructions and their meaning

Instruction Opcode Operand Description

MOV B, C MOV B, C This instruction copies the contents of the source register
MOV B, M B, M into the destination register; the contents of the source
register are not altered. If one of the operands is a
MOV Rd, Rs Rd, Rs memory location, its location is specified by the contents
MOV M, Rs M, Rs of the HL registers.
MOV = Operation,
C,M,Rs = Source,
B, Rd, M = Destination
 1.9.2 Arithmetic Group
These instructions perform arithmetic operations such as addition,
subtraction, increment or decrement of the content of a register or memory.
The condition code flags are affected after this operation. Examples are: ADD,
SUB, INR, DAD etc.

Table 1.6: Arithmetic Instructions and their meaning

Instruction Opcode Operand Description

ADD R ADD R The contents of the operand (register or memory) are added to
ADD M M the contents of the accumulator and the result is stored in the
accumulator. If the operand is a memory location, its location is
specified by the contents of the HL registers. All flags are modified
to reflect the result of the
addition.
1.9.3 Logical Group
These instructions perform various logical operations
such as AND, OR, Exclusive OR, Compare, Rotate, with
the contents of the accumulator. Examples are: ANA,
XRA, ORA, CMP and RAL etc.

Table 1.7: Logical Instructions and their meaning

Instruction Opcode Operand Description
CMP R CMP R The contents of the operand (register or memory) are
CMP M M compared with the contents of the accumulator. Both contents
are preserved.
if (A) < (reg/mem): Carry flag is set
if (A) = (reg/mem): Zero flag is set
if (A) > (reg/mem): Carry and Zero flags are reset
1.9.4 Branch Control Group
This group includes the instructions for conditional and
unconditional jump, subroutine call and return and start.
This group of instructions alters the sequence of program
execution either conditionally or unconditionally. Examples are:
JMP, JC, JZ, CALL, CZ, RST etc.

Table 1.8: Branch Control Instructions and their meaning

Instruction Opcode Operand Description
Jump unconditionally JMP 16-bit address The program sequence is transferred to the
JMP 16-bit address memory location specified by the 16-bit
address given in the operand.
JMP 2034H
 1.9.5 I/O and Machine Control Group
These instructions control machine functions such as Halt,
Interrupt, or do nothing. Examples are IN, OUT, PUSH, POP and HLT
etc.

Table 1.9: I/O and Machine Control Instructions and their meaning

Instruction Opcode Operand Description

HLT HLT None Halt. The CPU finishes executing the current
instruction and halts any further execution.

DI DI None Disable Interrupts. The interrupt enable flip-

flop is reset and all the interrupts except the
TRAP are disabled.
EI
EI None
Enable Interrupts. The interrupt enable
flip-flop is set and all interrupts are enabled.
1.10 Instruction format

An instruction is a command to the microprocessor to perform a given task on a specified data.

Each instruction has two parts:
(a) One is task to be performed, called the operation code (opcode),
(b) The second is the data to be operated on, called the operand.

The operand (or data) can be specified in various ways. It may include 8-bit (or 16-bit ) data, an
internal register, a memory location, or 8-bit (or 16-bit) address. In some instructions, the
operand is implicit.

1.10.1 Instruction word size

The 8085 instruction set is classified into the following three groups according to word size:

1. One-word or 1-byte instructions

2. Two-word or 2-byte instructions
3. Three-word or 3-byte instructions

In the 8085, "byte" and "word" are synonymous because it is an 8-bit microprocessor.
However, instructions are commonly referred to in terms of bytes rather than words.
One-Byte Instructions
A 1-byte instruction includes the opcode and operand in the same byte.
Operand(s) are internal register and are coded into the instruction.
Example 1.7
(a) MOV C, A (Copy the contents of the accumulator in the register C).
(b) ADD B (Add the contents of register B to the contents of the
accumulator).
(c) CMA (Invert each bit in the accumulator).

These instructions are 1-byte instructions performing three different tasks.

• In the first instruction, both operand registers are specified.
• In the second instruction, the operand B is specified and the accumulator is
assumed.
• In the third instruction, the accumulator is assumed to be the implicit
operand.

These instructions are stored in 8- bit binary format in memory; each requires
one memory location.
Two-Byte Instructions
In a two-byte instruction, the first byte specifies
the operation code (opcode) and the second byte
specifies the operand. Source operand is a data
byte immediately following the opcode.
Example 1.8
(a)MVI A, 32H or MOV A, Data (Load an 8-bit data
byte in the accumulator).
• The instruction would require two memory
locations to store in memory.
Three-Byte Instructions
In a three-byte instruction, the first byte specifies
the opcode, and the following two bytes specify
the 16-bit address. Note that the second byte is
the low-order address and the third byte is the
high-order address.
opcode + data byte + data byte
Example 1.8
(a) JMP 2085H (Transfer the program sequence to
the memory location 2085H)
This instruction would require three memory
locations to store in memory.
1.11 8085 Interrupts

Interrupts are signals generated by the external devices to request the

microprocessor to perform a task. They are external signal that causes a
microprocessor to jump to a specific subroutine.
There are 5 hardware interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST
5.5, and INTR.
These interrupts have a fixed priority of interrupt service. If two or more
interrupts go high at the same time, the 8085 microprocessor will service
them on priority basis.

TRAP
It is a non-maskable interrupt that cannot be masked, having the first
highest priority among all interrupts. By default, it is enabled and cannot
be disabled until it gets acknowledged. In case of failure, it executes as
ISR and sends the data to backup memory. This interrupt transfers the
control to the location 0024H. TRAP - Has the first highest priority and
cannot be masked or disabled.
RST7.5
It is a maskable interrupt, having the second highest priority
among all interrupts. When this interrupt is executed, the
processor saves the content of the PC register into the stack
and branches to 003CH address. RST 7.5 – Has the second
highest priority and can be masked or disabled. This
interrupt is latched internally and must be RESET before it
can be used again.

RST 6.5
It is a maskable interrupt, having the third highest priority
among all interrupts. When this interrupt is executed, the
processor saves the content of the PC register into the stack
and branches to 0034H address. RST 6.5 - Has the third
highest priority and can be masked or disabled.
RST 5.5
It is a maskable interrupt. When this interrupt is executed, the processor
saves the content of the PC register into the stack and branches to 002CH
address. RST 5.5 - Has the forth highest priority and can be masked or
disabled.

INTR
It is a maskable interrupt, having the lowest priority among all interrupts. It
can be disabled by resetting the microprocessor. INTR - Has the fifth highest
priority and can be masked or disabled.
When INTR signal goes high, the following events can occur −
• The microprocessor checks the status of INTR signal during the
execution of each instruction.
• When the INTR signal is high, then the microprocessor completes its
current instruction and sends active low interrupt acknowledge signal.
• When instructions are received, then the microprocessor saves the
address of the next instruction on stack and executes the received
instruction.
1.11.1 Classification of Interrupts
Interrupt are classified into following six groups
based on their parameter −
Vector interrupt − In this type of interrupt, the
interrupt address is known to the processor. For
example: RST7.5, RST6.5, RST5.5, TRAP.
Non-Vector interrupt − In this type of interrupt,
the interrupt address is not known to the
processor so, the interrupt address needs to be
sent externally by the device to perform
interrupts. For example: INTR.
Maskable interrupt − In this type of interrupt, we can disable the
interrupt by writing some instructions into the program. It is an
interrupt that can be tuned off by the programmer. For example:
RST7.5, RST6.5, RST5.5 and INTR

Non-Maskable interrupt − In this type of interrupt, we cannot

disable the interrupt by writing some instructions into the program.
For example: TRAP.

Software interrupt − In this type of interrupt, the programmer has to

add the instructions into the program to execute the interrupt. For
example, if a program expects a variable to be a valid number, but
the value is null, an interrupt may be generated to prevent the
program from crashing. It allows the program to change course and
handle the error before continuing.
There are 8 software interrupts pins in 8085, i.e. RST0, RST1, RST2,
RST3, RST4, RST5, RST6, and RST7.
Hardware interrupt − A hardware interrupt is often
created by an input device such as
a mouse or keyboard. For example, if you are using
a word processor and press a key, the program must
process the input immediately. Typing "hello" creates
five interrupt requests, which allows the program to
display the letters you typed. Similarly, each time you
click a mouse button or tap on a touchscreen, you send
an interrupt signal to the device.
There are 5 interrupt pins in 8085 used as hardware
interrupts, i.e. TRAP, RST7.5, RST6.5, RST5.5, INTR.

TRAP interrupt has the highest priority.

THANK YOU