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projects: common: versal: Fix spi_clk pins #1714

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bluncan
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@bluncan bluncan commented May 9, 2025

PR Description

After we updated Vivado to 2024.2, some critical warnings appeared saying that there are no clocks on the i_system_wrapper/system_i/sys_cips/inst/pspmc_0/inst/PS9_inst/EMIOSPI0SCLKOINT and i_system_wrapper/system_i/sys_cips/inst/pspmc_0/inst/PS9_inst/EMIOSPI1SCLKOINT pins.

This commit fixes the pin names on the spi_clk constraints and removes the critical warning.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

@bluncan
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bluncan commented May 14, 2025

Tested the builds on hardware and it's working.

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